// SPDX-License-Identifier: BSD-3-Clause /* * Common Board Device Tree for * Microsoft Mobile MSM8994 Octagon Platforms * * Copyright (c) 2020, Konrad Dybcio * Copyright (c) 2020, Gustave Monce */ #include "pm8994.dtsi" #include "pmi8994.dtsi" #include #include #include /* * Delete all generic (msm8994.dtsi) reserved * memory mappings which are different in this device. */ /delete-node/ &adsp_mem; /delete-node/ &audio_mem; /delete-node/ &cont_splash_mem; /delete-node/ &mba_mem; /delete-node/ &mpss_mem; /delete-node/ &peripheral_region; /delete-node/ &rmtfs_mem; /delete-node/ &smem_mem; / { /* * Most Lumia 950/XL users use GRUB to load their kernels, * hence there is no need for msm-id and friends. */ /* * This enables graphical output via bootloader-enabled display. * acpi=no is required due to WP platforms having ACPI support, but * only for Windows-based OSes. */ chosen { bootargs = "earlycon=efifb console=efifb acpi=no"; #address-cells = <2>; #size-cells = <2>; ranges; }; gpio-keys { compatible = "gpio-keys"; input-name = "gpio-keys"; autorepeat; volupkey { label = "Volume Up"; gpios = <&pm8994_gpios 3 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; wakeup-source; debounce-interval = <15>; }; camsnapkey { label = "Camera Snapshot"; gpios = <&pm8994_gpios 4 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; wakeup-source; debounce-interval = <15>; }; camfocuskey { label = "Camera Focus"; gpios = <&pm8994_gpios 5 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = ; wakeup-source; debounce-interval = <15>; }; }; gpio-hall-sensor { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&hall_front_default &hall_back_default>; label = "GPIO Hall Effect Sensor"; hall-front-sensor { label = "Hall Effect Front Sensor"; gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>; linux,input-type = ; linux,code = ; linux,can-disable; }; hall-back-sensor { label = "Hall Effect Back Sensor"; gpios = <&tlmm 75 GPIO_ACTIVE_HIGH>; linux,input-type = ; linux,code = ; linux,can-disable; }; }; reserved-memory { /* * This device being a WP platform has a very different * memory layout than other Android based devices. * This memory layout is directly copied from the original * device UEFI firmware, and adapted based on observations * using JTAG for the Qualcomm Peripheral Image regions. */ uefi_mem: memory@200000 { reg = <0 0x200000 0 0x100000>; no-map; }; mppark_mem: memory@300000 { reg = <0 0x300000 0 0x80000>; no-map; }; fbpt_mem: memory@380000 { reg = <0 0x380000 0 0x1000>; no-map; }; dbg2_mem: memory@381000 { reg = <0 0x381000 0 0x4000>; no-map; }; capsule_mem: memory@385000 { reg = <0 0x385000 0 0x1000>; no-map; }; tpmctrl_mem: memory@386000 { reg = <0 0x386000 0 0x3000>; no-map; }; uefiinfo_mem: memory@389000 { reg = <0 0x389000 0 0x1000>; no-map; }; reset_mem: memory@389000 { reg = <0 0x389000 0 0x1000>; no-map; }; resuncached_mem: memory@38e000 { reg = <0 0x38e000 0 0x72000>; no-map; }; disp_mem: memory@400000 { reg = <0 0x400000 0 0x800000>; no-map; }; uefistack_mem: memory@c00000 { reg = <0 0xc00000 0 0x40000>; no-map; }; cpuvect_mem: memory@c40000 { reg = <0 0xc40000 0 0x10000>; no-map; }; rescached_mem: memory@400000 { reg = <0 0xc50000 0 0xb0000>; no-map; }; tzapps_mem: memory@6500000 { reg = <0 0x6500000 0 0x500000>; no-map; }; smem_mem: memory@6a00000 { reg = <0 0x6a00000 0 0x200000>; no-map; }; hyp_mem: memory@6c00000 { reg = <0 0x6c00000 0 0x100000>; no-map; }; tz_mem: memory@6d00000 { reg = <0 0x6d00000 0 0x160000>; no-map; }; rfsa_adsp_mem: memory@6e60000 { reg = <0 0x6e60000 0 0x10000>; no-map; }; rfsa_mpss_mem: memory@6e70000 { compatible = "qcom,rmtfs-mem"; reg = <0 0x6e70000 0 0x10000>; no-map; qcom,client-id = <1>; }; /* * Value obtained from the device original ACPI DSDT table * MPSS_EFS / SBL */ mba_mem: memory@6e80000 { reg = <0 0x6e80000 0 0x180000>; no-map; }; /* * Peripheral Image loader region begin! * The region reserved for pil is 0x7000000-0xef00000 */ mpss_mem: memory@7000000 { reg = <0 0x7000000 0 0x5a00000>; no-map; }; adsp_mem: memory@ca00000 { reg = <0 0xca00000 0 0x1800000>; no-map; }; venus_mem: memory@e200000 { reg = <0 0xe200000 0 0x500000>; no-map; }; pil_metadata_mem: memory@e700000 { reg = <0 0xe700000 0 0x4000>; no-map; }; memory@e704000 { reg = <0 0xe704000 0 0x7fc000>; no-map; }; /* Peripheral Image loader region end */ cnss_mem: memory@ef00000 { reg = <0 0xef00000 0 0x300000>; no-map; }; }; }; &blsp1_i2c1 { status = "okay"; rmi4-i2c-dev@4b { compatible = "syna,rmi4-i2c"; reg = <0x4b>; #address-cells = <1>; #size-cells = <0>; interrupt-parent = <&tlmm>; interrupts = <77 IRQ_TYPE_EDGE_FALLING>; rmi4-f01@1 { reg = <0x01>; syna,nosleep-mode = <1>; }; rmi4-f12@12 { reg = <0x12>; syna,sensor-type = <1>; syna,clip-x-low = <0>; syna,clip-x-high = <1440>; syna,clip-y-low = <0>; syna,clip-y-high = <2560>; }; }; }; &blsp1_uart2 { status = "okay"; }; &blsp2_uart2 { status = "okay"; }; &pmi8994_spmi_regulators { vdd_gfx: s2@1700 { reg = <0x1700 0x100>; regulator-min-microvolt = <980000>; regulator-max-microvolt = <980000>; }; }; &rpm_requests { /* These values were taken from the original firmware ACPI tables */ pm8994_regulators: pm8994-regulators { compatible = "qcom,rpm-pm8994-regulators"; vdd_s1-supply = <&vph_pwr>; vdd_s2-supply = <&vph_pwr>; vdd_s3-supply = <&vph_pwr>; vdd_s4-supply = <&vph_pwr>; vdd_s5-supply = <&vph_pwr>; vdd_s6-supply = <&vph_pwr>; vdd_s7-supply = <&vph_pwr>; vdd_s8-supply = <&vph_pwr>; vdd_s9-supply = <&vph_pwr>; vdd_s10-supply = <&vph_pwr>; vdd_s11-supply = <&vph_pwr>; vdd_s12-supply = <&vph_pwr>; vdd_l1-supply = <&vreg_s1b_1p0>; vdd_l2_l26_l28-supply = <&vreg_s3a_1p3>; vdd_l3_l11-supply = <&vreg_s3a_1p3>; vdd_l4_l27_l31-supply = <&vreg_s3a_1p3>; vdd_l5_l7-supply = <&vreg_s5a_2p15>; vdd_l6_l12_l32-supply = <&vreg_s5a_2p15>; vdd_l8_l16_l30-supply = <&vph_pwr>; vdd_l9_l10_l18_l22-supply = <&vph_pwr_bbyp>; vdd_l13_l19_l23_l24-supply = <&vph_pwr_bbyp>; vdd_l14_l15-supply = <&vreg_s5a_2p15>; vdd_l17_l29-supply = <&vph_pwr_bbyp>; vdd_l20_l21-supply = <&vph_pwr_bbyp>; vdd_l25-supply = <&vreg_s5a_2p15>; vdd_lvs1_2-supply = <&vreg_s4a_1p8>; /* S1, S2, S6 and S12 are managed by RPMPD */ vreg_s3a_1p3: s3 { regulator-min-microvolt = <1300000>; regulator-max-microvolt = <1300000>; regulator-allow-set-load; regulator-system-load = <300000>; }; vreg_s4a_1p8: s4 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-allow-set-load; regulator-always-on; regulator-system-load = <325000>; }; vreg_s5a_2p15: s5 { regulator-min-microvolt = <2150000>; regulator-max-microvolt = <2150000>; regulator-allow-set-load; regulator-system-load = <325000>; }; vreg_s7a_1p0: s7 { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; /* * S8 - SPMI-managed VDD_APC0 * S9, S10 and S11 (the main one) - SPMI-managed VDD_APC1 */ vreg_l1a_1p0: l1 { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; vreg_l2a_1p25: l2 { regulator-min-microvolt = <1250000>; regulator-max-microvolt = <1250000>; regulator-allow-set-load; regulator-system-load = <4160>; }; vreg_l3a_1p2: l3 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <80000>; }; vreg_l4a_1p225: l4 { regulator-min-microvolt = <1225000>; regulator-max-microvolt = <1225000>; }; /* L5 is inaccessible from RPM */ vreg_l6a_1p8: l6 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-allow-set-load; regulator-system-load = <1000>; }; /* L7 is inaccessible from RPM */ vreg_l8a_1p8: l8 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; vreg_l9a_1p8: l9 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; vreg_l10a_1p8: l10 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; vreg_l11a_1p2: l11 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <35000>; }; vreg_l12a_1p8: l12 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <50000>; }; vreg_l13a_2p95: l13 { regulator-min-microvolt = <1850000>; regulator-max-microvolt = <2950000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <22000>; }; vreg_l14a_1p8: l14 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <52000>; }; vreg_l15a_1p8: l15 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; vreg_l16a_2p7: l16 { regulator-min-microvolt = <2700000>; regulator-max-microvolt = <2700000>; }; vreg_l17a_2p7: l17 { regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <300000>; }; vreg_l18a_2p85: l18 { regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <600000>; }; vreg_l19a_3p3: l19 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <500000>; }; vreg_l20a_2p95: l20 { regulator-min-microvolt = <2950000>; regulator-max-microvolt = <2950000>; regulator-always-on; regulator-boot-on; regulator-allow-set-load; regulator-system-load = <570000>; }; vreg_l21a_2p95: l21 { regulator-min-microvolt = <2950000>; regulator-max-microvolt = <2950000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <800000>; }; vreg_l22a_3p0: l22 { regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <150000>; }; vreg_l23a_2p8: l23 { regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <80000>; }; vreg_l24a_3p075: l24 { regulator-min-microvolt = <3075000>; regulator-max-microvolt = <3150000>; regulator-allow-set-load; regulator-system-load = <5800>; }; vreg_l25a_1p1: l25 { regulator-min-microvolt = <1150000>; regulator-max-microvolt = <1150000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <80000>; }; vreg_l26a_1p0: l26 { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; }; vreg_l27a_1p05: l27 { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <500000>; }; vreg_l28a_1p0: l28 { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <26000>; }; vreg_l29a_2p8: l29 { regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <80000>; }; vreg_l30a_1p8: l30 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <2500>; }; vreg_l31a_1p2: l31 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; regulator-allow-set-load; regulator-system-load = <600000>; }; vreg_l32a_1p8: l32 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; vreg_lvs1a_1p8: lvs1 { }; vreg_lvs2a_1p8: lvs2 { }; }; pmi8994_regulators: pmi8994-regulators { compatible = "qcom,rpm-pmi8994-regulators"; vdd_s1-supply = <&vph_pwr>; vdd_bst_byp-supply = <&vph_pwr>; vreg_s1b_1p0: s1 { regulator-min-microvolt = <1025000>; regulator-max-microvolt = <1025000>; }; /* S2 & S3 - VDD_GFX */ vph_pwr_bbyp: boost-bypass { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; }; }; &sdhc1 { status = "okay"; }; &tlmm { hall_front_default: hall-front-default { pins = "gpio42"; function = "gpio"; drive-strength = <2>; bias-disable; }; hall_back_default: hall-back-default { pins = "gpio75"; function = "gpio"; drive-strength = <2>; bias-disable; }; };