1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (c) 2018 MediaTek Inc. 4 * Author: Ben Ho <ben.ho@mediatek.com> 5 * Erin Lo <erin.lo@mediatek.com> 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/input.h> 10#include "mt8183.dtsi" 11#include "mt6358.dtsi" 12 13/ { 14 aliases { 15 serial0 = &uart0; 16 }; 17 18 chosen { 19 stdout-path = "serial0:115200n8"; 20 }; 21 22 backlight_lcd0: backlight_lcd0 { 23 compatible = "pwm-backlight"; 24 pwms = <&pwm0 0 500000>; 25 power-supply = <&bl_pp5000>; 26 enable-gpios = <&pio 176 0>; 27 brightness-levels = <0 1023>; 28 num-interpolated-steps = <1023>; 29 default-brightness-level = <576>; 30 status = "okay"; 31 }; 32 33 memory@40000000 { 34 device_type = "memory"; 35 reg = <0 0x40000000 0 0x80000000>; 36 }; 37 38 clk32k: oscillator1 { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <32768>; 42 clock-output-names = "clk32k"; 43 }; 44 45 it6505_pp18_reg: regulator0 { 46 compatible = "regulator-fixed"; 47 regulator-name = "it6505_pp18"; 48 regulator-min-microvolt = <1800000>; 49 regulator-max-microvolt = <1800000>; 50 gpio = <&pio 178 0>; 51 enable-active-high; 52 }; 53 54 lcd_pp3300: regulator1 { 55 compatible = "regulator-fixed"; 56 regulator-name = "lcd_pp3300"; 57 regulator-min-microvolt = <3300000>; 58 regulator-max-microvolt = <3300000>; 59 regulator-always-on; 60 regulator-boot-on; 61 }; 62 63 bl_pp5000: regulator2 { 64 compatible = "regulator-fixed"; 65 regulator-name = "bl_pp5000"; 66 regulator-min-microvolt = <5000000>; 67 regulator-max-microvolt = <5000000>; 68 regulator-always-on; 69 regulator-boot-on; 70 }; 71 72 mmc1_fixed_power: regulator3 { 73 compatible = "regulator-fixed"; 74 regulator-name = "mmc1_power"; 75 regulator-min-microvolt = <3300000>; 76 regulator-max-microvolt = <3300000>; 77 }; 78 79 mmc1_fixed_io: regulator4 { 80 compatible = "regulator-fixed"; 81 regulator-name = "mmc1_io"; 82 regulator-min-microvolt = <1800000>; 83 regulator-max-microvolt = <1800000>; 84 }; 85 86 pp1800_alw: regulator5 { 87 compatible = "regulator-fixed"; 88 regulator-name = "pp1800_alw"; 89 regulator-always-on; 90 regulator-boot-on; 91 regulator-min-microvolt = <1800000>; 92 regulator-max-microvolt = <1800000>; 93 }; 94 95 pp3300_alw: regulator6 { 96 compatible = "regulator-fixed"; 97 regulator-name = "pp3300_alw"; 98 regulator-always-on; 99 regulator-boot-on; 100 regulator-min-microvolt = <3300000>; 101 regulator-max-microvolt = <3300000>; 102 }; 103 104 reserved_memory: reserved-memory { 105 #address-cells = <2>; 106 #size-cells = <2>; 107 ranges; 108 109 scp_mem_reserved: scp_mem_region { 110 compatible = "shared-dma-pool"; 111 reg = <0 0x50000000 0 0x2900000>; 112 no-map; 113 }; 114 }; 115 116 max98357a: codec0 { 117 compatible = "maxim,max98357a"; 118 sdmode-gpios = <&pio 175 0>; 119 }; 120 121 btsco: codec1 { 122 compatible = "linux,bt-sco"; 123 }; 124 125 wifi_pwrseq: wifi-pwrseq { 126 compatible = "mmc-pwrseq-simple"; 127 pinctrl-names = "default"; 128 pinctrl-0 = <&wifi_pins_pwrseq>; 129 130 /* Toggle WIFI_ENABLE to reset the chip. */ 131 reset-gpios = <&pio 119 1>; 132 }; 133 134 wifi_wakeup: wifi-wakeup { 135 compatible = "gpio-keys"; 136 pinctrl-names = "default"; 137 pinctrl-0 = <&wifi_pins_wakeup>; 138 139 wowlan { 140 label = "Wake on WiFi"; 141 gpios = <&pio 113 GPIO_ACTIVE_HIGH>; 142 linux,code = <KEY_WAKEUP>; 143 wakeup-source; 144 }; 145 }; 146 147 tboard_thermistor1: thermal-sensor1 { 148 compatible = "generic-adc-thermal"; 149 #thermal-sensor-cells = <0>; 150 io-channels = <&auxadc 0>; 151 io-channel-names = "sensor-channel"; 152 temperature-lookup-table = < (-5000) 4241 153 0 4063 154 5000 3856 155 10000 3621 156 15000 3364 157 20000 3091 158 25000 2810 159 30000 2526 160 35000 2247 161 40000 1982 162 45000 1734 163 50000 1507 164 55000 1305 165 60000 1122 166 65000 964 167 70000 827 168 75000 710 169 80000 606 170 85000 519 171 90000 445 172 95000 382 173 100000 330 174 105000 284 175 110000 245 176 115000 213 177 120000 183 178 125000 161>; 179 }; 180 181 tboard_thermistor2: thermal-sensor2 { 182 compatible = "generic-adc-thermal"; 183 #thermal-sensor-cells = <0>; 184 io-channels = <&auxadc 1>; 185 io-channel-names = "sensor-channel"; 186 temperature-lookup-table = < (-5000) 4241 187 0 4063 188 5000 3856 189 10000 3621 190 15000 3364 191 20000 3091 192 25000 2810 193 30000 2526 194 35000 2247 195 40000 1982 196 45000 1734 197 50000 1507 198 55000 1305 199 60000 1122 200 65000 964 201 70000 827 202 75000 710 203 80000 606 204 85000 519 205 90000 445 206 95000 382 207 100000 330 208 105000 284 209 110000 245 210 115000 213 211 120000 183 212 125000 161>; 213 }; 214}; 215 216&auxadc { 217 status = "okay"; 218}; 219 220&cpu0 { 221 proc-supply = <&mt6358_vproc12_reg>; 222}; 223 224&cpu1 { 225 proc-supply = <&mt6358_vproc12_reg>; 226}; 227 228&cpu2 { 229 proc-supply = <&mt6358_vproc12_reg>; 230}; 231 232&cpu3 { 233 proc-supply = <&mt6358_vproc12_reg>; 234}; 235 236&cpu4 { 237 proc-supply = <&mt6358_vproc11_reg>; 238}; 239 240&cpu5 { 241 proc-supply = <&mt6358_vproc11_reg>; 242}; 243 244&cpu6 { 245 proc-supply = <&mt6358_vproc11_reg>; 246}; 247 248&cpu7 { 249 proc-supply = <&mt6358_vproc11_reg>; 250}; 251 252&dsi0 { 253 status = "okay"; 254 #address-cells = <1>; 255 #size-cells = <0>; 256 panel: panel@0 { 257 /* compatible will be set in board dts */ 258 reg = <0>; 259 enable-gpios = <&pio 45 0>; 260 pinctrl-names = "default"; 261 pinctrl-0 = <&panel_pins_default>; 262 avdd-supply = <&ppvarn_lcd>; 263 avee-supply = <&ppvarp_lcd>; 264 pp1800-supply = <&pp1800_lcd>; 265 backlight = <&backlight_lcd0>; 266 port { 267 panel_in: endpoint { 268 remote-endpoint = <&dsi_out>; 269 }; 270 }; 271 }; 272 273 ports { 274 port { 275 dsi_out: endpoint { 276 remote-endpoint = <&panel_in>; 277 }; 278 }; 279 }; 280}; 281 282&i2c0 { 283 pinctrl-names = "default"; 284 pinctrl-0 = <&i2c0_pins>; 285 status = "okay"; 286 clock-frequency = <400000>; 287 #address-cells = <1>; 288 #size-cells = <0>; 289}; 290 291&i2c1 { 292 pinctrl-names = "default"; 293 pinctrl-0 = <&i2c1_pins>; 294 status = "okay"; 295 clock-frequency = <100000>; 296}; 297 298&i2c3 { 299 pinctrl-names = "default"; 300 pinctrl-0 = <&i2c3_pins>; 301 status = "okay"; 302 clock-frequency = <100000>; 303 #address-cells = <1>; 304 #size-cells = <0>; 305}; 306 307&i2c5 { 308 pinctrl-names = "default"; 309 pinctrl-0 = <&i2c5_pins>; 310 status = "okay"; 311 clock-frequency = <100000>; 312 #address-cells = <1>; 313 #size-cells = <0>; 314}; 315 316&i2c6 { 317 pinctrl-names = "default"; 318 pinctrl-0 = <&i2c6_pins>; 319 status = "okay"; 320 clock-frequency = <100000>; 321}; 322 323&mipi_tx0 { 324 status = "okay"; 325}; 326 327&mmc0 { 328 status = "okay"; 329 pinctrl-names = "default", "state_uhs"; 330 pinctrl-0 = <&mmc0_pins_default>; 331 pinctrl-1 = <&mmc0_pins_uhs>; 332 bus-width = <8>; 333 max-frequency = <200000000>; 334 cap-mmc-highspeed; 335 mmc-hs200-1_8v; 336 mmc-hs400-1_8v; 337 cap-mmc-hw-reset; 338 no-sdio; 339 no-sd; 340 hs400-ds-delay = <0x12814>; 341 vmmc-supply = <&mt6358_vemc_reg>; 342 vqmmc-supply = <&mt6358_vio18_reg>; 343 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>; 344 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>; 345 non-removable; 346}; 347 348&mmc1 { 349 status = "okay"; 350 pinctrl-names = "default", "state_uhs"; 351 pinctrl-0 = <&mmc1_pins_default>; 352 pinctrl-1 = <&mmc1_pins_uhs>; 353 vmmc-supply = <&mmc1_fixed_power>; 354 vqmmc-supply = <&mmc1_fixed_io>; 355 mmc-pwrseq = <&wifi_pwrseq>; 356 bus-width = <4>; 357 max-frequency = <200000000>; 358 drv-type = <2>; 359 cap-sd-highspeed; 360 sd-uhs-sdr50; 361 sd-uhs-sdr104; 362 keep-power-in-suspend; 363 enable-sdio-wakeup; 364 cap-sdio-irq; 365 non-removable; 366 no-mmc; 367 no-sd; 368 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>; 369 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>; 370 #address-cells = <1>; 371 #size-cells = <0>; 372 373 qca_wifi: qca-wifi@1 { 374 compatible = "qcom,ath10k"; 375 reg = <1>; 376 }; 377}; 378 379&mt6358_vdram2_reg { 380 regulator-always-on; 381}; 382 383&mt6358codec { 384 Avdd-supply = <&mt6358_vaud28_reg>; 385}; 386 387&mt6358_vsim1_reg { 388 regulator-min-microvolt = <2700000>; 389 regulator-max-microvolt = <2700000>; 390}; 391 392&mt6358_vsim2_reg { 393 regulator-min-microvolt = <2700000>; 394 regulator-max-microvolt = <2700000>; 395}; 396 397&pio { 398 bt_pins: bt-pins { 399 pins_bt_en { 400 pinmux = <PINMUX_GPIO120__FUNC_GPIO120>; 401 output-low; 402 }; 403 }; 404 405 ec_ap_int_odl: ec_ap_int_odl { 406 pins1 { 407 pinmux = <PINMUX_GPIO151__FUNC_GPIO151>; 408 input-enable; 409 bias-pull-up; 410 }; 411 }; 412 413 h1_int_od_l: h1_int_od_l { 414 pins1 { 415 pinmux = <PINMUX_GPIO153__FUNC_GPIO153>; 416 input-enable; 417 }; 418 }; 419 420 i2c0_pins: i2c0 { 421 pins_bus { 422 pinmux = <PINMUX_GPIO82__FUNC_SDA0>, 423 <PINMUX_GPIO83__FUNC_SCL0>; 424 mediatek,pull-up-adv = <3>; 425 mediatek,drive-strength-adv = <00>; 426 }; 427 }; 428 429 i2c1_pins: i2c1 { 430 pins_bus { 431 pinmux = <PINMUX_GPIO81__FUNC_SDA1>, 432 <PINMUX_GPIO84__FUNC_SCL1>; 433 mediatek,pull-up-adv = <3>; 434 mediatek,drive-strength-adv = <00>; 435 }; 436 }; 437 438 i2c2_pins: i2c2 { 439 pins_bus { 440 pinmux = <PINMUX_GPIO103__FUNC_SCL2>, 441 <PINMUX_GPIO104__FUNC_SDA2>; 442 bias-disable; 443 mediatek,drive-strength-adv = <00>; 444 }; 445 }; 446 447 i2c3_pins: i2c3 { 448 pins_bus { 449 pinmux = <PINMUX_GPIO50__FUNC_SCL3>, 450 <PINMUX_GPIO51__FUNC_SDA3>; 451 mediatek,pull-up-adv = <3>; 452 mediatek,drive-strength-adv = <00>; 453 }; 454 }; 455 456 i2c4_pins: i2c4 { 457 pins_bus { 458 pinmux = <PINMUX_GPIO105__FUNC_SCL4>, 459 <PINMUX_GPIO106__FUNC_SDA4>; 460 bias-disable; 461 mediatek,drive-strength-adv = <00>; 462 }; 463 }; 464 465 i2c5_pins: i2c5 { 466 pins_bus { 467 pinmux = <PINMUX_GPIO48__FUNC_SCL5>, 468 <PINMUX_GPIO49__FUNC_SDA5>; 469 mediatek,pull-up-adv = <3>; 470 mediatek,drive-strength-adv = <00>; 471 }; 472 }; 473 474 i2c6_pins: i2c6 { 475 pins_bus { 476 pinmux = <PINMUX_GPIO11__FUNC_SCL6>, 477 <PINMUX_GPIO12__FUNC_SDA6>; 478 bias-disable; 479 }; 480 }; 481 482 mmc0_pins_default: mmc0-pins-default { 483 pins_cmd_dat { 484 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, 485 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, 486 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, 487 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>, 488 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>, 489 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>, 490 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>, 491 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>, 492 <PINMUX_GPIO122__FUNC_MSDC0_CMD>; 493 input-enable; 494 drive-strength = <MTK_DRIVE_14mA>; 495 mediatek,pull-up-adv = <01>; 496 }; 497 498 pins_clk { 499 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; 500 drive-strength = <MTK_DRIVE_14mA>; 501 mediatek,pull-down-adv = <10>; 502 }; 503 504 pins_rst { 505 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; 506 drive-strength = <MTK_DRIVE_14mA>; 507 mediatek,pull-down-adv = <01>; 508 }; 509 }; 510 511 mmc0_pins_uhs: mmc0-pins-uhs { 512 pins_cmd_dat { 513 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, 514 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, 515 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, 516 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>, 517 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>, 518 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>, 519 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>, 520 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>, 521 <PINMUX_GPIO122__FUNC_MSDC0_CMD>; 522 input-enable; 523 drive-strength = <MTK_DRIVE_14mA>; 524 mediatek,pull-up-adv = <01>; 525 }; 526 527 pins_clk { 528 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; 529 drive-strength = <MTK_DRIVE_14mA>; 530 mediatek,pull-down-adv = <10>; 531 }; 532 533 pins_ds { 534 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>; 535 drive-strength = <MTK_DRIVE_14mA>; 536 mediatek,pull-down-adv = <10>; 537 }; 538 539 pins_rst { 540 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; 541 drive-strength = <MTK_DRIVE_14mA>; 542 mediatek,pull-up-adv = <01>; 543 }; 544 }; 545 546 mmc1_pins_default: mmc1-pins-default { 547 pins_cmd_dat { 548 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, 549 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, 550 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, 551 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>, 552 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>; 553 input-enable; 554 mediatek,pull-up-adv = <10>; 555 }; 556 557 pins_clk { 558 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; 559 input-enable; 560 mediatek,pull-down-adv = <10>; 561 }; 562 }; 563 564 mmc1_pins_uhs: mmc1-pins-uhs { 565 pins_cmd_dat { 566 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, 567 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, 568 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, 569 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>, 570 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>; 571 drive-strength = <MTK_DRIVE_6mA>; 572 input-enable; 573 mediatek,pull-up-adv = <10>; 574 }; 575 576 pins_clk { 577 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; 578 drive-strength = <MTK_DRIVE_8mA>; 579 mediatek,pull-down-adv = <10>; 580 input-enable; 581 }; 582 }; 583 584 panel_pins_default: panel_pins_default { 585 panel_reset { 586 pinmux = <PINMUX_GPIO45__FUNC_GPIO45>; 587 output-low; 588 bias-pull-up; 589 }; 590 }; 591 592 pwm0_pin_default: pwm0_pin_default { 593 pins1 { 594 pinmux = <PINMUX_GPIO176__FUNC_GPIO176>; 595 output-high; 596 bias-pull-up; 597 }; 598 pins2 { 599 pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>; 600 }; 601 }; 602 603 scp_pins: scp { 604 pins_scp_uart { 605 pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>, 606 <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>; 607 }; 608 }; 609 610 spi0_pins: spi0 { 611 pins_spi{ 612 pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>, 613 <PINMUX_GPIO86__FUNC_GPIO86>, 614 <PINMUX_GPIO87__FUNC_SPI0_MO>, 615 <PINMUX_GPIO88__FUNC_SPI0_CLK>; 616 bias-disable; 617 }; 618 }; 619 620 spi1_pins: spi1 { 621 pins_spi{ 622 pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>, 623 <PINMUX_GPIO162__FUNC_SPI1_A_CSB>, 624 <PINMUX_GPIO163__FUNC_SPI1_A_MO>, 625 <PINMUX_GPIO164__FUNC_SPI1_A_CLK>; 626 bias-disable; 627 }; 628 }; 629 630 spi2_pins: spi2 { 631 pins_spi{ 632 pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>, 633 <PINMUX_GPIO1__FUNC_SPI2_MO>, 634 <PINMUX_GPIO2__FUNC_SPI2_CLK>; 635 bias-disable; 636 }; 637 pins_spi_mi { 638 pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>; 639 mediatek,pull-down-adv = <00>; 640 }; 641 }; 642 643 spi3_pins: spi3 { 644 pins_spi{ 645 pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>, 646 <PINMUX_GPIO22__FUNC_SPI3_CSB>, 647 <PINMUX_GPIO23__FUNC_SPI3_MO>, 648 <PINMUX_GPIO24__FUNC_SPI3_CLK>; 649 bias-disable; 650 }; 651 }; 652 653 spi4_pins: spi4 { 654 pins_spi{ 655 pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>, 656 <PINMUX_GPIO18__FUNC_SPI4_CSB>, 657 <PINMUX_GPIO19__FUNC_SPI4_MO>, 658 <PINMUX_GPIO20__FUNC_SPI4_CLK>; 659 bias-disable; 660 }; 661 }; 662 663 spi5_pins: spi5 { 664 pins_spi{ 665 pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>, 666 <PINMUX_GPIO14__FUNC_SPI5_CSB>, 667 <PINMUX_GPIO15__FUNC_SPI5_MO>, 668 <PINMUX_GPIO16__FUNC_SPI5_CLK>; 669 bias-disable; 670 }; 671 }; 672 673 uart0_pins_default: uart0-pins-default { 674 pins_rx { 675 pinmux = <PINMUX_GPIO95__FUNC_URXD0>; 676 input-enable; 677 bias-pull-up; 678 }; 679 pins_tx { 680 pinmux = <PINMUX_GPIO96__FUNC_UTXD0>; 681 }; 682 }; 683 684 uart1_pins_default: uart1-pins-default { 685 pins_rx { 686 pinmux = <PINMUX_GPIO121__FUNC_URXD1>; 687 input-enable; 688 bias-pull-up; 689 }; 690 pins_tx { 691 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>; 692 }; 693 pins_rts { 694 pinmux = <PINMUX_GPIO47__FUNC_URTS1>; 695 output-enable; 696 }; 697 pins_cts { 698 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>; 699 input-enable; 700 }; 701 }; 702 703 uart1_pins_sleep: uart1-pins-sleep { 704 pins_rx { 705 pinmux = <PINMUX_GPIO121__FUNC_GPIO121>; 706 input-enable; 707 bias-pull-up; 708 }; 709 pins_tx { 710 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>; 711 }; 712 pins_rts { 713 pinmux = <PINMUX_GPIO47__FUNC_URTS1>; 714 output-enable; 715 }; 716 pins_cts { 717 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>; 718 input-enable; 719 }; 720 }; 721 722 wifi_pins_pwrseq: wifi-pins-pwrseq { 723 pins_wifi_enable { 724 pinmux = <PINMUX_GPIO119__FUNC_GPIO119>; 725 output-low; 726 }; 727 }; 728 729 wifi_pins_wakeup: wifi-pins-wakeup { 730 pins_wifi_wakeup { 731 pinmux = <PINMUX_GPIO113__FUNC_GPIO113>; 732 input-enable; 733 }; 734 }; 735}; 736 737&pwm0 { 738 status = "okay"; 739 pinctrl-names = "default"; 740 pinctrl-0 = <&pwm0_pin_default>; 741}; 742 743&scp { 744 status = "okay"; 745 pinctrl-names = "default"; 746 pinctrl-0 = <&scp_pins>; 747 748 cros_ec { 749 compatible = "google,cros-ec-rpmsg"; 750 mtk,rpmsg-name = "cros-ec-rpmsg"; 751 }; 752}; 753 754&mfg { 755 domain-supply = <&mt6358_vgpu_reg>; 756}; 757 758&soc_data { 759 status = "okay"; 760}; 761 762&spi0 { 763 pinctrl-names = "default"; 764 pinctrl-0 = <&spi0_pins>; 765 mediatek,pad-select = <0>; 766 status = "okay"; 767 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>; 768 769 cr50@0 { 770 compatible = "google,cr50"; 771 reg = <0>; 772 spi-max-frequency = <1000000>; 773 pinctrl-names = "default"; 774 pinctrl-0 = <&h1_int_od_l>; 775 interrupt-parent = <&pio>; 776 interrupts = <153 IRQ_TYPE_EDGE_RISING>; 777 }; 778}; 779 780&spi1 { 781 pinctrl-names = "default"; 782 pinctrl-0 = <&spi1_pins>; 783 mediatek,pad-select = <0>; 784 status = "okay"; 785 786 w25q64dw: spi-flash@0 { 787 compatible = "winbond,w25q64dw", "jedec,spi-nor"; 788 reg = <0>; 789 spi-max-frequency = <25000000>; 790 }; 791}; 792 793&spi2 { 794 pinctrl-names = "default"; 795 pinctrl-0 = <&spi2_pins>; 796 mediatek,pad-select = <0>; 797 status = "okay"; 798 799 cros_ec: cros-ec@0 { 800 compatible = "google,cros-ec-spi"; 801 reg = <0>; 802 spi-max-frequency = <3000000>; 803 interrupt-parent = <&pio>; 804 interrupts = <151 IRQ_TYPE_LEVEL_LOW>; 805 pinctrl-names = "default"; 806 pinctrl-0 = <&ec_ap_int_odl>; 807 808 i2c_tunnel: i2c-tunnel { 809 compatible = "google,cros-ec-i2c-tunnel"; 810 google,remote-bus = <1>; 811 #address-cells = <1>; 812 #size-cells = <0>; 813 }; 814 815 usbc_extcon: extcon0 { 816 compatible = "google,extcon-usbc-cros-ec"; 817 google,usb-port-id = <0>; 818 }; 819 }; 820}; 821 822&spi3 { 823 pinctrl-names = "default"; 824 pinctrl-0 = <&spi3_pins>; 825 mediatek,pad-select = <0>; 826 status = "disabled"; 827}; 828 829&spi4 { 830 pinctrl-names = "default"; 831 pinctrl-0 = <&spi4_pins>; 832 mediatek,pad-select = <0>; 833 status = "disabled"; 834}; 835 836&spi5 { 837 pinctrl-names = "default"; 838 pinctrl-0 = <&spi5_pins>; 839 mediatek,pad-select = <0>; 840 status = "disabled"; 841}; 842 843&ssusb { 844 dr_mode = "host"; 845 wakeup-source; 846 vusb33-supply = <&mt6358_vusb_reg>; 847 status = "okay"; 848}; 849 850&u3phy { 851 status = "okay"; 852}; 853 854&uart0 { 855 pinctrl-names = "default"; 856 pinctrl-0 = <&uart0_pins_default>; 857 status = "okay"; 858}; 859 860&uart1 { 861 pinctrl-names = "default", "sleep"; 862 pinctrl-0 = <&uart1_pins_default>; 863 pinctrl-1 = <&uart1_pins_sleep>; 864 status = "okay"; 865 interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>, 866 <&pio 121 IRQ_TYPE_EDGE_FALLING>; 867 868 bluetooth: bluetooth { 869 pinctrl-names = "default"; 870 pinctrl-0 = <&bt_pins>; 871 status = "okay"; 872 compatible = "qcom,qca6174-bt"; 873 enable-gpios = <&pio 120 0>; 874 clocks = <&clk32k>; 875 firmware-name = "nvm_00440302_i2s.bin"; 876 }; 877}; 878 879&usb_host { 880 #address-cells = <1>; 881 #size-cells = <0>; 882 vusb33-supply = <&mt6358_vusb_reg>; 883 status = "okay"; 884 885 hub@1 { 886 compatible = "usb5e3,610"; 887 reg = <1>; 888 }; 889}; 890 891#include <arm/cros-ec-keyboard.dtsi> 892#include <arm/cros-ec-sbs.dtsi> 893