1ef484dfcSTim Harvey// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2ef484dfcSTim Harvey/* 3ef484dfcSTim Harvey * Copyright 2021 Gateworks Corporation 4ef484dfcSTim Harvey */ 5ef484dfcSTim Harvey 6ef484dfcSTim Harvey/dts-v1/; 7ef484dfcSTim Harvey 8ef484dfcSTim Harvey#include <dt-bindings/gpio/gpio.h> 9ef484dfcSTim Harvey#include <dt-bindings/input/linux-event-codes.h> 10ef484dfcSTim Harvey#include <dt-bindings/leds/common.h> 11ef484dfcSTim Harvey#include <dt-bindings/net/ti-dp83867.h> 12ef484dfcSTim Harvey 13ef484dfcSTim Harvey#include "imx8mn.dtsi" 14ef484dfcSTim Harvey 15ef484dfcSTim Harvey/ { 16ef484dfcSTim Harvey model = "Gateworks Venice GW7902 i.MX8MN board"; 17ef484dfcSTim Harvey compatible = "gw,imx8mn-gw7902", "fsl,imx8mn"; 18ef484dfcSTim Harvey 19ef484dfcSTim Harvey aliases { 20ef484dfcSTim Harvey usb0 = &usbotg1; 21ef484dfcSTim Harvey }; 22ef484dfcSTim Harvey 23ef484dfcSTim Harvey chosen { 24ef484dfcSTim Harvey stdout-path = &uart2; 25ef484dfcSTim Harvey }; 26ef484dfcSTim Harvey 27ef484dfcSTim Harvey memory@40000000 { 28ef484dfcSTim Harvey device_type = "memory"; 29ef484dfcSTim Harvey reg = <0x0 0x40000000 0 0x80000000>; 30ef484dfcSTim Harvey }; 31ef484dfcSTim Harvey 32ef484dfcSTim Harvey can20m: can20m { 33ef484dfcSTim Harvey compatible = "fixed-clock"; 34ef484dfcSTim Harvey #clock-cells = <0>; 35ef484dfcSTim Harvey clock-frequency = <20000000>; 36ef484dfcSTim Harvey clock-output-names = "can20m"; 37ef484dfcSTim Harvey }; 38ef484dfcSTim Harvey 39ef484dfcSTim Harvey gpio-keys { 40ef484dfcSTim Harvey compatible = "gpio-keys"; 41ef484dfcSTim Harvey 42ef484dfcSTim Harvey user-pb { 43ef484dfcSTim Harvey label = "user_pb"; 44ef484dfcSTim Harvey gpios = <&gpio 2 GPIO_ACTIVE_LOW>; 45ef484dfcSTim Harvey linux,code = <BTN_0>; 46ef484dfcSTim Harvey }; 47ef484dfcSTim Harvey 48ef484dfcSTim Harvey user-pb1x { 49ef484dfcSTim Harvey label = "user_pb1x"; 50ef484dfcSTim Harvey linux,code = <BTN_1>; 51ef484dfcSTim Harvey interrupt-parent = <&gsc>; 52ef484dfcSTim Harvey interrupts = <0>; 53ef484dfcSTim Harvey }; 54ef484dfcSTim Harvey 55ef484dfcSTim Harvey key-erased { 56ef484dfcSTim Harvey label = "key_erased"; 57ef484dfcSTim Harvey linux,code = <BTN_2>; 58ef484dfcSTim Harvey interrupt-parent = <&gsc>; 59ef484dfcSTim Harvey interrupts = <1>; 60ef484dfcSTim Harvey }; 61ef484dfcSTim Harvey 62ef484dfcSTim Harvey eeprom-wp { 63ef484dfcSTim Harvey label = "eeprom_wp"; 64ef484dfcSTim Harvey linux,code = <BTN_3>; 65ef484dfcSTim Harvey interrupt-parent = <&gsc>; 66ef484dfcSTim Harvey interrupts = <2>; 67ef484dfcSTim Harvey }; 68ef484dfcSTim Harvey 69ef484dfcSTim Harvey tamper { 70ef484dfcSTim Harvey label = "tamper"; 71ef484dfcSTim Harvey linux,code = <BTN_4>; 72ef484dfcSTim Harvey interrupt-parent = <&gsc>; 73ef484dfcSTim Harvey interrupts = <5>; 74ef484dfcSTim Harvey }; 75ef484dfcSTim Harvey 76ef484dfcSTim Harvey switch-hold { 77ef484dfcSTim Harvey label = "switch_hold"; 78ef484dfcSTim Harvey linux,code = <BTN_5>; 79ef484dfcSTim Harvey interrupt-parent = <&gsc>; 80ef484dfcSTim Harvey interrupts = <7>; 81ef484dfcSTim Harvey }; 82ef484dfcSTim Harvey }; 83ef484dfcSTim Harvey 84ef484dfcSTim Harvey led-controller { 85ef484dfcSTim Harvey compatible = "gpio-leds"; 86ef484dfcSTim Harvey pinctrl-names = "default"; 87ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gpio_leds>; 88ef484dfcSTim Harvey 89ef484dfcSTim Harvey led-0 { 90ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 91ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 92ef484dfcSTim Harvey label = "panel1"; 93ef484dfcSTim Harvey gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; 94ef484dfcSTim Harvey default-state = "off"; 95ef484dfcSTim Harvey }; 96ef484dfcSTim Harvey 97ef484dfcSTim Harvey led-1 { 98ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 99ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 100ef484dfcSTim Harvey label = "panel2"; 101ef484dfcSTim Harvey gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 102ef484dfcSTim Harvey default-state = "off"; 103ef484dfcSTim Harvey }; 104ef484dfcSTim Harvey 105ef484dfcSTim Harvey led-2 { 106ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 107ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 108ef484dfcSTim Harvey label = "panel3"; 109ef484dfcSTim Harvey gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 110ef484dfcSTim Harvey default-state = "off"; 111ef484dfcSTim Harvey }; 112ef484dfcSTim Harvey 113ef484dfcSTim Harvey led-3 { 114ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 115ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 116ef484dfcSTim Harvey label = "panel4"; 117ef484dfcSTim Harvey gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; 118ef484dfcSTim Harvey default-state = "off"; 119ef484dfcSTim Harvey }; 120ef484dfcSTim Harvey 121ef484dfcSTim Harvey led-4 { 122ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 123ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 124ef484dfcSTim Harvey label = "panel5"; 125ef484dfcSTim Harvey gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 126ef484dfcSTim Harvey default-state = "off"; 127ef484dfcSTim Harvey }; 128ef484dfcSTim Harvey }; 129ef484dfcSTim Harvey 130ef484dfcSTim Harvey pps { 131ef484dfcSTim Harvey compatible = "pps-gpio"; 132ef484dfcSTim Harvey pinctrl-names = "default"; 133ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pps>; 134ef484dfcSTim Harvey gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; 135ef484dfcSTim Harvey status = "okay"; 136ef484dfcSTim Harvey }; 137ef484dfcSTim Harvey 138ef484dfcSTim Harvey reg_3p3v: regulator-3p3v { 139ef484dfcSTim Harvey compatible = "regulator-fixed"; 140ef484dfcSTim Harvey regulator-name = "3P3V"; 141ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 142ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 143ef484dfcSTim Harvey regulator-always-on; 144ef484dfcSTim Harvey }; 145ef484dfcSTim Harvey 146ef484dfcSTim Harvey reg_usb1_vbus: regulator-usb1 { 147ef484dfcSTim Harvey compatible = "regulator-fixed"; 148ef484dfcSTim Harvey pinctrl-names = "default"; 149ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_usb1>; 150ef484dfcSTim Harvey regulator-name = "usb_usb1_vbus"; 151ef484dfcSTim Harvey gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>; 152ef484dfcSTim Harvey enable-active-high; 153ef484dfcSTim Harvey regulator-min-microvolt = <5000000>; 154ef484dfcSTim Harvey regulator-max-microvolt = <5000000>; 155ef484dfcSTim Harvey }; 156ef484dfcSTim Harvey 157ef484dfcSTim Harvey reg_wifi: regulator-wifi { 158ef484dfcSTim Harvey compatible = "regulator-fixed"; 159ef484dfcSTim Harvey pinctrl-names = "default"; 160ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_wl>; 161ef484dfcSTim Harvey regulator-name = "wifi"; 162ef484dfcSTim Harvey gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 163ef484dfcSTim Harvey enable-active-high; 164ef484dfcSTim Harvey startup-delay-us = <100>; 165ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 166ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 167ef484dfcSTim Harvey }; 168ef484dfcSTim Harvey}; 169ef484dfcSTim Harvey 170ef484dfcSTim Harvey&A53_0 { 171ef484dfcSTim Harvey cpu-supply = <&buck2>; 172ef484dfcSTim Harvey}; 173ef484dfcSTim Harvey 174ef484dfcSTim Harvey&A53_1 { 175ef484dfcSTim Harvey cpu-supply = <&buck2>; 176ef484dfcSTim Harvey}; 177ef484dfcSTim Harvey 178ef484dfcSTim Harvey&A53_2 { 179ef484dfcSTim Harvey cpu-supply = <&buck2>; 180ef484dfcSTim Harvey}; 181ef484dfcSTim Harvey 182ef484dfcSTim Harvey&A53_3 { 183ef484dfcSTim Harvey cpu-supply = <&buck2>; 184ef484dfcSTim Harvey}; 185ef484dfcSTim Harvey 186ef484dfcSTim Harvey&ddrc { 187ef484dfcSTim Harvey operating-points-v2 = <&ddrc_opp_table>; 188ef484dfcSTim Harvey 189ef484dfcSTim Harvey ddrc_opp_table: opp-table { 190ef484dfcSTim Harvey compatible = "operating-points-v2"; 191ef484dfcSTim Harvey 192ef484dfcSTim Harvey opp-25M { 193ef484dfcSTim Harvey opp-hz = /bits/ 64 <25000000>; 194ef484dfcSTim Harvey }; 195ef484dfcSTim Harvey 196ef484dfcSTim Harvey opp-100M { 197ef484dfcSTim Harvey opp-hz = /bits/ 64 <100000000>; 198ef484dfcSTim Harvey }; 199ef484dfcSTim Harvey 200ef484dfcSTim Harvey opp-750M { 201ef484dfcSTim Harvey opp-hz = /bits/ 64 <750000000>; 202ef484dfcSTim Harvey }; 203ef484dfcSTim Harvey }; 204ef484dfcSTim Harvey}; 205ef484dfcSTim Harvey 206ef484dfcSTim Harvey&ecspi1 { 207ef484dfcSTim Harvey pinctrl-names = "default"; 208ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi1>; 209ef484dfcSTim Harvey cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 210ef484dfcSTim Harvey status = "okay"; 211ef484dfcSTim Harvey 212ef484dfcSTim Harvey can@0 { 213ef484dfcSTim Harvey compatible = "microchip,mcp2515"; 214ef484dfcSTim Harvey reg = <0>; 215ef484dfcSTim Harvey clocks = <&can20m>; 216ef484dfcSTim Harvey oscillator-frequency = <20000000>; 217ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 218ef484dfcSTim Harvey interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 219ef484dfcSTim Harvey spi-max-frequency = <10000000>; 220ef484dfcSTim Harvey }; 221ef484dfcSTim Harvey}; 222ef484dfcSTim Harvey 2238cd449d7STim Harvey&disp_blk_ctrl { 2248cd449d7STim Harvey status = "disabled"; 2258cd449d7STim Harvey}; 2268cd449d7STim Harvey 227ef484dfcSTim Harvey/* off-board header */ 228ef484dfcSTim Harvey&ecspi2 { 229ef484dfcSTim Harvey pinctrl-names = "default"; 230ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi2>; 231ef484dfcSTim Harvey cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 232ef484dfcSTim Harvey status = "okay"; 233ef484dfcSTim Harvey}; 234ef484dfcSTim Harvey 235ef484dfcSTim Harvey&fec1 { 236ef484dfcSTim Harvey pinctrl-names = "default"; 237ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_fec1>; 238ef484dfcSTim Harvey phy-mode = "rgmii-id"; 239ef484dfcSTim Harvey phy-handle = <ðphy0>; 240ef484dfcSTim Harvey local-mac-address = [00 00 00 00 00 00]; 241ef484dfcSTim Harvey status = "okay"; 242ef484dfcSTim Harvey 243ef484dfcSTim Harvey mdio { 244ef484dfcSTim Harvey #address-cells = <1>; 245ef484dfcSTim Harvey #size-cells = <0>; 246ef484dfcSTim Harvey 247ef484dfcSTim Harvey ethphy0: ethernet-phy@0 { 248ef484dfcSTim Harvey compatible = "ethernet-phy-ieee802.3-c22"; 249ef484dfcSTim Harvey reg = <0>; 250ef484dfcSTim Harvey ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 251ef484dfcSTim Harvey ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 252ef484dfcSTim Harvey tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 253ef484dfcSTim Harvey rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 254ef484dfcSTim Harvey }; 255ef484dfcSTim Harvey }; 256ef484dfcSTim Harvey}; 257ef484dfcSTim Harvey 2589d46d9f7STim Harvey&gpio1 { 2599d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 2609d46d9f7STim Harvey "", "", "", "", "", "m2_reset", "", "m2_wdis#", 2619d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2629d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2639d46d9f7STim Harvey}; 2649d46d9f7STim Harvey 2659d46d9f7STim Harvey&gpio2 { 2669d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 2679d46d9f7STim Harvey "uart2_en#", "", "", "", "", "", "", "", 2689d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2699d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2709d46d9f7STim Harvey}; 2719d46d9f7STim Harvey 2729d46d9f7STim Harvey&gpio3 { 2739d46d9f7STim Harvey gpio-line-names = "", "m2_gdis#", "", "", "", "", "", "m2_off#", 2749d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2759d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2769d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2779d46d9f7STim Harvey}; 2789d46d9f7STim Harvey 2799d46d9f7STim Harvey&gpio4 { 2809d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 2819d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2829d46d9f7STim Harvey "", "", "", "", "", "app_gpio1", "", "uart1_rs485", 2839d46d9f7STim Harvey "", "uart1_term", "uart1_half", "app_gpio2", 2849d46d9f7STim Harvey "mipi_gpio1", "", "", ""; 2859d46d9f7STim Harvey}; 2869d46d9f7STim Harvey 2879d46d9f7STim Harvey&gpio5 { 2889d46d9f7STim Harvey gpio-line-names = "", "", "", "mipi_gpio4", 2899d46d9f7STim Harvey "mipi_gpio3", "mipi_gpio2", "", "", 2909d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2919d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2929d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2939d46d9f7STim Harvey}; 2949d46d9f7STim Harvey 2958cd449d7STim Harvey&gpu { 2968cd449d7STim Harvey status = "disabled"; 2978cd449d7STim Harvey}; 2988cd449d7STim Harvey 299ef484dfcSTim Harvey&i2c1 { 300ef484dfcSTim Harvey clock-frequency = <100000>; 301ef484dfcSTim Harvey pinctrl-names = "default"; 302ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c1>; 303ef484dfcSTim Harvey status = "okay"; 304ef484dfcSTim Harvey 305ef484dfcSTim Harvey gsc: gsc@20 { 306ef484dfcSTim Harvey compatible = "gw,gsc"; 307ef484dfcSTim Harvey reg = <0x20>; 308ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gsc>; 309ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 310ef484dfcSTim Harvey interrupts = <6 IRQ_TYPE_EDGE_FALLING>; 311ef484dfcSTim Harvey interrupt-controller; 312ef484dfcSTim Harvey #interrupt-cells = <1>; 313ef484dfcSTim Harvey 314ef484dfcSTim Harvey adc { 315ef484dfcSTim Harvey compatible = "gw,gsc-adc"; 316ef484dfcSTim Harvey #address-cells = <1>; 317ef484dfcSTim Harvey #size-cells = <0>; 318ef484dfcSTim Harvey 319ef484dfcSTim Harvey channel@6 { 320ef484dfcSTim Harvey gw,mode = <0>; 321ef484dfcSTim Harvey reg = <0x06>; 322ef484dfcSTim Harvey label = "temp"; 323ef484dfcSTim Harvey }; 324ef484dfcSTim Harvey 325ef484dfcSTim Harvey channel@8 { 326ef484dfcSTim Harvey gw,mode = <1>; 327ef484dfcSTim Harvey reg = <0x08>; 328ef484dfcSTim Harvey label = "vdd_bat"; 329ef484dfcSTim Harvey }; 330ef484dfcSTim Harvey 331ef484dfcSTim Harvey channel@82 { 332ef484dfcSTim Harvey gw,mode = <2>; 333ef484dfcSTim Harvey reg = <0x82>; 334ef484dfcSTim Harvey label = "vin"; 335ef484dfcSTim Harvey gw,voltage-divider-ohms = <22100 1000>; 336ef484dfcSTim Harvey gw,voltage-offset-microvolt = <700000>; 337ef484dfcSTim Harvey }; 338ef484dfcSTim Harvey 339ef484dfcSTim Harvey channel@84 { 340ef484dfcSTim Harvey gw,mode = <2>; 341ef484dfcSTim Harvey reg = <0x84>; 342ef484dfcSTim Harvey label = "vin_4p0"; 343ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 344ef484dfcSTim Harvey }; 345ef484dfcSTim Harvey 346ef484dfcSTim Harvey channel@86 { 347ef484dfcSTim Harvey gw,mode = <2>; 348ef484dfcSTim Harvey reg = <0x86>; 349ef484dfcSTim Harvey label = "vdd_3p3"; 350ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 351ef484dfcSTim Harvey }; 352ef484dfcSTim Harvey 353ef484dfcSTim Harvey channel@88 { 354ef484dfcSTim Harvey gw,mode = <2>; 355ef484dfcSTim Harvey reg = <0x88>; 356ef484dfcSTim Harvey label = "vdd_0p9"; 357ef484dfcSTim Harvey }; 358ef484dfcSTim Harvey 359ef484dfcSTim Harvey channel@8c { 360ef484dfcSTim Harvey gw,mode = <2>; 361ef484dfcSTim Harvey reg = <0x8c>; 362ef484dfcSTim Harvey label = "vdd_soc"; 363ef484dfcSTim Harvey }; 364ef484dfcSTim Harvey 365ef484dfcSTim Harvey channel@8e { 366ef484dfcSTim Harvey gw,mode = <2>; 367ef484dfcSTim Harvey reg = <0x8e>; 368ef484dfcSTim Harvey label = "vdd_arm"; 369ef484dfcSTim Harvey }; 370ef484dfcSTim Harvey 371ef484dfcSTim Harvey channel@90 { 372ef484dfcSTim Harvey gw,mode = <2>; 373ef484dfcSTim Harvey reg = <0x90>; 374ef484dfcSTim Harvey label = "vdd_1p8"; 375ef484dfcSTim Harvey }; 376ef484dfcSTim Harvey 377ef484dfcSTim Harvey channel@92 { 378ef484dfcSTim Harvey gw,mode = <2>; 379ef484dfcSTim Harvey reg = <0x92>; 380ef484dfcSTim Harvey label = "vdd_dram"; 381ef484dfcSTim Harvey }; 382ef484dfcSTim Harvey 383ef484dfcSTim Harvey channel@98 { 384ef484dfcSTim Harvey gw,mode = <2>; 385ef484dfcSTim Harvey reg = <0x98>; 386ef484dfcSTim Harvey label = "vdd_1p0"; 387ef484dfcSTim Harvey }; 388ef484dfcSTim Harvey 389ef484dfcSTim Harvey channel@9a { 390ef484dfcSTim Harvey gw,mode = <2>; 391ef484dfcSTim Harvey reg = <0x9a>; 392ef484dfcSTim Harvey label = "vdd_2p5"; 393ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 394ef484dfcSTim Harvey }; 395ef484dfcSTim Harvey 396ef484dfcSTim Harvey channel@a2 { 397ef484dfcSTim Harvey gw,mode = <2>; 398ef484dfcSTim Harvey reg = <0xa2>; 399ef484dfcSTim Harvey label = "vdd_gsc"; 400ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 401ef484dfcSTim Harvey }; 402ef484dfcSTim Harvey }; 403ef484dfcSTim Harvey }; 404ef484dfcSTim Harvey 405ef484dfcSTim Harvey gpio: gpio@23 { 406ef484dfcSTim Harvey compatible = "nxp,pca9555"; 407ef484dfcSTim Harvey reg = <0x23>; 408ef484dfcSTim Harvey gpio-controller; 409ef484dfcSTim Harvey #gpio-cells = <2>; 410ef484dfcSTim Harvey interrupt-parent = <&gsc>; 411ef484dfcSTim Harvey interrupts = <4>; 412ef484dfcSTim Harvey }; 413ef484dfcSTim Harvey 414ef484dfcSTim Harvey pmic@4b { 415ef484dfcSTim Harvey compatible = "rohm,bd71847"; 416ef484dfcSTim Harvey reg = <0x4b>; 417ef484dfcSTim Harvey pinctrl-names = "default"; 418ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pmic>; 419ef484dfcSTim Harvey interrupt-parent = <&gpio3>; 420ef484dfcSTim Harvey interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 421ef484dfcSTim Harvey rohm,reset-snvs-powered; 422ef484dfcSTim Harvey #clock-cells = <0>; 423ef484dfcSTim Harvey clocks = <&osc_32k 0>; 424ef484dfcSTim Harvey clock-output-names = "clk-32k-out"; 425ef484dfcSTim Harvey 426ef484dfcSTim Harvey regulators { 427ef484dfcSTim Harvey /* vdd_soc: 0.805-0.900V (typ=0.8V) */ 428ef484dfcSTim Harvey BUCK1 { 429ef484dfcSTim Harvey regulator-name = "buck1"; 430ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 431ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 432ef484dfcSTim Harvey regulator-boot-on; 433ef484dfcSTim Harvey regulator-always-on; 434ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 435ef484dfcSTim Harvey }; 436ef484dfcSTim Harvey 437ef484dfcSTim Harvey /* vdd_arm: 0.805-1.0V (typ=0.9V) */ 438ef484dfcSTim Harvey buck2: BUCK2 { 439ef484dfcSTim Harvey regulator-name = "buck2"; 440ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 441ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 442ef484dfcSTim Harvey regulator-boot-on; 443ef484dfcSTim Harvey regulator-always-on; 444ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 445ef484dfcSTim Harvey rohm,dvs-run-voltage = <1000000>; 446ef484dfcSTim Harvey rohm,dvs-idle-voltage = <900000>; 447ef484dfcSTim Harvey }; 448ef484dfcSTim Harvey 449ef484dfcSTim Harvey /* vdd_0p9: 0.805-1.0V (typ=0.9V) */ 450ef484dfcSTim Harvey BUCK3 { 451ef484dfcSTim Harvey regulator-name = "buck3"; 452ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 453ef484dfcSTim Harvey regulator-max-microvolt = <1350000>; 454ef484dfcSTim Harvey regulator-boot-on; 455ef484dfcSTim Harvey regulator-always-on; 456ef484dfcSTim Harvey }; 457ef484dfcSTim Harvey 458ef484dfcSTim Harvey /* vdd_3p3 */ 459ef484dfcSTim Harvey BUCK4 { 460ef484dfcSTim Harvey regulator-name = "buck4"; 461ef484dfcSTim Harvey regulator-min-microvolt = <3000000>; 462ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 463ef484dfcSTim Harvey regulator-boot-on; 464ef484dfcSTim Harvey regulator-always-on; 465ef484dfcSTim Harvey }; 466ef484dfcSTim Harvey 467ef484dfcSTim Harvey /* vdd_1p8 */ 468ef484dfcSTim Harvey BUCK5 { 469ef484dfcSTim Harvey regulator-name = "buck5"; 470ef484dfcSTim Harvey regulator-min-microvolt = <1605000>; 471ef484dfcSTim Harvey regulator-max-microvolt = <1995000>; 472ef484dfcSTim Harvey regulator-boot-on; 473ef484dfcSTim Harvey regulator-always-on; 474ef484dfcSTim Harvey }; 475ef484dfcSTim Harvey 476ef484dfcSTim Harvey /* vdd_dram */ 477ef484dfcSTim Harvey BUCK6 { 478ef484dfcSTim Harvey regulator-name = "buck6"; 479ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 480ef484dfcSTim Harvey regulator-max-microvolt = <1400000>; 481ef484dfcSTim Harvey regulator-boot-on; 482ef484dfcSTim Harvey regulator-always-on; 483ef484dfcSTim Harvey }; 484ef484dfcSTim Harvey 485ef484dfcSTim Harvey /* nvcc_snvs_1p8 */ 486ef484dfcSTim Harvey LDO1 { 487ef484dfcSTim Harvey regulator-name = "ldo1"; 488ef484dfcSTim Harvey regulator-min-microvolt = <1600000>; 489ef484dfcSTim Harvey regulator-max-microvolt = <1900000>; 490ef484dfcSTim Harvey regulator-boot-on; 491ef484dfcSTim Harvey regulator-always-on; 492ef484dfcSTim Harvey }; 493ef484dfcSTim Harvey 494ef484dfcSTim Harvey /* vdd_snvs_0p8 */ 495ef484dfcSTim Harvey LDO2 { 496ef484dfcSTim Harvey regulator-name = "ldo2"; 497ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 498ef484dfcSTim Harvey regulator-max-microvolt = <900000>; 499ef484dfcSTim Harvey regulator-boot-on; 500ef484dfcSTim Harvey regulator-always-on; 501ef484dfcSTim Harvey }; 502ef484dfcSTim Harvey 503ef484dfcSTim Harvey /* vdda_1p8 */ 504ef484dfcSTim Harvey LDO3 { 505ef484dfcSTim Harvey regulator-name = "ldo3"; 506ef484dfcSTim Harvey regulator-min-microvolt = <1800000>; 507ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 508ef484dfcSTim Harvey regulator-boot-on; 509ef484dfcSTim Harvey regulator-always-on; 510ef484dfcSTim Harvey }; 511ef484dfcSTim Harvey 512ef484dfcSTim Harvey LDO4 { 513ef484dfcSTim Harvey regulator-name = "ldo4"; 514ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 515ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 516ef484dfcSTim Harvey regulator-boot-on; 517ef484dfcSTim Harvey regulator-always-on; 518ef484dfcSTim Harvey }; 519ef484dfcSTim Harvey 520ef484dfcSTim Harvey LDO6 { 521ef484dfcSTim Harvey regulator-name = "ldo6"; 522ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 523ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 524ef484dfcSTim Harvey regulator-boot-on; 525ef484dfcSTim Harvey regulator-always-on; 526ef484dfcSTim Harvey }; 527ef484dfcSTim Harvey }; 528ef484dfcSTim Harvey }; 529ef484dfcSTim Harvey 530ef484dfcSTim Harvey eeprom@50 { 531ef484dfcSTim Harvey compatible = "atmel,24c02"; 532ef484dfcSTim Harvey reg = <0x50>; 533ef484dfcSTim Harvey pagesize = <16>; 534ef484dfcSTim Harvey }; 535ef484dfcSTim Harvey 536ef484dfcSTim Harvey eeprom@51 { 537ef484dfcSTim Harvey compatible = "atmel,24c02"; 538ef484dfcSTim Harvey reg = <0x51>; 539ef484dfcSTim Harvey pagesize = <16>; 540ef484dfcSTim Harvey }; 541ef484dfcSTim Harvey 542ef484dfcSTim Harvey eeprom@52 { 543ef484dfcSTim Harvey compatible = "atmel,24c02"; 544ef484dfcSTim Harvey reg = <0x52>; 545ef484dfcSTim Harvey pagesize = <16>; 546ef484dfcSTim Harvey }; 547ef484dfcSTim Harvey 548ef484dfcSTim Harvey eeprom@53 { 549ef484dfcSTim Harvey compatible = "atmel,24c02"; 550ef484dfcSTim Harvey reg = <0x53>; 551ef484dfcSTim Harvey pagesize = <16>; 552ef484dfcSTim Harvey }; 553ef484dfcSTim Harvey 554ef484dfcSTim Harvey rtc@68 { 555ef484dfcSTim Harvey compatible = "dallas,ds1672"; 556ef484dfcSTim Harvey reg = <0x68>; 557ef484dfcSTim Harvey }; 558ef484dfcSTim Harvey}; 559ef484dfcSTim Harvey 560ef484dfcSTim Harvey&i2c2 { 561ef484dfcSTim Harvey clock-frequency = <400000>; 562ef484dfcSTim Harvey pinctrl-names = "default"; 563ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c2>; 564ef484dfcSTim Harvey status = "okay"; 565ef484dfcSTim Harvey 566ef484dfcSTim Harvey accelerometer@19 { 567ef484dfcSTim Harvey compatible = "st,lis2de12"; 568ef484dfcSTim Harvey pinctrl-names = "default"; 569ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_accel>; 570ef484dfcSTim Harvey reg = <0x19>; 571ef484dfcSTim Harvey st,drdy-int-pin = <1>; 572ef484dfcSTim Harvey interrupt-parent = <&gpio1>; 573ef484dfcSTim Harvey interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 574ef484dfcSTim Harvey interrupt-names = "INT1"; 575ef484dfcSTim Harvey }; 576ef484dfcSTim Harvey}; 577ef484dfcSTim Harvey 578ef484dfcSTim Harvey/* off-board header */ 579ef484dfcSTim Harvey&i2c3 { 580ef484dfcSTim Harvey clock-frequency = <400000>; 581ef484dfcSTim Harvey pinctrl-names = "default"; 582ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c3>; 583ef484dfcSTim Harvey status = "okay"; 584ef484dfcSTim Harvey}; 585ef484dfcSTim Harvey 586ef484dfcSTim Harvey/* off-board header */ 587ef484dfcSTim Harvey&i2c4 { 588ef484dfcSTim Harvey clock-frequency = <400000>; 589ef484dfcSTim Harvey pinctrl-names = "default"; 590ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c4>; 591ef484dfcSTim Harvey status = "okay"; 592ef484dfcSTim Harvey}; 593ef484dfcSTim Harvey 5948cd449d7STim Harvey&pgc_gpumix { 5958cd449d7STim Harvey status = "disabled"; 5968cd449d7STim Harvey}; 5978cd449d7STim Harvey 598ef484dfcSTim Harvey/* off-board header */ 599ef484dfcSTim Harvey&sai3 { 600ef484dfcSTim Harvey pinctrl-names = "default"; 601ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_sai3>; 602ef484dfcSTim Harvey assigned-clocks = <&clk IMX8MN_CLK_SAI3>; 603ef484dfcSTim Harvey assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>; 604ef484dfcSTim Harvey assigned-clock-rates = <24576000>; 605ef484dfcSTim Harvey status = "okay"; 606ef484dfcSTim Harvey}; 607ef484dfcSTim Harvey 608ef484dfcSTim Harvey/* RS232/RS485/RS422 selectable */ 609ef484dfcSTim Harvey&uart1 { 610ef484dfcSTim Harvey pinctrl-names = "default"; 611ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>; 612ef484dfcSTim Harvey status = "okay"; 613ef484dfcSTim Harvey}; 614ef484dfcSTim Harvey 615ef484dfcSTim Harvey/* RS232 console */ 616ef484dfcSTim Harvey&uart2 { 617ef484dfcSTim Harvey pinctrl-names = "default"; 618ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart2>; 619ef484dfcSTim Harvey status = "okay"; 620ef484dfcSTim Harvey}; 621ef484dfcSTim Harvey 622ef484dfcSTim Harvey/* bluetooth HCI */ 623ef484dfcSTim Harvey&uart3 { 624ef484dfcSTim Harvey pinctrl-names = "default"; 625ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; 626ef484dfcSTim Harvey rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 627ef484dfcSTim Harvey cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 628*d9a9a7cfSTim Harvey uart-has-rtscts; 629ef484dfcSTim Harvey status = "okay"; 630ef484dfcSTim Harvey 631ef484dfcSTim Harvey bluetooth { 632ef484dfcSTim Harvey compatible = "brcm,bcm4330-bt"; 633ef484dfcSTim Harvey shutdown-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; 634ef484dfcSTim Harvey }; 635ef484dfcSTim Harvey}; 636ef484dfcSTim Harvey 637ef484dfcSTim Harvey/* LTE Cat M1/NB1/EGPRS modem or GPS (loading option) */ 638ef484dfcSTim Harvey&uart4 { 639ef484dfcSTim Harvey pinctrl-names = "default"; 640ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart4>; 641ef484dfcSTim Harvey status = "okay"; 642ef484dfcSTim Harvey}; 643ef484dfcSTim Harvey 644ef484dfcSTim Harvey&usbotg1 { 645ef484dfcSTim Harvey dr_mode = "host"; 646ef484dfcSTim Harvey vbus-supply = <®_usb1_vbus>; 647ef484dfcSTim Harvey disable-over-current; 648ef484dfcSTim Harvey status = "okay"; 649ef484dfcSTim Harvey}; 650ef484dfcSTim Harvey 651ef484dfcSTim Harvey/* SDIO WiFi */ 652ef484dfcSTim Harvey&usdhc2 { 653ef484dfcSTim Harvey pinctrl-names = "default"; 654ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc2>; 655ef484dfcSTim Harvey bus-width = <4>; 656ef484dfcSTim Harvey non-removable; 657ef484dfcSTim Harvey vmmc-supply = <®_wifi>; 658ef484dfcSTim Harvey status = "okay"; 659ef484dfcSTim Harvey}; 660ef484dfcSTim Harvey 661ef484dfcSTim Harvey/* eMMC */ 662ef484dfcSTim Harvey&usdhc3 { 663ef484dfcSTim Harvey pinctrl-names = "default", "state_100mhz", "state_200mhz"; 664ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc3>; 665ef484dfcSTim Harvey pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 666ef484dfcSTim Harvey pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 667ef484dfcSTim Harvey bus-width = <8>; 668ef484dfcSTim Harvey non-removable; 669ef484dfcSTim Harvey status = "okay"; 670ef484dfcSTim Harvey}; 671ef484dfcSTim Harvey 672ef484dfcSTim Harvey&wdog1 { 673ef484dfcSTim Harvey pinctrl-names = "default"; 674ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_wdog>; 675ef484dfcSTim Harvey fsl,ext-reset-output; 676ef484dfcSTim Harvey status = "okay"; 677ef484dfcSTim Harvey}; 678ef484dfcSTim Harvey 679ef484dfcSTim Harvey&iomuxc { 680ef484dfcSTim Harvey pinctrl-names = "default"; 681ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_hog>; 682ef484dfcSTim Harvey 683ef484dfcSTim Harvey pinctrl_hog: hoggrp { 684ef484dfcSTim Harvey fsl,pins = < 685ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */ 6869d46d9f7STim Harvey MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RESET */ 687ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */ 688ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */ 689ef484dfcSTim Harvey MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */ 690ef484dfcSTim Harvey MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x40000041 /* APP GPIO2 */ 691ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* UART2_EN# */ 692ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x40000041 /* MIPI_GPIO1 */ 693ef484dfcSTim Harvey MX8MN_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000041 /* MIPI_GPIO2 */ 694ef484dfcSTim Harvey MX8MN_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000041 /* MIPI_GPIO3/PWM2 */ 695ef484dfcSTim Harvey MX8MN_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* MIPI_GPIO4/PWM3 */ 696ef484dfcSTim Harvey >; 697ef484dfcSTim Harvey }; 698ef484dfcSTim Harvey 699ef484dfcSTim Harvey pinctrl_accel: accelgrp { 700ef484dfcSTim Harvey fsl,pins = < 701ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x159 702ef484dfcSTim Harvey >; 703ef484dfcSTim Harvey }; 704ef484dfcSTim Harvey 705ef484dfcSTim Harvey pinctrl_fec1: fec1grp { 706ef484dfcSTim Harvey fsl,pins = < 707ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x3 708ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 709ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 710ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 711ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 712ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 713ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 714ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 715ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 716ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 717ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 718ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 719ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 720ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 721ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 /* RST# */ 722ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 /* IRQ# */ 723ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO08_ENET1_1588_EVENT0_IN 0x141 724ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO09_ENET1_1588_EVENT0_OUT 0x141 725ef484dfcSTim Harvey >; 726ef484dfcSTim Harvey }; 727ef484dfcSTim Harvey 728ef484dfcSTim Harvey pinctrl_gsc: gscgrp { 729ef484dfcSTim Harvey fsl,pins = < 730ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40 731ef484dfcSTim Harvey >; 732ef484dfcSTim Harvey }; 733ef484dfcSTim Harvey 734ef484dfcSTim Harvey pinctrl_i2c1: i2c1grp { 735ef484dfcSTim Harvey fsl,pins = < 736ef484dfcSTim Harvey MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 737ef484dfcSTim Harvey MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 738ef484dfcSTim Harvey >; 739ef484dfcSTim Harvey }; 740ef484dfcSTim Harvey 741ef484dfcSTim Harvey pinctrl_i2c2: i2c2grp { 742ef484dfcSTim Harvey fsl,pins = < 743ef484dfcSTim Harvey MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 744ef484dfcSTim Harvey MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 745ef484dfcSTim Harvey >; 746ef484dfcSTim Harvey }; 747ef484dfcSTim Harvey 748ef484dfcSTim Harvey pinctrl_i2c3: i2c3grp { 749ef484dfcSTim Harvey fsl,pins = < 750ef484dfcSTim Harvey MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 751ef484dfcSTim Harvey MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 752ef484dfcSTim Harvey >; 753ef484dfcSTim Harvey }; 754ef484dfcSTim Harvey 755ef484dfcSTim Harvey pinctrl_i2c4: i2c4grp { 756ef484dfcSTim Harvey fsl,pins = < 757ef484dfcSTim Harvey MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 758ef484dfcSTim Harvey MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 759ef484dfcSTim Harvey >; 760ef484dfcSTim Harvey }; 761ef484dfcSTim Harvey 762ef484dfcSTim Harvey pinctrl_gpio_leds: gpioledgrp { 763ef484dfcSTim Harvey fsl,pins = < 764ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x19 765ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x19 766ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x19 767ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_RXC_GPIO3_IO20 0x19 768ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19 769ef484dfcSTim Harvey >; 770ef484dfcSTim Harvey }; 771ef484dfcSTim Harvey 772ef484dfcSTim Harvey pinctrl_pmic: pmicgrp { 773ef484dfcSTim Harvey fsl,pins = < 774ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA02_GPIO3_IO8 0x41 775ef484dfcSTim Harvey >; 776ef484dfcSTim Harvey }; 777ef484dfcSTim Harvey 778ef484dfcSTim Harvey pinctrl_pps: ppsgrp { 779ef484dfcSTim Harvey fsl,pins = < 780ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x141 /* PPS */ 781ef484dfcSTim Harvey >; 782ef484dfcSTim Harvey }; 783ef484dfcSTim Harvey 784ef484dfcSTim Harvey pinctrl_reg_wl: regwlgrp { 785ef484dfcSTim Harvey fsl,pins = < 786ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 /* WLAN_WLON */ 787ef484dfcSTim Harvey >; 788ef484dfcSTim Harvey }; 789ef484dfcSTim Harvey 790ef484dfcSTim Harvey pinctrl_reg_usb1: regusb1grp { 791ef484dfcSTim Harvey fsl,pins = < 792ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_DATA5_GPIO2_IO7 0x41 793ef484dfcSTim Harvey >; 794ef484dfcSTim Harvey }; 795ef484dfcSTim Harvey 796ef484dfcSTim Harvey pinctrl_sai3: sai3grp { 797ef484dfcSTim Harvey fsl,pins = < 798ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 799ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6 800ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 801ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 802ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 803ef484dfcSTim Harvey >; 804ef484dfcSTim Harvey }; 805ef484dfcSTim Harvey 806ef484dfcSTim Harvey pinctrl_spi1: spi1grp { 807ef484dfcSTim Harvey fsl,pins = < 808ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 809ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 810ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 811ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40 812ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_DATA1_GPIO2_IO3 0x140 /* CAN_IRQ# */ 813ef484dfcSTim Harvey >; 814ef484dfcSTim Harvey }; 815ef484dfcSTim Harvey 816ef484dfcSTim Harvey pinctrl_spi2: spi2grp { 817ef484dfcSTim Harvey fsl,pins = < 818ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 819ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 820ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 821ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40 /* SS0 */ 822ef484dfcSTim Harvey >; 823ef484dfcSTim Harvey }; 824ef484dfcSTim Harvey 825ef484dfcSTim Harvey pinctrl_uart1: uart1grp { 826ef484dfcSTim Harvey fsl,pins = < 827ef484dfcSTim Harvey MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 828ef484dfcSTim Harvey MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 829ef484dfcSTim Harvey >; 830ef484dfcSTim Harvey }; 831ef484dfcSTim Harvey 832ef484dfcSTim Harvey pinctrl_uart1_gpio: uart1gpiogrp { 833ef484dfcSTim Harvey fsl,pins = < 834ef484dfcSTim Harvey MX8MN_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x40000110 /* HALF */ 835ef484dfcSTim Harvey MX8MN_IOMUXC_SAI2_TXC_GPIO4_IO25 0x40000110 /* TERM */ 836ef484dfcSTim Harvey MX8MN_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x40000110 /* RS485 */ 837ef484dfcSTim Harvey >; 838ef484dfcSTim Harvey }; 839ef484dfcSTim Harvey 840ef484dfcSTim Harvey pinctrl_uart2: uart2grp { 841ef484dfcSTim Harvey fsl,pins = < 842ef484dfcSTim Harvey MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 843ef484dfcSTim Harvey MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 844ef484dfcSTim Harvey >; 845ef484dfcSTim Harvey }; 846ef484dfcSTim Harvey 847ef484dfcSTim Harvey pinctrl_uart3_gpio: uart3_gpiogrp { 848ef484dfcSTim Harvey fsl,pins = < 849ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 /* BT_EN# */ 850ef484dfcSTim Harvey >; 851ef484dfcSTim Harvey }; 852ef484dfcSTim Harvey 853ef484dfcSTim Harvey pinctrl_uart3: uart3grp { 854ef484dfcSTim Harvey fsl,pins = < 855ef484dfcSTim Harvey MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 856ef484dfcSTim Harvey MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 857ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_CLK_GPIO2_IO0 0x140 /* CTS */ 858ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_CMD_GPIO2_IO1 0x140 /* RTS */ 859ef484dfcSTim Harvey >; 860ef484dfcSTim Harvey }; 861ef484dfcSTim Harvey 862ef484dfcSTim Harvey pinctrl_uart4: uart4grp { 863ef484dfcSTim Harvey fsl,pins = < 864ef484dfcSTim Harvey MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 865ef484dfcSTim Harvey MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 866ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x141 /* GNSS_GASP */ 867ef484dfcSTim Harvey >; 868ef484dfcSTim Harvey }; 869ef484dfcSTim Harvey 870ef484dfcSTim Harvey pinctrl_usdhc2: usdhc2grp { 871ef484dfcSTim Harvey fsl,pins = < 872ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 873ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 874ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 875ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 876ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 877ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 878ef484dfcSTim Harvey >; 879ef484dfcSTim Harvey }; 880ef484dfcSTim Harvey 881ef484dfcSTim Harvey pinctrl_usdhc3: usdhc3grp { 882ef484dfcSTim Harvey fsl,pins = < 883ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 884ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 885ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 886ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 887ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 888ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 889ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 890ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 891ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 892ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 893ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 894ef484dfcSTim Harvey >; 895ef484dfcSTim Harvey }; 896ef484dfcSTim Harvey 897ef484dfcSTim Harvey pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 898ef484dfcSTim Harvey fsl,pins = < 899ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 900ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 901ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 902ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 903ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 904ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 905ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 906ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 907ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 908ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 909ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 910ef484dfcSTim Harvey >; 911ef484dfcSTim Harvey }; 912ef484dfcSTim Harvey 913ef484dfcSTim Harvey pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 914ef484dfcSTim Harvey fsl,pins = < 915ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 916ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 917ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 918ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 919ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 920ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 921ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 922ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 923ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 924ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 925ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 926ef484dfcSTim Harvey >; 927ef484dfcSTim Harvey }; 928ef484dfcSTim Harvey 929ef484dfcSTim Harvey pinctrl_wdog: wdoggrp { 930ef484dfcSTim Harvey fsl,pins = < 931ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 932ef484dfcSTim Harvey >; 933ef484dfcSTim Harvey }; 934ef484dfcSTim Harvey}; 935