1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright 2020 Compass Electronics Group, LLC
4 */
5
6/ {
7	leds {
8		compatible = "gpio-leds";
9
10		led-0 {
11			label = "gen_led0";
12			gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
13			default-state = "off";
14		};
15
16		led-1 {
17			label = "gen_led1";
18			gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
19			default-state = "off";
20		};
21
22		led-2 {
23			label = "gen_led2";
24			gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
25			default-state = "off";
26		};
27
28		led-3 {
29			pinctrl-names = "default";
30			pinctrl-0 = <&pinctrl_led3>;
31			label = "heartbeat";
32			gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
33			linux,default-trigger = "heartbeat";
34		};
35	};
36
37	reg_audio: regulator-audio {
38		compatible = "regulator-fixed";
39		regulator-name = "3v3_aud";
40		regulator-min-microvolt = <3300000>;
41		regulator-max-microvolt = <3300000>;
42		gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
43		enable-active-high;
44	};
45
46	reg_camera: regulator-camera {
47		compatible = "regulator-fixed";
48		regulator-name = "mipi_pwr";
49		regulator-min-microvolt = <2800000>;
50		regulator-max-microvolt = <2800000>;
51		gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
52		enable-active-high;
53		startup-delay-us = <100000>;
54		regulator-always-on;
55	};
56
57	reg_usdhc2_vmmc: regulator-usdhc2 {
58		compatible = "regulator-fixed";
59		regulator-name = "vsd_3v3";
60		regulator-min-microvolt = <3300000>;
61		regulator-max-microvolt = <3300000>;
62		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
63		enable-active-high;
64	};
65
66	reg_usb_otg_vbus: regulator-usb {
67		compatible = "regulator-fixed";
68		pinctrl-names = "default";
69		pinctrl-0 = <&pinctrl_reg_usb_otg>;
70		regulator-name = "usb_otg_vbus";
71		regulator-min-microvolt = <5000000>;
72		regulator-max-microvolt = <5000000>;
73		gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
74		enable-active-high;
75	};
76
77	sound {
78		compatible = "fsl,imx-audio-wm8962";
79		model = "wm8962-audio";
80		audio-cpu = <&sai3>;
81		audio-codec = <&wm8962>;
82		audio-routing =
83			"Headphone Jack", "HPOUTL",
84			"Headphone Jack", "HPOUTR",
85			"Ext Spk", "SPKOUTL",
86			"Ext Spk", "SPKOUTR",
87			"AMIC", "MICBIAS",
88			"IN3R", "AMIC";
89	};
90};
91
92&ecspi2 {
93	pinctrl-names = "default";
94	pinctrl-0 = <&pinctrl_espi2>;
95	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
96	status = "okay";
97
98	eeprom@0 {
99		compatible = "microchip,at25160bn", "atmel,at25";
100		reg = <0>;
101		spi-max-frequency = <5000000>;
102		spi-cpha;
103		spi-cpol;
104		pagesize = <32>;
105		size = <2048>;
106		address-width = <16>;
107	};
108};
109
110&i2c2 {
111	clock-frequency = <384000>;
112	pinctrl-names = "default";
113	pinctrl-0 = <&pinctrl_i2c2>;
114	status = "okay";
115
116	camera@10 {
117		compatible = "ovti,ov5640";
118		pinctrl-names = "default";
119		pinctrl-0 = <&pinctrl_ov5640>;
120		reg = <0x10>;
121		clocks = <&clk IMX8MN_CLK_CLKO1>;
122		clock-names = "xclk";
123		assigned-clocks = <&clk IMX8MN_CLK_CLKO1>;
124		assigned-clock-parents = <&clk IMX8MN_CLK_24M>;
125		assigned-clock-rates = <24000000>;
126		AVDD-supply = <&reg_camera>;  /* 2.8v */
127		powerdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
128		reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
129
130		port {
131			/* MIPI CSI-2 bus endpoint */
132			ov5640_to_mipi_csi2: endpoint {
133				remote-endpoint = <&mipi_csi_in>;
134				clock-lanes = <0>;
135				data-lanes = <1 2>;
136			};
137		};
138	};
139};
140&i2c4 {
141	clock-frequency = <400000>;
142	pinctrl-names = "default";
143	pinctrl-0 = <&pinctrl_i2c4>;
144	status = "okay";
145
146	pca6416_0: gpio@20 {
147		compatible = "nxp,pcal6416";
148		reg = <0x20>;
149		pinctrl-names = "default";
150		pinctrl-0 = <&pinctrl_pcal6414>;
151		gpio-controller;
152		#gpio-cells = <2>;
153		interrupt-parent = <&gpio4>;
154		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
155	};
156
157	pca6416_1: gpio@21 {
158		compatible = "nxp,pcal6416";
159		reg = <0x21>;
160		gpio-controller;
161		#gpio-cells = <2>;
162		interrupt-parent = <&gpio4>;
163		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
164	};
165
166	wm8962: audio-codec@1a {
167		compatible = "wlf,wm8962";
168		reg = <0x1a>;
169		clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
170		DCVDD-supply = <&reg_audio>;
171		DBVDD-supply = <&reg_audio>;
172		AVDD-supply = <&reg_audio>;
173		CPVDD-supply = <&reg_audio>;
174		MICVDD-supply = <&reg_audio>;
175		PLLVDD-supply = <&reg_audio>;
176		SPKVDD1-supply = <&reg_audio>;
177		SPKVDD2-supply = <&reg_audio>;
178		gpio-cfg = <
179			0x0000 /* 0:Default */
180			0x0000 /* 1:Default */
181			0x0000 /* 2:FN_DMICCLK */
182			0x0000 /* 3:Default */
183			0x0000 /* 4:FN_DMICCDAT */
184			0x0000 /* 5:Default */
185		>;
186	};
187};
188
189&isi {
190	status = "okay";
191};
192
193&easrc {
194	fsl,asrc-rate = <48000>;
195	status = "okay";
196};
197
198&mipi_csi {
199	status = "okay";
200
201	ports {
202		port@0 {
203			mipi_csi_in: endpoint {
204				remote-endpoint = <&ov5640_to_mipi_csi2>;
205				data-lanes = <1 2>;
206			};
207		};
208	};
209};
210
211&sai3 {
212	pinctrl-names = "default";
213	pinctrl-0 = <&pinctrl_sai3>;
214	assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
215	assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
216	assigned-clock-rates = <24576000>;
217	fsl,sai-mclk-direction-output;
218	status = "okay";
219};
220
221&snvs_pwrkey {
222	status = "okay";
223};
224
225&uart2 { /* console */
226	pinctrl-names = "default";
227	pinctrl-0 = <&pinctrl_uart2>;
228	status = "okay";
229};
230
231&uart3 {
232	pinctrl-names = "default";
233	pinctrl-0 = <&pinctrl_uart3>;
234	assigned-clocks = <&clk IMX8MN_CLK_UART3>;
235	assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
236	uart-has-rtscts;
237	status = "okay";
238};
239
240&usbotg1 {
241	vbus-supply = <&reg_usb_otg_vbus>;
242	disable-over-current;
243	dr_mode = "otg";
244	status = "okay";
245};
246
247&usdhc2 {
248	pinctrl-names = "default", "state_100mhz", "state_200mhz";
249	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
250	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
251	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
252	bus-width = <4>;
253	vmmc-supply = <&reg_usdhc2_vmmc>;
254	status = "okay";
255};
256
257&iomuxc {
258	pinctrl_espi2: espi2grp {
259		fsl,pins = <
260			MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK		0x82
261			MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI		0x82
262			MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO		0x82
263			MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9		0x41
264		>;
265	};
266
267	pinctrl_i2c2: i2c2grp {
268		fsl,pins = <
269			MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c3
270			MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA		0x400001c3
271		>;
272	};
273
274	pinctrl_i2c4: i2c4grp {
275		fsl,pins = <
276			MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL		0x400001c3
277			MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA		0x400001c3
278		>;
279	};
280
281	pinctrl_led3: led3grp {
282		fsl,pins = <
283			MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28	0x41
284		>;
285	};
286
287	pinctrl_ov5640: ov5640grp {
288		fsl,pins = <
289			MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7		0x19
290			MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6		0x19
291			MX8MN_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1	0x59
292		>;
293	};
294
295	pinctrl_pcal6414: pcal6414-gpiogrp {
296		fsl,pins = <
297			MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27		0x19
298		>;
299	};
300
301	pinctrl_reg_usb_otg: reg-otggrp {
302		fsl,pins = <
303			MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29     0x19
304		>;
305	};
306
307	pinctrl_sai3: sai3grp {
308		fsl,pins = <
309			MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC     0xd6
310			MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK      0xd6
311			MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK        0xd6
312			MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0     0xd6
313			MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0	0xd6
314		>;
315	};
316
317	pinctrl_uart2: uart2grp {
318		fsl,pins = <
319			MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX	0x140
320			MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX	0x140
321		>;
322	};
323
324	pinctrl_uart3: uart3grp {
325		fsl,pins = <
326			MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX	0x40
327			MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX	0x40
328			MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B	0x40
329			MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B	0x40
330		>;
331	};
332
333	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
334		fsl,pins = <
335			MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B	0x41
336			MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
337		>;
338	};
339
340	pinctrl_usdhc2: usdhc2grp {
341		fsl,pins = <
342			MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK	0x190
343			MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD	0x1d0
344			MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d0
345			MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d0
346			MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d0
347			MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d0
348			MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
349		>;
350	};
351
352	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
353		fsl,pins = <
354			MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK	0x194
355			MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD	0x1d4
356			MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d4
357			MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d4
358			MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d4
359			MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d4
360			MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
361		>;
362	};
363
364	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
365		fsl,pins = <
366			MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK	0x196
367			MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD	0x1d6
368			MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d6
369			MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d6
370			MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d6
371			MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d6
372			MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
373		>;
374	};
375};
376