17a2aeb91SLi Yang// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2c2f6a472SAbhimanyu Saini/* 3c2f6a472SAbhimanyu Saini * Device Tree file for Freescale LS2080A RDB Board. 4c2f6a472SAbhimanyu Saini * 58637f58bSLi Yang * Copyright 2016 Freescale Semiconductor, Inc. 6*6f5851a8SBiwen Li * Copyright 2017-2020 NXP 7c2f6a472SAbhimanyu Saini * 8c2f6a472SAbhimanyu Saini * Abhimanyu Saini <abhimanyu.saini@nxp.com> 9c2f6a472SAbhimanyu Saini * 10c2f6a472SAbhimanyu Saini */ 11c2f6a472SAbhimanyu Saini 12c2f6a472SAbhimanyu Saini&esdhc { 13c2f6a472SAbhimanyu Saini status = "okay"; 14c2f6a472SAbhimanyu Saini}; 15c2f6a472SAbhimanyu Saini 16c2f6a472SAbhimanyu Saini&ifc { 17c2f6a472SAbhimanyu Saini status = "okay"; 18c2f6a472SAbhimanyu Saini #address-cells = <2>; 19c2f6a472SAbhimanyu Saini #size-cells = <1>; 20c2f6a472SAbhimanyu Saini ranges = <0x0 0x0 0x5 0x80000000 0x08000000 21c2f6a472SAbhimanyu Saini 0x2 0x0 0x5 0x30000000 0x00010000 22c2f6a472SAbhimanyu Saini 0x3 0x0 0x5 0x20000000 0x00010000>; 23c2f6a472SAbhimanyu Saini 24c2f6a472SAbhimanyu Saini nor@0,0 { 25c2f6a472SAbhimanyu Saini #address-cells = <1>; 26c2f6a472SAbhimanyu Saini #size-cells = <1>; 27c2f6a472SAbhimanyu Saini compatible = "cfi-flash"; 28c2f6a472SAbhimanyu Saini reg = <0x0 0x0 0x8000000>; 29c2f6a472SAbhimanyu Saini bank-width = <2>; 30c2f6a472SAbhimanyu Saini device-width = <1>; 31c2f6a472SAbhimanyu Saini }; 32c2f6a472SAbhimanyu Saini 33c2f6a472SAbhimanyu Saini nand@2,0 { 34c2f6a472SAbhimanyu Saini compatible = "fsl,ifc-nand"; 35c2f6a472SAbhimanyu Saini reg = <0x2 0x0 0x10000>; 36c2f6a472SAbhimanyu Saini }; 37c2f6a472SAbhimanyu Saini 38c2f6a472SAbhimanyu Saini cpld@3,0 { 39c2f6a472SAbhimanyu Saini reg = <0x3 0x0 0x10000>; 40c2f6a472SAbhimanyu Saini compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis"; 41c2f6a472SAbhimanyu Saini }; 42c2f6a472SAbhimanyu Saini 43c2f6a472SAbhimanyu Saini}; 44c2f6a472SAbhimanyu Saini 45c2f6a472SAbhimanyu Saini&i2c0 { 46c2f6a472SAbhimanyu Saini status = "okay"; 47c2f6a472SAbhimanyu Saini pca9547@75 { 48c2f6a472SAbhimanyu Saini compatible = "nxp,pca9547"; 49c2f6a472SAbhimanyu Saini reg = <0x75>; 50c2f6a472SAbhimanyu Saini #address-cells = <1>; 51c2f6a472SAbhimanyu Saini #size-cells = <0>; 52c2f6a472SAbhimanyu Saini i2c@1 { 53c2f6a472SAbhimanyu Saini #address-cells = <1>; 54c2f6a472SAbhimanyu Saini #size-cells = <0>; 55c2f6a472SAbhimanyu Saini reg = <0x01>; 56c2f6a472SAbhimanyu Saini rtc@68 { 57c2f6a472SAbhimanyu Saini compatible = "dallas,ds3232"; 58c2f6a472SAbhimanyu Saini reg = <0x68>; 59*6f5851a8SBiwen Li /* IRQ_RTC_B -> IRQ06, active low */ 60*6f5851a8SBiwen Li interrupts-extended = <&extirq 6 IRQ_TYPE_LEVEL_LOW>; 61c2f6a472SAbhimanyu Saini }; 62c2f6a472SAbhimanyu Saini }; 63c2f6a472SAbhimanyu Saini 641e333007SYuantian Tang i2c@2 { 651e333007SYuantian Tang #address-cells = <1>; 661e333007SYuantian Tang #size-cells = <0>; 671e333007SYuantian Tang reg = <0x02>; 681e333007SYuantian Tang 691e333007SYuantian Tang ina220@40 { 701e333007SYuantian Tang compatible = "ti,ina220"; 711e333007SYuantian Tang reg = <0x40>; 721e333007SYuantian Tang shunt-resistor = <500>; 731e333007SYuantian Tang }; 741e333007SYuantian Tang }; 751e333007SYuantian Tang 76c2f6a472SAbhimanyu Saini i2c@3 { 77c2f6a472SAbhimanyu Saini #address-cells = <1>; 78c2f6a472SAbhimanyu Saini #size-cells = <0>; 79c2f6a472SAbhimanyu Saini reg = <0x3>; 80c2f6a472SAbhimanyu Saini 81c2f6a472SAbhimanyu Saini adt7481@4c { 82c2f6a472SAbhimanyu Saini compatible = "adi,adt7461"; 83c2f6a472SAbhimanyu Saini reg = <0x4c>; 84c2f6a472SAbhimanyu Saini }; 85c2f6a472SAbhimanyu Saini }; 86c2f6a472SAbhimanyu Saini }; 87c2f6a472SAbhimanyu Saini}; 88c2f6a472SAbhimanyu Saini 89c2f6a472SAbhimanyu Saini&i2c1 { 90c2f6a472SAbhimanyu Saini status = "disabled"; 91c2f6a472SAbhimanyu Saini}; 92c2f6a472SAbhimanyu Saini 93c2f6a472SAbhimanyu Saini&i2c2 { 94c2f6a472SAbhimanyu Saini status = "disabled"; 95c2f6a472SAbhimanyu Saini}; 96c2f6a472SAbhimanyu Saini 97c2f6a472SAbhimanyu Saini&i2c3 { 98c2f6a472SAbhimanyu Saini status = "disabled"; 99c2f6a472SAbhimanyu Saini}; 100c2f6a472SAbhimanyu Saini 101c2f6a472SAbhimanyu Saini&dspi { 102c2f6a472SAbhimanyu Saini status = "okay"; 103c326ff59SFabio Estevam dflash0: n25q512a@0 { 104c2f6a472SAbhimanyu Saini #address-cells = <1>; 105c2f6a472SAbhimanyu Saini #size-cells = <1>; 106c2f6a472SAbhimanyu Saini compatible = "st,m25p80"; 107c2f6a472SAbhimanyu Saini spi-max-frequency = <3000000>; 108c2f6a472SAbhimanyu Saini reg = <0>; 109c2f6a472SAbhimanyu Saini }; 110c2f6a472SAbhimanyu Saini}; 111c2f6a472SAbhimanyu Saini 112c2f6a472SAbhimanyu Saini&qspi { 11373d58260SKuldeep Singh status = "okay"; 11473d58260SKuldeep Singh 11573d58260SKuldeep Singh s25fs512s0: flash@0 { 11673d58260SKuldeep Singh #address-cells = <1>; 11773d58260SKuldeep Singh #size-cells = <1>; 11873d58260SKuldeep Singh compatible = "jedec,spi-nor"; 11973d58260SKuldeep Singh spi-max-frequency = <50000000>; 12073d58260SKuldeep Singh reg = <0>; 12173d58260SKuldeep Singh }; 122c2f6a472SAbhimanyu Saini}; 123c2f6a472SAbhimanyu Saini 124c2f6a472SAbhimanyu Saini&sata0 { 125c2f6a472SAbhimanyu Saini status = "okay"; 126c2f6a472SAbhimanyu Saini}; 127c2f6a472SAbhimanyu Saini 128c2f6a472SAbhimanyu Saini&sata1 { 129c2f6a472SAbhimanyu Saini status = "okay"; 130c2f6a472SAbhimanyu Saini}; 131c2f6a472SAbhimanyu Saini 132c2f6a472SAbhimanyu Saini&usb0 { 133c2f6a472SAbhimanyu Saini status = "okay"; 134c2f6a472SAbhimanyu Saini}; 135c2f6a472SAbhimanyu Saini 136c2f6a472SAbhimanyu Saini&usb1 { 137c2f6a472SAbhimanyu Saini status = "okay"; 138c2f6a472SAbhimanyu Saini}; 139