1/*
2 * Copyright (c) 2016 Andreas Färber
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This library is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of the
12 *     License, or (at your option) any later version.
13 *
14 *     This library is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 *  b) Permission is hereby granted, free of charge, to any person
22 *     obtaining a copy of this software and associated documentation
23 *     files (the "Software"), to deal in the Software without
24 *     restriction, including without limitation the rights to use,
25 *     copy, modify, merge, publish, distribute, sublicense, and/or
26 *     sell copies of the Software, and to permit persons to whom the
27 *     Software is furnished to do so, subject to the following
28 *     conditions:
29 *
30 *     The above copyright notice and this permission notice shall be
31 *     included in all copies or substantial portions of the Software.
32 *
33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 *     OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#include <dt-bindings/gpio/gpio.h>
44#include <dt-bindings/interrupt-controller/irq.h>
45#include <dt-bindings/interrupt-controller/arm-gic.h>
46
47/ {
48	compatible = "amlogic,meson-gxbb";
49	interrupt-parent = <&gic>;
50	#address-cells = <2>;
51	#size-cells = <2>;
52
53	aliases {
54		serial0 = &uart_AO;
55		serial1 = &uart_A;
56	};
57
58	cpus {
59		#address-cells = <0x2>;
60		#size-cells = <0x0>;
61
62		cpu0: cpu@0 {
63			device_type = "cpu";
64			compatible = "arm,cortex-a53", "arm,armv8";
65			reg = <0x0 0x0>;
66			enable-method = "psci";
67		};
68
69		cpu1: cpu@1 {
70			device_type = "cpu";
71			compatible = "arm,cortex-a53", "arm,armv8";
72			reg = <0x0 0x1>;
73			enable-method = "psci";
74		};
75
76		cpu2: cpu@2 {
77			device_type = "cpu";
78			compatible = "arm,cortex-a53", "arm,armv8";
79			reg = <0x0 0x2>;
80			enable-method = "psci";
81		};
82
83		cpu3: cpu@3 {
84			device_type = "cpu";
85			compatible = "arm,cortex-a53", "arm,armv8";
86			reg = <0x0 0x3>;
87			enable-method = "psci";
88		};
89	};
90
91	arm-pmu {
92		compatible = "arm,cortex-a53-pmu";
93		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
94			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
95			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
96			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
97		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
98	};
99
100	psci {
101		compatible = "arm,psci-0.2";
102		method = "smc";
103	};
104
105	timer {
106		compatible = "arm,armv8-timer";
107		interrupts = <GIC_PPI 13
108			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
109			     <GIC_PPI 14
110			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
111			     <GIC_PPI 11
112			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
113			     <GIC_PPI 10
114			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>;
115	};
116
117	xtal: xtal-clk {
118		compatible = "fixed-clock";
119		clock-frequency = <24000000>;
120		clock-output-names = "xtal";
121		#clock-cells = <0>;
122	};
123
124	soc {
125		compatible = "simple-bus";
126		#address-cells = <2>;
127		#size-cells = <2>;
128		ranges;
129
130		cbus: cbus@c1100000 {
131			compatible = "simple-bus";
132			reg = <0x0 0xc1100000 0x0 0x100000>;
133			#address-cells = <2>;
134			#size-cells = <2>;
135			ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
136
137			uart_A: serial@84c0 {
138				compatible = "amlogic,meson-uart";
139				reg = <0x0 0x084c0 0x0 0x14>;
140				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
141				clocks = <&xtal>;
142				status = "disabled";
143			};
144		};
145
146		gic: interrupt-controller@c4301000 {
147			compatible = "arm,gic-400";
148			reg = <0x0 0xc4301000 0 0x1000>,
149			      <0x0 0xc4302000 0 0x2000>,
150			      <0x0 0xc4304000 0 0x2000>,
151			      <0x0 0xc4306000 0 0x2000>;
152			interrupt-controller;
153			interrupts = <GIC_PPI 9
154				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
155			#interrupt-cells = <3>;
156			#address-cells = <0>;
157		};
158
159		aobus: aobus@c8100000 {
160			compatible = "simple-bus";
161			reg = <0x0 0xc8100000 0x0 0x100000>;
162			#address-cells = <2>;
163			#size-cells = <2>;
164			ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
165
166			uart_AO: serial@4c0 {
167				compatible = "amlogic,meson-uart";
168				reg = <0x0 0x004c0 0x0 0x14>;
169				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
170				clocks = <&xtal>;
171				status = "disabled";
172			};
173		};
174
175		apb: apb@d0000000 {
176			compatible = "simple-bus";
177			reg = <0x0 0xd0000000 0x0 0x200000>;
178			#address-cells = <2>;
179			#size-cells = <2>;
180			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
181		};
182	};
183};
184