19952f691SThomas Gleixner// SPDX-License-Identifier: GPL-2.0-only
278cd6a9dSDinh Nguyen/*
378cd6a9dSDinh Nguyen * Copyright Altera Corporation (C) 2015. All rights reserved.
478cd6a9dSDinh Nguyen */
578cd6a9dSDinh Nguyen
6e519922eSDinh Nguyen#include "socfpga_stratix10.dtsi"
778cd6a9dSDinh Nguyen
878cd6a9dSDinh Nguyen/ {
978cd6a9dSDinh Nguyen	model = "SoCFPGA Stratix 10 SoCDK";
101c0bd035SKrzysztof Kozlowski	compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";
1178cd6a9dSDinh Nguyen
1278cd6a9dSDinh Nguyen	aliases {
1378cd6a9dSDinh Nguyen		serial0 = &uart0;
1474cad26dSDinh Nguyen		ethernet0 = &gmac0;
1574cad26dSDinh Nguyen		ethernet1 = &gmac1;
1674cad26dSDinh Nguyen		ethernet2 = &gmac2;
1778cd6a9dSDinh Nguyen	};
1878cd6a9dSDinh Nguyen
1978cd6a9dSDinh Nguyen	chosen {
2078cd6a9dSDinh Nguyen		stdout-path = "serial0:115200n8";
2178cd6a9dSDinh Nguyen	};
2278cd6a9dSDinh Nguyen
23f850b540SAlan Tull	leds {
24f850b540SAlan Tull		compatible = "gpio-leds";
2589f53accSKrzysztof Kozlowski		led-hps0 {
26f850b540SAlan Tull			label = "hps_led0";
27f850b540SAlan Tull			gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
28f850b540SAlan Tull		};
29f850b540SAlan Tull
3089f53accSKrzysztof Kozlowski		led-hps1 {
31f850b540SAlan Tull			label = "hps_led1";
32f850b540SAlan Tull			gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
33f850b540SAlan Tull		};
34f850b540SAlan Tull
3589f53accSKrzysztof Kozlowski		led-hps2 {
36f850b540SAlan Tull			label = "hps_led2";
37f850b540SAlan Tull			gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
38f850b540SAlan Tull		};
39f850b540SAlan Tull	};
40f850b540SAlan Tull
4178cd6a9dSDinh Nguyen	memory@80000000 {
4278cd6a9dSDinh Nguyen		device_type = "memory";
4378cd6a9dSDinh Nguyen		/* We expect the bootloader to fill in the reg */
4478cd6a9dSDinh Nguyen		reg = <0 0x80000000 0 0>;
4578cd6a9dSDinh Nguyen	};
46d93101abSDinh Nguyen
47327a96a1SKrzysztof Kozlowski	ref_033v: regulator-v-ref {
48eebee19eSAlan Tull		compatible = "regulator-fixed";
49eebee19eSAlan Tull		regulator-name = "0.33V";
50eebee19eSAlan Tull		regulator-min-microvolt = <330000>;
51eebee19eSAlan Tull		regulator-max-microvolt = <330000>;
52eebee19eSAlan Tull	};
53eebee19eSAlan Tull
54d93101abSDinh Nguyen	soc {
55109d7899SThor Thayer		eccmgr {
56109d7899SThor Thayer			sdmmca-ecc@ff8c8c00 {
57109d7899SThor Thayer				compatible = "altr,socfpga-s10-sdmmc-ecc",
58109d7899SThor Thayer					     "altr,socfpga-sdmmc-ecc";
59109d7899SThor Thayer				reg = <0xff8c8c00 0x100>;
60109d7899SThor Thayer				altr,ecc-parent = <&mmc>;
61109d7899SThor Thayer				interrupts = <14 4>,
62109d7899SThor Thayer					     <15 4>;
63109d7899SThor Thayer			};
64109d7899SThor Thayer		};
65d93101abSDinh Nguyen	};
6678cd6a9dSDinh Nguyen};
6778cd6a9dSDinh Nguyen
68d17c1a3dSDinh Nguyen&pinctrl0 {
69d17c1a3dSDinh Nguyen	i2c1_pmx_func: i2c1-pmx-func {
70d17c1a3dSDinh Nguyen		pinctrl-single,pins = <
71d17c1a3dSDinh Nguyen			0x78   0x4   /* I2C1_SDA (IO6-B) PIN30SEL) */
72d17c1a3dSDinh Nguyen			0x7c   0x4   /* I2C1_SCL (IO7-B) PIN31SEL */
73d17c1a3dSDinh Nguyen		>;
74d17c1a3dSDinh Nguyen	};
75d17c1a3dSDinh Nguyen
76d17c1a3dSDinh Nguyen	i2c1_pmx_func_gpio: i2c1-pmx-func-gpio {
77d17c1a3dSDinh Nguyen		pinctrl-single,pins = <
78d17c1a3dSDinh Nguyen			0x78   0x8   /* I2C1_SDA (IO6-B) PIN30SEL) */
79d17c1a3dSDinh Nguyen			0x7c   0x8   /* I2C1_SCL (IO7-B) PIN31SEL */
80d17c1a3dSDinh Nguyen		>;
81d17c1a3dSDinh Nguyen	};
82d17c1a3dSDinh Nguyen};
83d17c1a3dSDinh Nguyen
84f850b540SAlan Tull&gpio1 {
85f850b540SAlan Tull	status = "okay";
86f850b540SAlan Tull};
87f850b540SAlan Tull
88701e3a48SDinh Nguyen&gmac0 {
89701e3a48SDinh Nguyen	status = "okay";
90701e3a48SDinh Nguyen	phy-mode = "rgmii";
91701e3a48SDinh Nguyen	phy-handle = <&phy0>;
92701e3a48SDinh Nguyen
93a27460c9SThor Thayer	max-frame-size = <9000>;
94701e3a48SDinh Nguyen
95701e3a48SDinh Nguyen	mdio0 {
96701e3a48SDinh Nguyen		#address-cells = <1>;
97701e3a48SDinh Nguyen		#size-cells = <0>;
98701e3a48SDinh Nguyen		compatible = "snps,dwmac-mdio";
99701e3a48SDinh Nguyen		phy0: ethernet-phy@0 {
100701e3a48SDinh Nguyen			reg = <4>;
101701e3a48SDinh Nguyen
102701e3a48SDinh Nguyen			txd0-skew-ps = <0>; /* -420ps */
103701e3a48SDinh Nguyen			txd1-skew-ps = <0>; /* -420ps */
104701e3a48SDinh Nguyen			txd2-skew-ps = <0>; /* -420ps */
105701e3a48SDinh Nguyen			txd3-skew-ps = <0>; /* -420ps */
106701e3a48SDinh Nguyen			rxd0-skew-ps = <420>; /* 0ps */
107701e3a48SDinh Nguyen			rxd1-skew-ps = <420>; /* 0ps */
108701e3a48SDinh Nguyen			rxd2-skew-ps = <420>; /* 0ps */
109701e3a48SDinh Nguyen			rxd3-skew-ps = <420>; /* 0ps */
110701e3a48SDinh Nguyen			txen-skew-ps = <0>; /* -420ps */
111e8c622e2SOoi, Joyce			txc-skew-ps = <900>; /* 0ps */
112701e3a48SDinh Nguyen			rxdv-skew-ps = <420>; /* 0ps */
113701e3a48SDinh Nguyen			rxc-skew-ps = <1680>; /* 780ps */
114701e3a48SDinh Nguyen		};
115701e3a48SDinh Nguyen	};
116701e3a48SDinh Nguyen};
117701e3a48SDinh Nguyen
118701e3a48SDinh Nguyen&mmc {
119701e3a48SDinh Nguyen	status = "okay";
120701e3a48SDinh Nguyen	cap-sd-highspeed;
121922bfb7cSDinh Nguyen	cap-mmc-highspeed;
122701e3a48SDinh Nguyen	broken-cd;
123701e3a48SDinh Nguyen	bus-width = <4>;
12431354121SDinh Nguyen	clk-phase-sd-hs = <0>, <135>;
125701e3a48SDinh Nguyen};
126701e3a48SDinh Nguyen
127357513c0SNiravkumar L Rabara&osc1 {
128357513c0SNiravkumar L Rabara	clock-frequency = <25000000>;
129357513c0SNiravkumar L Rabara};
130357513c0SNiravkumar L Rabara
13178cd6a9dSDinh Nguyen&uart0 {
13278cd6a9dSDinh Nguyen	status = "okay";
13378cd6a9dSDinh Nguyen};
13415a9b85dSDinh Nguyen
13515a9b85dSDinh Nguyen&usb0 {
13615a9b85dSDinh Nguyen	status = "okay";
137956c8cd6SDinh Nguyen	disable-over-current;
13815a9b85dSDinh Nguyen};
1393b0fb63fSDinh Nguyen
1403b0fb63fSDinh Nguyen&watchdog0 {
1413b0fb63fSDinh Nguyen	status = "okay";
14278cd6a9dSDinh Nguyen};
143eebee19eSAlan Tull
144eebee19eSAlan Tull&i2c1 {
145eebee19eSAlan Tull	status = "okay";
146eebee19eSAlan Tull	clock-frequency = <100000>;
147c8da1d15SAlan Tull	i2c-sda-falling-time-ns = <890>;  /* hcnt */
148*db66795fSDinh Nguyen	i2c-scl-falling-time-ns = <890>;  /* lcnt */
149eebee19eSAlan Tull
150d17c1a3dSDinh Nguyen	pinctrl-names = "default", "gpio";
151d17c1a3dSDinh Nguyen	pinctrl-0 = <&i2c1_pmx_func>;
152d17c1a3dSDinh Nguyen	pinctrl-1 = <&i2c1_pmx_func_gpio>;
153d17c1a3dSDinh Nguyen
154d17c1a3dSDinh Nguyen	scl-gpios = <&portb 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
155d17c1a3dSDinh Nguyen	sda-gpios = <&portb 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
156d17c1a3dSDinh Nguyen
157eebee19eSAlan Tull	adc@14 {
158eebee19eSAlan Tull		compatible = "lltc,ltc2497";
159eebee19eSAlan Tull		reg = <0x14>;
160eebee19eSAlan Tull		vref-supply = <&ref_033v>;
161eebee19eSAlan Tull	};
162eebee19eSAlan Tull
163eebee19eSAlan Tull	temp@4c {
164eebee19eSAlan Tull		compatible = "maxim,max1619";
165eebee19eSAlan Tull		reg = <0x4c>;
166eebee19eSAlan Tull	};
167eebee19eSAlan Tull
168eebee19eSAlan Tull	eeprom@51 {
169eebee19eSAlan Tull		compatible = "atmel,24c32";
170eebee19eSAlan Tull		reg = <0x51>;
171eebee19eSAlan Tull		pagesize = <32>;
172eebee19eSAlan Tull	};
173eebee19eSAlan Tull
174eebee19eSAlan Tull	rtc@68 {
175eebee19eSAlan Tull		compatible = "dallas,ds1339";
176eebee19eSAlan Tull		reg = <0x68>;
177eebee19eSAlan Tull	};
178eebee19eSAlan Tull};
1790cb140d0SThor Thayer
1800cb140d0SThor Thayer&qspi {
181263a0269SDinh Nguyen	status = "okay";
1820cb140d0SThor Thayer	flash@0 {
1830cb140d0SThor Thayer		#address-cells = <1>;
1840cb140d0SThor Thayer		#size-cells = <1>;
185f126b670SDinh Nguyen		compatible = "micron,mt25qu02g", "jedec,spi-nor";
1860cb140d0SThor Thayer		reg = <0>;
1875fc670a8SDinh Nguyen		spi-max-frequency = <100000000>;
1880cb140d0SThor Thayer
1890cb140d0SThor Thayer		m25p,fast-read;
1900cb140d0SThor Thayer		cdns,page-size = <256>;
1910cb140d0SThor Thayer		cdns,block-size = <16>;
1920cb140d0SThor Thayer		cdns,read-delay = <1>;
1930cb140d0SThor Thayer		cdns,tshsl-ns = <50>;
1940cb140d0SThor Thayer		cdns,tsd2d-ns = <50>;
1950cb140d0SThor Thayer		cdns,tchsh-ns = <4>;
1960cb140d0SThor Thayer		cdns,tslch-ns = <4>;
1970cb140d0SThor Thayer
1980cb140d0SThor Thayer		partitions {
1990cb140d0SThor Thayer			compatible = "fixed-partitions";
2000cb140d0SThor Thayer			#address-cells = <1>;
2010cb140d0SThor Thayer			#size-cells = <1>;
2020cb140d0SThor Thayer
2030cb140d0SThor Thayer			qspi_boot: partition@0 {
2040cb140d0SThor Thayer				label = "Boot and fpga data";
20580f132d7SJoyce Ooi				reg = <0x0 0x04200000>;
2060cb140d0SThor Thayer			};
2070cb140d0SThor Thayer
20880f132d7SJoyce Ooi			root: partition@4200000 {
2090cb140d0SThor Thayer				label = "Root Filesystem - UBIFS";
21080f132d7SJoyce Ooi				reg = <0x04200000 0x0BE00000>;
2110cb140d0SThor Thayer			};
2120cb140d0SThor Thayer		};
2130cb140d0SThor Thayer	};
2140cb140d0SThor Thayer};
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