19c4566a1SDinh Nguyen /* 29c4566a1SDinh Nguyen * Copyright 2012 Pavel Machek <pavel@denx.de> 39c4566a1SDinh Nguyen * Copyright (C) 2012 Altera Corporation 49c4566a1SDinh Nguyen * 59c4566a1SDinh Nguyen * This program is free software; you can redistribute it and/or modify 69c4566a1SDinh Nguyen * it under the terms of the GNU General Public License as published by 79c4566a1SDinh Nguyen * the Free Software Foundation; either version 2 of the License, or 89c4566a1SDinh Nguyen * (at your option) any later version. 99c4566a1SDinh Nguyen * 109c4566a1SDinh Nguyen * This program is distributed in the hope that it will be useful, 119c4566a1SDinh Nguyen * but WITHOUT ANY WARRANTY; without even the implied warranty of 129c4566a1SDinh Nguyen * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 139c4566a1SDinh Nguyen * GNU General Public License for more details. 149c4566a1SDinh Nguyen * 159c4566a1SDinh Nguyen * You should have received a copy of the GNU General Public License 169c4566a1SDinh Nguyen * along with this program; if not, write to the Free Software 179c4566a1SDinh Nguyen * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 189c4566a1SDinh Nguyen */ 199c4566a1SDinh Nguyen 209c4566a1SDinh Nguyen #ifndef __MACH_CORE_H 219c4566a1SDinh Nguyen #define __MACH_CORE_H 229c4566a1SDinh Nguyen 235c04b57fSDinh Nguyen #define SOCFPGA_RSTMGR_CTRL 0x04 24d686ce42SAlan Tull #define SOCFPGA_RSTMGR_MODMPURST 0x10 255c04b57fSDinh Nguyen #define SOCFPGA_RSTMGR_MODPERRST 0x14 265c04b57fSDinh Nguyen #define SOCFPGA_RSTMGR_BRGMODRST 0x1c 275c04b57fSDinh Nguyen 285c04b57fSDinh Nguyen /* System Manager bits */ 295c04b57fSDinh Nguyen #define RSTMGR_CTRL_SWCOLDRSTREQ 0x1 /* Cold Reset */ 305c04b57fSDinh Nguyen #define RSTMGR_CTRL_SWWARMRSTREQ 0x2 /* Warm Reset */ 315c04b57fSDinh Nguyen 32d686ce42SAlan Tull #define RSTMGR_MPUMODRST_CPU1 0x2 /* CPU1 Reset */ 33d686ce42SAlan Tull 34d6dd735fSDinh Nguyen extern void socfpga_secondary_startup(void); 359c4566a1SDinh Nguyen extern void __iomem *socfpga_scu_base_addr; 369c4566a1SDinh Nguyen 379c4566a1SDinh Nguyen extern void socfpga_init_clocks(void); 389c4566a1SDinh Nguyen extern void socfpga_sysmgr_init(void); 399c4566a1SDinh Nguyen 405c04b57fSDinh Nguyen extern void __iomem *sys_manager_base_addr; 415c04b57fSDinh Nguyen extern void __iomem *rst_manager_base_addr; 425c04b57fSDinh Nguyen 439c4566a1SDinh Nguyen extern struct smp_operations socfpga_smp_ops; 449c4566a1SDinh Nguyen extern char secondary_trampoline, secondary_trampoline_end; 459c4566a1SDinh Nguyen 463a4356c0SDinh Nguyen extern unsigned long socfpga_cpu1start_addr; 47d6dd735fSDinh Nguyen 48de04261dSVince Bridgers #define SOCFPGA_SCU_VIRT_BASE 0xfee00000 499c4566a1SDinh Nguyen 509c4566a1SDinh Nguyen #endif 51