1 /*
2  * R-Car Generation 2 support
3  *
4  * Copyright (C) 2013  Renesas Solutions Corp.
5  * Copyright (C) 2013  Magnus Damm
6  * Copyright (C) 2014  Ulrich Hecht
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; version 2 of the License.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
17 
18 #include <linux/clk-provider.h>
19 #include <linux/clocksource.h>
20 #include <linux/device.h>
21 #include <linux/dma-contiguous.h>
22 #include <linux/io.h>
23 #include <linux/kernel.h>
24 #include <linux/memblock.h>
25 #include <linux/of.h>
26 #include <linux/of_fdt.h>
27 #include <linux/of_platform.h>
28 #include <asm/mach/arch.h>
29 #include "common.h"
30 #include "rcar-gen2.h"
31 
32 static const struct of_device_id cpg_matches[] __initconst = {
33 	{ .compatible = "renesas,rcar-gen2-cpg-clocks", },
34 	{ .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" },
35 	{ .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" },
36 	{ .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" },
37 	{ .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" },
38 	{ /* sentinel */ }
39 };
40 
41 static unsigned int __init get_extal_freq(void)
42 {
43 	const struct of_device_id *match;
44 	struct device_node *cpg, *extal;
45 	u32 freq = 20000000;
46 	int idx = 0;
47 
48 	cpg = of_find_matching_node_and_match(NULL, cpg_matches, &match);
49 	if (!cpg)
50 		return freq;
51 
52 	if (match->data)
53 		idx = of_property_match_string(cpg, "clock-names", match->data);
54 	extal = of_parse_phandle(cpg, "clocks", idx);
55 	of_node_put(cpg);
56 	if (!extal)
57 		return freq;
58 
59 	of_property_read_u32(extal, "clock-frequency", &freq);
60 	of_node_put(extal);
61 	return freq;
62 }
63 
64 #define CNTCR 0
65 #define CNTFID0 0x20
66 
67 void __init rcar_gen2_timer_init(void)
68 {
69 #ifdef CONFIG_ARM_ARCH_TIMER
70 	void __iomem *base;
71 	u32 freq;
72 
73 	if (of_machine_is_compatible("renesas,r8a7745") ||
74 	    of_machine_is_compatible("renesas,r8a7792") ||
75 	    of_machine_is_compatible("renesas,r8a7794")) {
76 		freq = 260000000 / 8;	/* ZS / 8 */
77 		/* CNTVOFF has to be initialized either from non-secure
78 		 * Hypervisor mode or secure Monitor mode with SCR.NS==1.
79 		 * If TrustZone is enabled then it should be handled by the
80 		 * secure code.
81 		 */
82 		asm volatile(
83 		"	cps	0x16\n"
84 		"	mrc	p15, 0, r1, c1, c1, 0\n"
85 		"	orr	r0, r1, #1\n"
86 		"	mcr	p15, 0, r0, c1, c1, 0\n"
87 		"	isb\n"
88 		"	mov	r0, #0\n"
89 		"	mcrr	p15, 4, r0, r0, c14\n"
90 		"	isb\n"
91 		"	mcr	p15, 0, r1, c1, c1, 0\n"
92 		"	isb\n"
93 		"	cps	0x13\n"
94 			: : : "r0", "r1");
95 	} else {
96 		/* At Linux boot time the r8a7790 arch timer comes up
97 		 * with the counter disabled. Moreover, it may also report
98 		 * a potentially incorrect fixed 13 MHz frequency. To be
99 		 * correct these registers need to be updated to use the
100 		 * frequency EXTAL / 2.
101 		 */
102 		freq = get_extal_freq() / 2;
103 	}
104 
105 	/* Remap "armgcnt address map" space */
106 	base = ioremap(0xe6080000, PAGE_SIZE);
107 
108 	/*
109 	 * Update the timer if it is either not running, or is not at the
110 	 * right frequency. The timer is only configurable in secure mode
111 	 * so this avoids an abort if the loader started the timer and
112 	 * entered the kernel in non-secure mode.
113 	 */
114 
115 	if ((ioread32(base + CNTCR) & 1) == 0 ||
116 	    ioread32(base + CNTFID0) != freq) {
117 		/* Update registers with correct frequency */
118 		iowrite32(freq, base + CNTFID0);
119 		asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
120 
121 		/* make sure arch timer is started by setting bit 0 of CNTCR */
122 		iowrite32(1, base + CNTCR);
123 	}
124 
125 	iounmap(base);
126 #endif /* CONFIG_ARM_ARCH_TIMER */
127 
128 	of_clk_init(NULL);
129 	timer_probe();
130 }
131 
132 struct memory_reserve_config {
133 	u64 reserved;
134 	u64 base, size;
135 };
136 
137 static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname,
138 				     int depth, void *data)
139 {
140 	const char *type = of_get_flat_dt_prop(node, "device_type", NULL);
141 	const __be32 *reg, *endp;
142 	int l;
143 	struct memory_reserve_config *mrc = data;
144 	u64 lpae_start = 1ULL << 32;
145 
146 	/* We are scanning "memory" nodes only */
147 	if (type == NULL || strcmp(type, "memory"))
148 		return 0;
149 
150 	reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l);
151 	if (reg == NULL)
152 		reg = of_get_flat_dt_prop(node, "reg", &l);
153 	if (reg == NULL)
154 		return 0;
155 
156 	endp = reg + (l / sizeof(__be32));
157 	while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) {
158 		u64 base, size;
159 
160 		base = dt_mem_next_cell(dt_root_addr_cells, &reg);
161 		size = dt_mem_next_cell(dt_root_size_cells, &reg);
162 
163 		if (base >= lpae_start)
164 			continue;
165 
166 		if ((base + size) >= lpae_start)
167 			size = lpae_start - base;
168 
169 		if (size < mrc->reserved)
170 			continue;
171 
172 		if (base < mrc->base)
173 			continue;
174 
175 		/* keep the area at top near the 32-bit legacy limit */
176 		mrc->base = base + size - mrc->reserved;
177 		mrc->size = mrc->reserved;
178 	}
179 
180 	return 0;
181 }
182 
183 void __init rcar_gen2_reserve(void)
184 {
185 	struct memory_reserve_config mrc;
186 
187 	/* reserve 256 MiB at the top of the physical legacy 32-bit space */
188 	memset(&mrc, 0, sizeof(mrc));
189 	mrc.reserved = SZ_256M;
190 
191 	of_scan_flat_dt(rcar_gen2_scan_mem, &mrc);
192 #ifdef CONFIG_DMA_CMA
193 	if (mrc.size && memblock_is_region_memory(mrc.base, mrc.size)) {
194 		static struct cma *rcar_gen2_dma_contiguous;
195 
196 		dma_contiguous_reserve_area(mrc.size, mrc.base, 0,
197 					    &rcar_gen2_dma_contiguous, true);
198 	}
199 #endif
200 }
201 
202 static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
203 	/*
204 	 * R8A7790 and R8A7791 can't be handled here as long as they need SMP
205 	 * initialization fallback.
206 	 */
207 	"renesas,r8a7792",
208 	"renesas,r8a7793",
209 	"renesas,r8a7794",
210 	NULL,
211 };
212 
213 DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
214 	.init_early	= shmobile_init_delay,
215 	.init_late	= shmobile_init_late,
216 	.init_time	= rcar_gen2_timer_init,
217 	.reserve	= rcar_gen2_reserve,
218 	.dt_compat	= rcar_gen2_boards_compat_dt,
219 MACHINE_END
220 
221 static const char * const rz_g1_boards_compat_dt[] __initconst = {
222 	"renesas,r8a7743",
223 	"renesas,r8a7745",
224 	NULL,
225 };
226 
227 DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
228 	.init_early	= shmobile_init_delay,
229 	.init_late	= shmobile_init_late,
230 	.init_time	= rcar_gen2_timer_init,
231 	.reserve	= rcar_gen2_reserve,
232 	.dt_compat	= rz_g1_boards_compat_dt,
233 MACHINE_END
234