1 /* 2 * R-Car Generation 2 support 3 * 4 * Copyright (C) 2013 Renesas Solutions Corp. 5 * Copyright (C) 2013 Magnus Damm 6 * Copyright (C) 2014 Ulrich Hecht 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; version 2 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/clk-provider.h> 19 #include <linux/clocksource.h> 20 #include <linux/device.h> 21 #include <linux/dma-contiguous.h> 22 #include <linux/io.h> 23 #include <linux/kernel.h> 24 #include <linux/memblock.h> 25 #include <linux/of.h> 26 #include <linux/of_fdt.h> 27 #include <linux/of_platform.h> 28 #include <asm/mach/arch.h> 29 #include <asm/secure_cntvoff.h> 30 #include "common.h" 31 #include "rcar-gen2.h" 32 33 static const struct of_device_id cpg_matches[] __initconst = { 34 { .compatible = "renesas,rcar-gen2-cpg-clocks", }, 35 { .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" }, 36 { .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" }, 37 { .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" }, 38 { .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" }, 39 { /* sentinel */ } 40 }; 41 42 static unsigned int __init get_extal_freq(void) 43 { 44 const struct of_device_id *match; 45 struct device_node *cpg, *extal; 46 u32 freq = 20000000; 47 int idx = 0; 48 49 cpg = of_find_matching_node_and_match(NULL, cpg_matches, &match); 50 if (!cpg) 51 return freq; 52 53 if (match->data) 54 idx = of_property_match_string(cpg, "clock-names", match->data); 55 extal = of_parse_phandle(cpg, "clocks", idx); 56 of_node_put(cpg); 57 if (!extal) 58 return freq; 59 60 of_property_read_u32(extal, "clock-frequency", &freq); 61 of_node_put(extal); 62 return freq; 63 } 64 65 #define CNTCR 0 66 #define CNTFID0 0x20 67 68 void __init rcar_gen2_timer_init(void) 69 { 70 #ifdef CONFIG_ARM_ARCH_TIMER 71 void __iomem *base; 72 u32 freq; 73 74 secure_cntvoff_init(); 75 76 if (of_machine_is_compatible("renesas,r8a7745") || 77 of_machine_is_compatible("renesas,r8a77470") || 78 of_machine_is_compatible("renesas,r8a7792") || 79 of_machine_is_compatible("renesas,r8a7794")) { 80 freq = 260000000 / 8; /* ZS / 8 */ 81 } else { 82 /* At Linux boot time the r8a7790 arch timer comes up 83 * with the counter disabled. Moreover, it may also report 84 * a potentially incorrect fixed 13 MHz frequency. To be 85 * correct these registers need to be updated to use the 86 * frequency EXTAL / 2. 87 */ 88 freq = get_extal_freq() / 2; 89 } 90 91 /* Remap "armgcnt address map" space */ 92 base = ioremap(0xe6080000, PAGE_SIZE); 93 94 /* 95 * Update the timer if it is either not running, or is not at the 96 * right frequency. The timer is only configurable in secure mode 97 * so this avoids an abort if the loader started the timer and 98 * entered the kernel in non-secure mode. 99 */ 100 101 if ((ioread32(base + CNTCR) & 1) == 0 || 102 ioread32(base + CNTFID0) != freq) { 103 /* Update registers with correct frequency */ 104 iowrite32(freq, base + CNTFID0); 105 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); 106 107 /* make sure arch timer is started by setting bit 0 of CNTCR */ 108 iowrite32(1, base + CNTCR); 109 } 110 111 iounmap(base); 112 #endif /* CONFIG_ARM_ARCH_TIMER */ 113 114 of_clk_init(NULL); 115 timer_probe(); 116 } 117 118 struct memory_reserve_config { 119 u64 reserved; 120 u64 base, size; 121 }; 122 123 static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname, 124 int depth, void *data) 125 { 126 const char *type = of_get_flat_dt_prop(node, "device_type", NULL); 127 const __be32 *reg, *endp; 128 int l; 129 struct memory_reserve_config *mrc = data; 130 u64 lpae_start = 1ULL << 32; 131 132 /* We are scanning "memory" nodes only */ 133 if (type == NULL || strcmp(type, "memory")) 134 return 0; 135 136 reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l); 137 if (reg == NULL) 138 reg = of_get_flat_dt_prop(node, "reg", &l); 139 if (reg == NULL) 140 return 0; 141 142 endp = reg + (l / sizeof(__be32)); 143 while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) { 144 u64 base, size; 145 146 base = dt_mem_next_cell(dt_root_addr_cells, ®); 147 size = dt_mem_next_cell(dt_root_size_cells, ®); 148 149 if (base >= lpae_start) 150 continue; 151 152 if ((base + size) >= lpae_start) 153 size = lpae_start - base; 154 155 if (size < mrc->reserved) 156 continue; 157 158 if (base < mrc->base) 159 continue; 160 161 /* keep the area at top near the 32-bit legacy limit */ 162 mrc->base = base + size - mrc->reserved; 163 mrc->size = mrc->reserved; 164 } 165 166 return 0; 167 } 168 169 void __init rcar_gen2_reserve(void) 170 { 171 struct memory_reserve_config mrc; 172 173 /* reserve 256 MiB at the top of the physical legacy 32-bit space */ 174 memset(&mrc, 0, sizeof(mrc)); 175 mrc.reserved = SZ_256M; 176 177 of_scan_flat_dt(rcar_gen2_scan_mem, &mrc); 178 #ifdef CONFIG_DMA_CMA 179 if (mrc.size && memblock_is_region_memory(mrc.base, mrc.size)) { 180 static struct cma *rcar_gen2_dma_contiguous; 181 182 dma_contiguous_reserve_area(mrc.size, mrc.base, 0, 183 &rcar_gen2_dma_contiguous, true); 184 } 185 #endif 186 } 187 188 static const char * const rcar_gen2_boards_compat_dt[] __initconst = { 189 /* 190 * R8A7790 and R8A7791 can't be handled here as long as they need SMP 191 * initialization fallback. 192 */ 193 "renesas,r8a7792", 194 "renesas,r8a7793", 195 "renesas,r8a7794", 196 NULL, 197 }; 198 199 DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)") 200 .init_early = shmobile_init_delay, 201 .init_late = shmobile_init_late, 202 .init_time = rcar_gen2_timer_init, 203 .reserve = rcar_gen2_reserve, 204 .dt_compat = rcar_gen2_boards_compat_dt, 205 MACHINE_END 206 207 static const char * const rz_g1_boards_compat_dt[] __initconst = { 208 "renesas,r8a7743", 209 "renesas,r8a7745", 210 "renesas,r8a77470", 211 NULL, 212 }; 213 214 DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)") 215 .init_early = shmobile_init_delay, 216 .init_late = shmobile_init_late, 217 .init_time = rcar_gen2_timer_init, 218 .reserve = rcar_gen2_reserve, 219 .dt_compat = rz_g1_boards_compat_dt, 220 MACHINE_END 221