1 /* 2 * R-Car Generation 2 support 3 * 4 * Copyright (C) 2013 Renesas Solutions Corp. 5 * Copyright (C) 2013 Magnus Damm 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19 */ 20 21 #include <linux/clk/shmobile.h> 22 #include <linux/clocksource.h> 23 #include <linux/io.h> 24 #include <linux/kernel.h> 25 #include <mach/common.h> 26 #include <mach/rcar-gen2.h> 27 #include <asm/mach/arch.h> 28 29 #define MODEMR 0xe6160060 30 31 u32 rcar_gen2_read_mode_pins(void) 32 { 33 static u32 mode; 34 static bool mode_valid; 35 36 if (!mode_valid) { 37 void __iomem *modemr = ioremap_nocache(MODEMR, 4); 38 BUG_ON(!modemr); 39 mode = ioread32(modemr); 40 iounmap(modemr); 41 mode_valid = true; 42 } 43 44 return mode; 45 } 46 47 #define CNTCR 0 48 #define CNTFID0 0x20 49 50 void __init rcar_gen2_timer_init(void) 51 { 52 #if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK) 53 u32 mode = rcar_gen2_read_mode_pins(); 54 #endif 55 #ifdef CONFIG_ARM_ARCH_TIMER 56 void __iomem *base; 57 int extal_mhz = 0; 58 u32 freq; 59 60 /* At Linux boot time the r8a7790 arch timer comes up 61 * with the counter disabled. Moreover, it may also report 62 * a potentially incorrect fixed 13 MHz frequency. To be 63 * correct these registers need to be updated to use the 64 * frequency EXTAL / 2 which can be determined by the MD pins. 65 */ 66 67 switch (mode & (MD(14) | MD(13))) { 68 case 0: 69 extal_mhz = 15; 70 break; 71 case MD(13): 72 extal_mhz = 20; 73 break; 74 case MD(14): 75 extal_mhz = 26; 76 break; 77 case MD(13) | MD(14): 78 extal_mhz = 30; 79 break; 80 } 81 82 /* The arch timer frequency equals EXTAL / 2 */ 83 freq = extal_mhz * (1000000 / 2); 84 85 /* Remap "armgcnt address map" space */ 86 base = ioremap(0xe6080000, PAGE_SIZE); 87 88 /* 89 * Update the timer if it is either not running, or is not at the 90 * right frequency. The timer is only configurable in secure mode 91 * so this avoids an abort if the loader started the timer and 92 * entered the kernel in non-secure mode. 93 */ 94 95 if ((ioread32(base + CNTCR) & 1) == 0 || 96 ioread32(base + CNTFID0) != freq) { 97 /* Update registers with correct frequency */ 98 iowrite32(freq, base + CNTFID0); 99 asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); 100 101 /* make sure arch timer is started by setting bit 0 of CNTCR */ 102 iowrite32(1, base + CNTCR); 103 } 104 105 iounmap(base); 106 #endif /* CONFIG_ARM_ARCH_TIMER */ 107 108 #ifdef CONFIG_COMMON_CLK 109 rcar_gen2_clocks_init(mode); 110 #endif 111 clocksource_of_init(); 112 } 113