1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * linux/arch/arm/mach-sa1100/neponset.c 4 */ 5 #include <linux/err.h> 6 #include <linux/init.h> 7 #include <linux/ioport.h> 8 #include <linux/irq.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/platform_data/sa11x0-serial.h> 12 #include <linux/platform_device.h> 13 #include <linux/pm.h> 14 #include <linux/serial_core.h> 15 #include <linux/slab.h> 16 #include <linux/smc91x.h> 17 18 #include <asm/mach-types.h> 19 #include <asm/mach/map.h> 20 #include <asm/hardware/sa1111.h> 21 #include <asm/sizes.h> 22 23 #include <mach/hardware.h> 24 #include <mach/assabet.h> 25 #include <mach/neponset.h> 26 #include <mach/irqs.h> 27 28 #define NEP_IRQ_SMC91X 0 29 #define NEP_IRQ_USAR 1 30 #define NEP_IRQ_SA1111 2 31 #define NEP_IRQ_NR 3 32 33 #define WHOAMI 0x00 34 #define LEDS 0x10 35 #define SWPK 0x20 36 #define IRR 0x24 37 #define KP_Y_IN 0x80 38 #define KP_X_OUT 0x90 39 #define NCR_0 0xa0 40 #define MDM_CTL_0 0xb0 41 #define MDM_CTL_1 0xb4 42 #define AUD_CTL 0xc0 43 44 #define IRR_ETHERNET (1 << 0) 45 #define IRR_USAR (1 << 1) 46 #define IRR_SA1111 (1 << 2) 47 48 #define MDM_CTL0_RTS1 (1 << 0) 49 #define MDM_CTL0_DTR1 (1 << 1) 50 #define MDM_CTL0_RTS2 (1 << 2) 51 #define MDM_CTL0_DTR2 (1 << 3) 52 53 #define MDM_CTL1_CTS1 (1 << 0) 54 #define MDM_CTL1_DSR1 (1 << 1) 55 #define MDM_CTL1_DCD1 (1 << 2) 56 #define MDM_CTL1_CTS2 (1 << 3) 57 #define MDM_CTL1_DSR2 (1 << 4) 58 #define MDM_CTL1_DCD2 (1 << 5) 59 60 #define AUD_SEL_1341 (1 << 0) 61 #define AUD_MUTE_1341 (1 << 1) 62 63 extern void sa1110_mb_disable(void); 64 65 struct neponset_drvdata { 66 void __iomem *base; 67 struct platform_device *sa1111; 68 struct platform_device *smc91x; 69 unsigned irq_base; 70 #ifdef CONFIG_PM_SLEEP 71 u32 ncr0; 72 u32 mdm_ctl_0; 73 #endif 74 }; 75 76 static void __iomem *nep_base; 77 78 void neponset_ncr_frob(unsigned int mask, unsigned int val) 79 { 80 void __iomem *base = nep_base; 81 82 if (base) { 83 unsigned long flags; 84 unsigned v; 85 86 local_irq_save(flags); 87 v = readb_relaxed(base + NCR_0); 88 writeb_relaxed((v & ~mask) | val, base + NCR_0); 89 local_irq_restore(flags); 90 } else { 91 WARN(1, "nep_base unset\n"); 92 } 93 } 94 EXPORT_SYMBOL(neponset_ncr_frob); 95 96 static void neponset_set_mctrl(struct uart_port *port, u_int mctrl) 97 { 98 void __iomem *base = nep_base; 99 u_int mdm_ctl0; 100 101 if (!base) 102 return; 103 104 mdm_ctl0 = readb_relaxed(base + MDM_CTL_0); 105 if (port->mapbase == _Ser1UTCR0) { 106 if (mctrl & TIOCM_RTS) 107 mdm_ctl0 &= ~MDM_CTL0_RTS2; 108 else 109 mdm_ctl0 |= MDM_CTL0_RTS2; 110 111 if (mctrl & TIOCM_DTR) 112 mdm_ctl0 &= ~MDM_CTL0_DTR2; 113 else 114 mdm_ctl0 |= MDM_CTL0_DTR2; 115 } else if (port->mapbase == _Ser3UTCR0) { 116 if (mctrl & TIOCM_RTS) 117 mdm_ctl0 &= ~MDM_CTL0_RTS1; 118 else 119 mdm_ctl0 |= MDM_CTL0_RTS1; 120 121 if (mctrl & TIOCM_DTR) 122 mdm_ctl0 &= ~MDM_CTL0_DTR1; 123 else 124 mdm_ctl0 |= MDM_CTL0_DTR1; 125 } 126 127 writeb_relaxed(mdm_ctl0, base + MDM_CTL_0); 128 } 129 130 static u_int neponset_get_mctrl(struct uart_port *port) 131 { 132 void __iomem *base = nep_base; 133 u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; 134 u_int mdm_ctl1; 135 136 if (!base) 137 return ret; 138 139 mdm_ctl1 = readb_relaxed(base + MDM_CTL_1); 140 if (port->mapbase == _Ser1UTCR0) { 141 if (mdm_ctl1 & MDM_CTL1_DCD2) 142 ret &= ~TIOCM_CD; 143 if (mdm_ctl1 & MDM_CTL1_CTS2) 144 ret &= ~TIOCM_CTS; 145 if (mdm_ctl1 & MDM_CTL1_DSR2) 146 ret &= ~TIOCM_DSR; 147 } else if (port->mapbase == _Ser3UTCR0) { 148 if (mdm_ctl1 & MDM_CTL1_DCD1) 149 ret &= ~TIOCM_CD; 150 if (mdm_ctl1 & MDM_CTL1_CTS1) 151 ret &= ~TIOCM_CTS; 152 if (mdm_ctl1 & MDM_CTL1_DSR1) 153 ret &= ~TIOCM_DSR; 154 } 155 156 return ret; 157 } 158 159 static struct sa1100_port_fns neponset_port_fns = { 160 .set_mctrl = neponset_set_mctrl, 161 .get_mctrl = neponset_get_mctrl, 162 }; 163 164 /* 165 * Install handler for Neponset IRQ. Note that we have to loop here 166 * since the ETHERNET and USAR IRQs are level based, and we need to 167 * ensure that the IRQ signal is deasserted before returning. This 168 * is rather unfortunate. 169 */ 170 static void neponset_irq_handler(struct irq_desc *desc) 171 { 172 struct neponset_drvdata *d = irq_desc_get_handler_data(desc); 173 unsigned int irr; 174 175 while (1) { 176 /* 177 * Acknowledge the parent IRQ. 178 */ 179 desc->irq_data.chip->irq_ack(&desc->irq_data); 180 181 /* 182 * Read the interrupt reason register. Let's have all 183 * active IRQ bits high. Note: there is a typo in the 184 * Neponset user's guide for the SA1111 IRR level. 185 */ 186 irr = readb_relaxed(d->base + IRR); 187 irr ^= IRR_ETHERNET | IRR_USAR; 188 189 if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0) 190 break; 191 192 /* 193 * Since there is no individual mask, we have to 194 * mask the parent IRQ. This is safe, since we'll 195 * recheck the register for any pending IRQs. 196 */ 197 if (irr & (IRR_ETHERNET | IRR_USAR)) { 198 desc->irq_data.chip->irq_mask(&desc->irq_data); 199 200 /* 201 * Ack the interrupt now to prevent re-entering 202 * this neponset handler. Again, this is safe 203 * since we'll check the IRR register prior to 204 * leaving. 205 */ 206 desc->irq_data.chip->irq_ack(&desc->irq_data); 207 208 if (irr & IRR_ETHERNET) 209 generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X); 210 211 if (irr & IRR_USAR) 212 generic_handle_irq(d->irq_base + NEP_IRQ_USAR); 213 214 desc->irq_data.chip->irq_unmask(&desc->irq_data); 215 } 216 217 if (irr & IRR_SA1111) 218 generic_handle_irq(d->irq_base + NEP_IRQ_SA1111); 219 } 220 } 221 222 /* Yes, we really do not have any kind of masking or unmasking */ 223 static void nochip_noop(struct irq_data *irq) 224 { 225 } 226 227 static struct irq_chip nochip = { 228 .name = "neponset", 229 .irq_ack = nochip_noop, 230 .irq_mask = nochip_noop, 231 .irq_unmask = nochip_noop, 232 }; 233 234 static struct sa1111_platform_data sa1111_info = { 235 .disable_devs = SA1111_DEVID_PS2_MSE, 236 }; 237 238 static int neponset_probe(struct platform_device *dev) 239 { 240 struct neponset_drvdata *d; 241 struct resource *nep_res, *sa1111_res, *smc91x_res; 242 struct resource sa1111_resources[] = { 243 DEFINE_RES_MEM(0x40000000, SZ_8K), 244 { .flags = IORESOURCE_IRQ }, 245 }; 246 struct platform_device_info sa1111_devinfo = { 247 .parent = &dev->dev, 248 .name = "sa1111", 249 .id = 0, 250 .res = sa1111_resources, 251 .num_res = ARRAY_SIZE(sa1111_resources), 252 .data = &sa1111_info, 253 .size_data = sizeof(sa1111_info), 254 .dma_mask = 0xffffffffUL, 255 }; 256 struct resource smc91x_resources[] = { 257 DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS, 258 0x02000000, "smc91x-regs"), 259 DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000, 260 0x02000000, "smc91x-attrib"), 261 { .flags = IORESOURCE_IRQ }, 262 }; 263 struct smc91x_platdata smc91x_platdata = { 264 .flags = SMC91X_USE_8BIT | SMC91X_IO_SHIFT_2 | SMC91X_NOWAIT, 265 }; 266 struct platform_device_info smc91x_devinfo = { 267 .parent = &dev->dev, 268 .name = "smc91x", 269 .id = 0, 270 .res = smc91x_resources, 271 .num_res = ARRAY_SIZE(smc91x_resources), 272 .data = &smc91x_platdata, 273 .size_data = sizeof(smc91x_platdata), 274 }; 275 int ret, irq; 276 277 if (nep_base) 278 return -EBUSY; 279 280 irq = ret = platform_get_irq(dev, 0); 281 if (ret < 0) 282 goto err_alloc; 283 284 nep_res = platform_get_resource(dev, IORESOURCE_MEM, 0); 285 smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1); 286 sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2); 287 if (!nep_res || !smc91x_res || !sa1111_res) { 288 ret = -ENXIO; 289 goto err_alloc; 290 } 291 292 d = kzalloc(sizeof(*d), GFP_KERNEL); 293 if (!d) { 294 ret = -ENOMEM; 295 goto err_alloc; 296 } 297 298 d->base = ioremap(nep_res->start, SZ_4K); 299 if (!d->base) { 300 ret = -ENOMEM; 301 goto err_ioremap; 302 } 303 304 if (readb_relaxed(d->base + WHOAMI) != 0x11) { 305 dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n", 306 readb_relaxed(d->base + WHOAMI)); 307 ret = -ENODEV; 308 goto err_id; 309 } 310 311 ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1); 312 if (ret <= 0) { 313 dev_err(&dev->dev, "unable to allocate %u irqs: %d\n", 314 NEP_IRQ_NR, ret); 315 if (ret == 0) 316 ret = -ENOMEM; 317 goto err_irq_alloc; 318 } 319 320 d->irq_base = ret; 321 322 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip, 323 handle_simple_irq); 324 irq_clear_status_flags(d->irq_base + NEP_IRQ_SMC91X, IRQ_NOREQUEST | IRQ_NOPROBE); 325 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip, 326 handle_simple_irq); 327 irq_clear_status_flags(d->irq_base + NEP_IRQ_USAR, IRQ_NOREQUEST | IRQ_NOPROBE); 328 irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip); 329 330 irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); 331 irq_set_chained_handler_and_data(irq, neponset_irq_handler, d); 332 333 /* 334 * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately 335 * something on the Neponset activates this IRQ on sleep (eth?) 336 */ 337 #if 0 338 enable_irq_wake(irq); 339 #endif 340 341 dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n", 342 d->irq_base, d->irq_base + NEP_IRQ_NR - 1); 343 nep_base = d->base; 344 345 sa1100_register_uart_fns(&neponset_port_fns); 346 347 /* Ensure that the memory bus request/grant signals are setup */ 348 sa1110_mb_disable(); 349 350 /* Disable GPIO 0/1 drivers so the buttons work on the Assabet */ 351 writeb_relaxed(NCR_GP01_OFF, d->base + NCR_0); 352 353 sa1111_resources[0].parent = sa1111_res; 354 sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111; 355 sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111; 356 d->sa1111 = platform_device_register_full(&sa1111_devinfo); 357 358 smc91x_resources[0].parent = smc91x_res; 359 smc91x_resources[1].parent = smc91x_res; 360 smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X; 361 smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X; 362 d->smc91x = platform_device_register_full(&smc91x_devinfo); 363 364 platform_set_drvdata(dev, d); 365 366 return 0; 367 368 err_irq_alloc: 369 err_id: 370 iounmap(d->base); 371 err_ioremap: 372 kfree(d); 373 err_alloc: 374 return ret; 375 } 376 377 static int neponset_remove(struct platform_device *dev) 378 { 379 struct neponset_drvdata *d = platform_get_drvdata(dev); 380 int irq = platform_get_irq(dev, 0); 381 382 if (!IS_ERR(d->sa1111)) 383 platform_device_unregister(d->sa1111); 384 if (!IS_ERR(d->smc91x)) 385 platform_device_unregister(d->smc91x); 386 irq_set_chained_handler(irq, NULL); 387 irq_free_descs(d->irq_base, NEP_IRQ_NR); 388 nep_base = NULL; 389 iounmap(d->base); 390 kfree(d); 391 392 return 0; 393 } 394 395 #ifdef CONFIG_PM_SLEEP 396 static int neponset_suspend(struct device *dev) 397 { 398 struct neponset_drvdata *d = dev_get_drvdata(dev); 399 400 d->ncr0 = readb_relaxed(d->base + NCR_0); 401 d->mdm_ctl_0 = readb_relaxed(d->base + MDM_CTL_0); 402 403 return 0; 404 } 405 406 static int neponset_resume(struct device *dev) 407 { 408 struct neponset_drvdata *d = dev_get_drvdata(dev); 409 410 writeb_relaxed(d->ncr0, d->base + NCR_0); 411 writeb_relaxed(d->mdm_ctl_0, d->base + MDM_CTL_0); 412 413 return 0; 414 } 415 416 static const struct dev_pm_ops neponset_pm_ops = { 417 .suspend_noirq = neponset_suspend, 418 .resume_noirq = neponset_resume, 419 .freeze_noirq = neponset_suspend, 420 .restore_noirq = neponset_resume, 421 }; 422 #define PM_OPS &neponset_pm_ops 423 #else 424 #define PM_OPS NULL 425 #endif 426 427 static struct platform_driver neponset_device_driver = { 428 .probe = neponset_probe, 429 .remove = neponset_remove, 430 .driver = { 431 .name = "neponset", 432 .pm = PM_OPS, 433 }, 434 }; 435 436 static int __init neponset_init(void) 437 { 438 return platform_driver_register(&neponset_device_driver); 439 } 440 441 subsys_initcall(neponset_init); 442