1 /* 2 * linux/arch/arm/mach-sa1100/neponset.c 3 */ 4 #include <linux/err.h> 5 #include <linux/init.h> 6 #include <linux/ioport.h> 7 #include <linux/irq.h> 8 #include <linux/kernel.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/pm.h> 12 #include <linux/serial_core.h> 13 #include <linux/slab.h> 14 15 #include <asm/mach-types.h> 16 #include <asm/mach/map.h> 17 #include <asm/mach/serial_sa1100.h> 18 #include <asm/hardware/sa1111.h> 19 #include <asm/sizes.h> 20 21 #include <mach/hardware.h> 22 #include <mach/assabet.h> 23 #include <mach/neponset.h> 24 25 #define NEP_IRQ_SMC91X 0 26 #define NEP_IRQ_USAR 1 27 #define NEP_IRQ_SA1111 2 28 #define NEP_IRQ_NR 3 29 30 extern void sa1110_mb_disable(void); 31 32 struct neponset_drvdata { 33 struct platform_device *sa1111; 34 struct platform_device *smc91x; 35 unsigned irq_base; 36 #ifdef CONFIG_PM_SLEEP 37 u32 ncr0; 38 u32 mdm_ctl_0; 39 #endif 40 }; 41 42 void neponset_ncr_frob(unsigned int mask, unsigned int val) 43 { 44 unsigned long flags; 45 46 local_irq_save(flags); 47 NCR_0 = (NCR_0 & ~mask) | val; 48 local_irq_restore(flags); 49 } 50 51 static void neponset_set_mctrl(struct uart_port *port, u_int mctrl) 52 { 53 u_int mdm_ctl0 = MDM_CTL_0; 54 55 if (port->mapbase == _Ser1UTCR0) { 56 if (mctrl & TIOCM_RTS) 57 mdm_ctl0 &= ~MDM_CTL0_RTS2; 58 else 59 mdm_ctl0 |= MDM_CTL0_RTS2; 60 61 if (mctrl & TIOCM_DTR) 62 mdm_ctl0 &= ~MDM_CTL0_DTR2; 63 else 64 mdm_ctl0 |= MDM_CTL0_DTR2; 65 } else if (port->mapbase == _Ser3UTCR0) { 66 if (mctrl & TIOCM_RTS) 67 mdm_ctl0 &= ~MDM_CTL0_RTS1; 68 else 69 mdm_ctl0 |= MDM_CTL0_RTS1; 70 71 if (mctrl & TIOCM_DTR) 72 mdm_ctl0 &= ~MDM_CTL0_DTR1; 73 else 74 mdm_ctl0 |= MDM_CTL0_DTR1; 75 } 76 77 MDM_CTL_0 = mdm_ctl0; 78 } 79 80 static u_int neponset_get_mctrl(struct uart_port *port) 81 { 82 u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; 83 u_int mdm_ctl1 = MDM_CTL_1; 84 85 if (port->mapbase == _Ser1UTCR0) { 86 if (mdm_ctl1 & MDM_CTL1_DCD2) 87 ret &= ~TIOCM_CD; 88 if (mdm_ctl1 & MDM_CTL1_CTS2) 89 ret &= ~TIOCM_CTS; 90 if (mdm_ctl1 & MDM_CTL1_DSR2) 91 ret &= ~TIOCM_DSR; 92 } else if (port->mapbase == _Ser3UTCR0) { 93 if (mdm_ctl1 & MDM_CTL1_DCD1) 94 ret &= ~TIOCM_CD; 95 if (mdm_ctl1 & MDM_CTL1_CTS1) 96 ret &= ~TIOCM_CTS; 97 if (mdm_ctl1 & MDM_CTL1_DSR1) 98 ret &= ~TIOCM_DSR; 99 } 100 101 return ret; 102 } 103 104 static struct sa1100_port_fns neponset_port_fns __devinitdata = { 105 .set_mctrl = neponset_set_mctrl, 106 .get_mctrl = neponset_get_mctrl, 107 }; 108 109 /* 110 * Install handler for Neponset IRQ. Note that we have to loop here 111 * since the ETHERNET and USAR IRQs are level based, and we need to 112 * ensure that the IRQ signal is deasserted before returning. This 113 * is rather unfortunate. 114 */ 115 static void neponset_irq_handler(unsigned int irq, struct irq_desc *desc) 116 { 117 struct neponset_drvdata *d = irq_desc_get_handler_data(desc); 118 unsigned int irr; 119 120 while (1) { 121 /* 122 * Acknowledge the parent IRQ. 123 */ 124 desc->irq_data.chip->irq_ack(&desc->irq_data); 125 126 /* 127 * Read the interrupt reason register. Let's have all 128 * active IRQ bits high. Note: there is a typo in the 129 * Neponset user's guide for the SA1111 IRR level. 130 */ 131 irr = IRR ^ (IRR_ETHERNET | IRR_USAR); 132 133 if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0) 134 break; 135 136 /* 137 * Since there is no individual mask, we have to 138 * mask the parent IRQ. This is safe, since we'll 139 * recheck the register for any pending IRQs. 140 */ 141 if (irr & (IRR_ETHERNET | IRR_USAR)) { 142 desc->irq_data.chip->irq_mask(&desc->irq_data); 143 144 /* 145 * Ack the interrupt now to prevent re-entering 146 * this neponset handler. Again, this is safe 147 * since we'll check the IRR register prior to 148 * leaving. 149 */ 150 desc->irq_data.chip->irq_ack(&desc->irq_data); 151 152 if (irr & IRR_ETHERNET) 153 generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X); 154 155 if (irr & IRR_USAR) 156 generic_handle_irq(d->irq_base + NEP_IRQ_USAR); 157 158 desc->irq_data.chip->irq_unmask(&desc->irq_data); 159 } 160 161 if (irr & IRR_SA1111) 162 generic_handle_irq(d->irq_base + NEP_IRQ_SA1111); 163 } 164 } 165 166 /* Yes, we really do not have any kind of masking or unmasking */ 167 static void nochip_noop(struct irq_data *irq) 168 { 169 } 170 171 static struct irq_chip nochip = { 172 .name = "neponset", 173 .irq_ack = nochip_noop, 174 .irq_mask = nochip_noop, 175 .irq_unmask = nochip_noop, 176 }; 177 178 static struct sa1111_platform_data sa1111_info = { 179 .irq_base = IRQ_BOARD_END, 180 }; 181 182 static int __devinit neponset_probe(struct platform_device *dev) 183 { 184 struct neponset_drvdata *d; 185 struct resource *sa1111_res, *smc91x_res; 186 struct resource sa1111_resources[] = { 187 DEFINE_RES_MEM(0x40000000, SZ_8K), 188 { .flags = IORESOURCE_IRQ }, 189 }; 190 struct platform_device_info sa1111_devinfo = { 191 .parent = &dev->dev, 192 .name = "sa1111", 193 .id = 0, 194 .res = sa1111_resources, 195 .num_res = ARRAY_SIZE(sa1111_resources), 196 .data = &sa1111_info, 197 .size_data = sizeof(sa1111_info), 198 .dma_mask = 0xffffffffUL, 199 }; 200 struct resource smc91x_resources[] = { 201 DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS, 202 0x02000000, "smc91x-regs"), 203 DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000, 204 0x02000000, "smc91x-attrib"), 205 { .flags = IORESOURCE_IRQ }, 206 }; 207 struct platform_device_info smc91x_devinfo = { 208 .parent = &dev->dev, 209 .name = "smc91x", 210 .id = 0, 211 .res = smc91x_resources, 212 .num_res = ARRAY_SIZE(smc91x_resources), 213 }; 214 int ret, irq; 215 216 irq = ret = platform_get_irq(dev, 0); 217 if (ret < 0) 218 goto err_alloc; 219 220 smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1); 221 sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2); 222 if (!smc91x_res || !sa1111_res) { 223 ret = -ENXIO; 224 goto err_alloc; 225 } 226 227 if (WHOAMI != 0x11) { 228 dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n", 229 WHOAMI); 230 ret = -ENODEV; 231 goto err_alloc; 232 } 233 234 d = kzalloc(sizeof(*d), GFP_KERNEL); 235 if (!d) { 236 ret = -ENOMEM; 237 goto err_alloc; 238 } 239 240 ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1); 241 if (ret <= 0) { 242 dev_err(&dev->dev, "unable to allocate %u irqs: %d\n", 243 NEP_IRQ_NR, ret); 244 if (ret == 0) 245 ret = -ENOMEM; 246 goto err_irq_alloc; 247 } 248 249 d->irq_base = ret; 250 251 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip, 252 handle_simple_irq); 253 set_irq_flags(d->irq_base + NEP_IRQ_SMC91X, IRQF_VALID | IRQF_PROBE); 254 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip, 255 handle_simple_irq); 256 set_irq_flags(d->irq_base + NEP_IRQ_USAR, IRQF_VALID | IRQF_PROBE); 257 irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip); 258 259 irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); 260 irq_set_handler_data(irq, d); 261 irq_set_chained_handler(irq, neponset_irq_handler); 262 263 /* 264 * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately 265 * something on the Neponset activates this IRQ on sleep (eth?) 266 */ 267 #if 0 268 enable_irq_wake(irq); 269 #endif 270 271 dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n", 272 d->irq_base, d->irq_base + NEP_IRQ_NR - 1); 273 274 sa1100_register_uart_fns(&neponset_port_fns); 275 276 /* Ensure that the memory bus request/grant signals are setup */ 277 sa1110_mb_disable(); 278 279 /* Disable GPIO 0/1 drivers so the buttons work on the Assabet */ 280 NCR_0 = NCR_GP01_OFF; 281 282 sa1111_resources[0].parent = sa1111_res; 283 sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111; 284 sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111; 285 d->sa1111 = platform_device_register_full(&sa1111_devinfo); 286 287 smc91x_resources[0].parent = smc91x_res; 288 smc91x_resources[1].parent = smc91x_res; 289 smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X; 290 smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X; 291 d->smc91x = platform_device_register_full(&smc91x_devinfo); 292 293 platform_set_drvdata(dev, d); 294 295 return 0; 296 297 err_irq_alloc: 298 kfree(d); 299 err_alloc: 300 return ret; 301 } 302 303 static int __devexit neponset_remove(struct platform_device *dev) 304 { 305 struct neponset_drvdata *d = platform_get_drvdata(dev); 306 int irq = platform_get_irq(dev, 0); 307 308 if (!IS_ERR(d->sa1111)) 309 platform_device_unregister(d->sa1111); 310 if (!IS_ERR(d->smc91x)) 311 platform_device_unregister(d->smc91x); 312 irq_set_chained_handler(irq, NULL); 313 irq_free_descs(d->irq_base, NEP_IRQ_NR); 314 kfree(d); 315 316 return 0; 317 } 318 319 #ifdef CONFIG_PM_SLEEP 320 static int neponset_suspend(struct device *dev) 321 { 322 struct neponset_drvdata *d = dev_get_drvdata(dev); 323 324 d->ncr0 = NCR_0; 325 d->mdm_ctl_0 = MDM_CTL_0; 326 327 return 0; 328 } 329 330 static int neponset_resume(struct device *dev) 331 { 332 struct neponset_drvdata *d = dev_get_drvdata(dev); 333 334 NCR_0 = d->ncr0; 335 MDM_CTL_0 = d->mdm_ctl_0; 336 337 return 0; 338 } 339 340 static const struct dev_pm_ops neponset_pm_ops = { 341 .suspend_noirq = neponset_suspend, 342 .resume_noirq = neponset_resume, 343 .freeze_noirq = neponset_suspend, 344 .restore_noirq = neponset_resume, 345 }; 346 #define PM_OPS &neponset_pm_ops 347 #else 348 #define PM_OPS NULL 349 #endif 350 351 static struct platform_driver neponset_device_driver = { 352 .probe = neponset_probe, 353 .remove = __devexit_p(neponset_remove), 354 .driver = { 355 .name = "neponset", 356 .owner = THIS_MODULE, 357 .pm = PM_OPS, 358 }, 359 }; 360 361 static int __init neponset_init(void) 362 { 363 return platform_driver_register(&neponset_device_driver); 364 } 365 366 subsys_initcall(neponset_init); 367 368 static struct map_desc neponset_io_desc[] __initdata = { 369 { /* System Registers */ 370 .virtual = 0xf3000000, 371 .pfn = __phys_to_pfn(0x10000000), 372 .length = SZ_1M, 373 .type = MT_DEVICE 374 }, { /* SA-1111 */ 375 .virtual = 0xf4000000, 376 .pfn = __phys_to_pfn(0x40000000), 377 .length = SZ_1M, 378 .type = MT_DEVICE 379 } 380 }; 381 382 void __init neponset_map_io(void) 383 { 384 iotable_init(neponset_io_desc, ARRAY_SIZE(neponset_io_desc)); 385 } 386