1 /* 2 * linux/arch/arm/mach-sa1100/neponset.c 3 */ 4 #include <linux/err.h> 5 #include <linux/init.h> 6 #include <linux/ioport.h> 7 #include <linux/kernel.h> 8 #include <linux/module.h> 9 #include <linux/platform_device.h> 10 #include <linux/serial_core.h> 11 #include <linux/slab.h> 12 13 #include <asm/mach-types.h> 14 #include <asm/irq.h> 15 #include <asm/mach/map.h> 16 #include <asm/mach/irq.h> 17 #include <asm/mach/serial_sa1100.h> 18 #include <asm/hardware/sa1111.h> 19 #include <asm/sizes.h> 20 21 #include <mach/hardware.h> 22 #include <mach/assabet.h> 23 #include <mach/neponset.h> 24 25 struct neponset_drvdata { 26 struct platform_device *sa1111; 27 struct platform_device *smc91x; 28 #ifdef CONFIG_PM_SLEEP 29 u32 ncr0; 30 u32 mdm_ctl_0; 31 #endif 32 }; 33 34 void neponset_ncr_frob(unsigned int mask, unsigned int val) 35 { 36 unsigned long flags; 37 38 local_irq_save(flags); 39 NCR_0 = (NCR_0 & ~mask) | val; 40 local_irq_restore(flags); 41 } 42 43 static void neponset_set_mctrl(struct uart_port *port, u_int mctrl) 44 { 45 u_int mdm_ctl0 = MDM_CTL_0; 46 47 if (port->mapbase == _Ser1UTCR0) { 48 if (mctrl & TIOCM_RTS) 49 mdm_ctl0 &= ~MDM_CTL0_RTS2; 50 else 51 mdm_ctl0 |= MDM_CTL0_RTS2; 52 53 if (mctrl & TIOCM_DTR) 54 mdm_ctl0 &= ~MDM_CTL0_DTR2; 55 else 56 mdm_ctl0 |= MDM_CTL0_DTR2; 57 } else if (port->mapbase == _Ser3UTCR0) { 58 if (mctrl & TIOCM_RTS) 59 mdm_ctl0 &= ~MDM_CTL0_RTS1; 60 else 61 mdm_ctl0 |= MDM_CTL0_RTS1; 62 63 if (mctrl & TIOCM_DTR) 64 mdm_ctl0 &= ~MDM_CTL0_DTR1; 65 else 66 mdm_ctl0 |= MDM_CTL0_DTR1; 67 } 68 69 MDM_CTL_0 = mdm_ctl0; 70 } 71 72 static u_int neponset_get_mctrl(struct uart_port *port) 73 { 74 u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; 75 u_int mdm_ctl1 = MDM_CTL_1; 76 77 if (port->mapbase == _Ser1UTCR0) { 78 if (mdm_ctl1 & MDM_CTL1_DCD2) 79 ret &= ~TIOCM_CD; 80 if (mdm_ctl1 & MDM_CTL1_CTS2) 81 ret &= ~TIOCM_CTS; 82 if (mdm_ctl1 & MDM_CTL1_DSR2) 83 ret &= ~TIOCM_DSR; 84 } else if (port->mapbase == _Ser3UTCR0) { 85 if (mdm_ctl1 & MDM_CTL1_DCD1) 86 ret &= ~TIOCM_CD; 87 if (mdm_ctl1 & MDM_CTL1_CTS1) 88 ret &= ~TIOCM_CTS; 89 if (mdm_ctl1 & MDM_CTL1_DSR1) 90 ret &= ~TIOCM_DSR; 91 } 92 93 return ret; 94 } 95 96 static struct sa1100_port_fns neponset_port_fns __devinitdata = { 97 .set_mctrl = neponset_set_mctrl, 98 .get_mctrl = neponset_get_mctrl, 99 }; 100 101 /* 102 * Install handler for Neponset IRQ. Note that we have to loop here 103 * since the ETHERNET and USAR IRQs are level based, and we need to 104 * ensure that the IRQ signal is deasserted before returning. This 105 * is rather unfortunate. 106 */ 107 static void 108 neponset_irq_handler(unsigned int irq, struct irq_desc *desc) 109 { 110 unsigned int irr; 111 112 while (1) { 113 /* 114 * Acknowledge the parent IRQ. 115 */ 116 desc->irq_data.chip->irq_ack(&desc->irq_data); 117 118 /* 119 * Read the interrupt reason register. Let's have all 120 * active IRQ bits high. Note: there is a typo in the 121 * Neponset user's guide for the SA1111 IRR level. 122 */ 123 irr = IRR ^ (IRR_ETHERNET | IRR_USAR); 124 125 if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0) 126 break; 127 128 /* 129 * Since there is no individual mask, we have to 130 * mask the parent IRQ. This is safe, since we'll 131 * recheck the register for any pending IRQs. 132 */ 133 if (irr & (IRR_ETHERNET | IRR_USAR)) { 134 desc->irq_data.chip->irq_mask(&desc->irq_data); 135 136 /* 137 * Ack the interrupt now to prevent re-entering 138 * this neponset handler. Again, this is safe 139 * since we'll check the IRR register prior to 140 * leaving. 141 */ 142 desc->irq_data.chip->irq_ack(&desc->irq_data); 143 144 if (irr & IRR_ETHERNET) { 145 generic_handle_irq(IRQ_NEPONSET_SMC9196); 146 } 147 148 if (irr & IRR_USAR) { 149 generic_handle_irq(IRQ_NEPONSET_USAR); 150 } 151 152 desc->irq_data.chip->irq_unmask(&desc->irq_data); 153 } 154 155 if (irr & IRR_SA1111) { 156 generic_handle_irq(IRQ_NEPONSET_SA1111); 157 } 158 } 159 } 160 161 /* 162 * Yes, we really do not have any kind of masking or unmasking 163 */ 164 static void nochip_noop(struct irq_data *irq) 165 { 166 } 167 168 static struct irq_chip nochip = { 169 .name = "neponset", 170 .irq_ack = nochip_noop, 171 .irq_mask = nochip_noop, 172 .irq_unmask = nochip_noop, 173 }; 174 175 static struct resource sa1111_resources[] = { 176 [0] = DEFINE_RES_MEM(0x40000000, SZ_8K), 177 [1] = DEFINE_RES_IRQ(IRQ_NEPONSET_SA1111), 178 }; 179 180 static struct sa1111_platform_data sa1111_info = { 181 .irq_base = IRQ_BOARD_END, 182 }; 183 184 static struct resource smc91x_resources[] = { 185 [0] = DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS, 0x02000000, "smc91x-regs"), 186 [1] = DEFINE_RES_IRQ(IRQ_NEPONSET_SMC9196), 187 [2] = DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000, 188 0x02000000, "smc91x-attrib"), 189 }; 190 191 static int __devinit neponset_probe(struct platform_device *dev) 192 { 193 struct neponset_drvdata *d; 194 struct platform_device_info sa1111_devinfo = { 195 .parent = &dev->dev, 196 .name = "sa1111", 197 .id = 0, 198 .res = sa1111_resources, 199 .num_res = ARRAY_SIZE(sa1111_resources), 200 .data = &sa1111_info, 201 .size_data = sizeof(sa1111_info), 202 .dma_mask = 0xffffffffUL, 203 }; 204 struct platform_device_info smc91x_devinfo = { 205 .parent = &dev->dev, 206 .name = "smc91x", 207 .id = 0, 208 .res = smc91x_resources, 209 .num_res = ARRAY_SIZE(smc91x_resources), 210 }; 211 int ret; 212 213 d = kzalloc(sizeof(*d), GFP_KERNEL); 214 if (!d) { 215 ret = -ENOMEM; 216 goto err_alloc; 217 } 218 219 sa1100_register_uart_fns(&neponset_port_fns); 220 221 /* 222 * Install handler for GPIO25. 223 */ 224 irq_set_irq_type(IRQ_GPIO25, IRQ_TYPE_EDGE_RISING); 225 irq_set_chained_handler(IRQ_GPIO25, neponset_irq_handler); 226 227 /* 228 * We would set IRQ_GPIO25 to be a wake-up IRQ, but 229 * unfortunately something on the Neponset activates 230 * this IRQ on sleep (ethernet?) 231 */ 232 #if 0 233 enable_irq_wake(IRQ_GPIO25); 234 #endif 235 236 /* 237 * Setup other Neponset IRQs. SA1111 will be done by the 238 * generic SA1111 code. 239 */ 240 irq_set_chip_and_handler(IRQ_NEPONSET_SMC9196, &nochip, 241 handle_simple_irq); 242 set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE); 243 irq_set_chip_and_handler(IRQ_NEPONSET_USAR, &nochip, 244 handle_simple_irq); 245 set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE); 246 irq_set_chip(IRQ_NEPONSET_SA1111, &nochip); 247 248 /* 249 * Disable GPIO 0/1 drivers so the buttons work on the module. 250 */ 251 NCR_0 = NCR_GP01_OFF; 252 253 d->sa1111 = platform_device_register_full(&sa1111_devinfo); 254 d->smc91x = platform_device_register_full(&smc91x_devinfo); 255 256 platform_set_drvdata(dev, d); 257 258 return 0; 259 260 err_alloc: 261 return ret; 262 } 263 264 static int __devexit neponset_remove(struct platform_device *dev) 265 { 266 struct neponset_drvdata *d = platform_get_drvdata(dev); 267 268 if (!IS_ERR(d->sa1111)) 269 platform_device_unregister(d->sa1111); 270 if (!IS_ERR(d->smc91x)) 271 platform_device_unregister(d->smc91x); 272 irq_set_chained_handler(IRQ_GPIO25, NULL); 273 274 kfree(d); 275 276 return 0; 277 } 278 279 #ifdef CONFIG_PM 280 static int neponset_suspend(struct platform_device *dev, pm_message_t state) 281 { 282 struct neponset_drvdata *d = platform_get_drvdata(dev); 283 284 d->ncr0 = NCR_0; 285 d->mdm_ctl_0 = MDM_CTL_0; 286 287 return 0; 288 } 289 290 static int neponset_resume(struct platform_device *dev) 291 { 292 struct neponset_drvdata *d = platform_get_drvdata(dev); 293 294 NCR_0 = d->ncr0; 295 MDM_CTL_0 = d->mdm_ctl_0; 296 297 return 0; 298 } 299 300 #else 301 #define neponset_suspend NULL 302 #define neponset_resume NULL 303 #endif 304 305 static struct platform_driver neponset_device_driver = { 306 .probe = neponset_probe, 307 .remove = __devexit_p(neponset_remove), 308 .suspend = neponset_suspend, 309 .resume = neponset_resume, 310 .driver = { 311 .name = "neponset", 312 .owner = THIS_MODULE, 313 }, 314 }; 315 316 static struct resource neponset_resources[] = { 317 [0] = DEFINE_RES_MEM(0x10000000, 0x08000000), 318 }; 319 320 static struct platform_device neponset_device = { 321 .name = "neponset", 322 .id = 0, 323 .num_resources = ARRAY_SIZE(neponset_resources), 324 .resource = neponset_resources, 325 }; 326 327 extern void sa1110_mb_disable(void); 328 329 static int __init neponset_init(void) 330 { 331 platform_driver_register(&neponset_device_driver); 332 333 /* 334 * The Neponset is only present on the Assabet machine type. 335 */ 336 if (!machine_is_assabet()) 337 return -ENODEV; 338 339 /* 340 * Ensure that the memory bus request/grant signals are setup, 341 * and the grant is held in its inactive state, whether or not 342 * we actually have a Neponset attached. 343 */ 344 sa1110_mb_disable(); 345 346 if (!machine_has_neponset()) { 347 printk(KERN_DEBUG "Neponset expansion board not present\n"); 348 return -ENODEV; 349 } 350 351 if (WHOAMI != 0x11) { 352 printk(KERN_WARNING "Neponset board detected, but " 353 "wrong ID: %02x\n", WHOAMI); 354 return -ENODEV; 355 } 356 357 return platform_device_register(&neponset_device); 358 } 359 360 subsys_initcall(neponset_init); 361 362 static struct map_desc neponset_io_desc[] __initdata = { 363 { /* System Registers */ 364 .virtual = 0xf3000000, 365 .pfn = __phys_to_pfn(0x10000000), 366 .length = SZ_1M, 367 .type = MT_DEVICE 368 }, { /* SA-1111 */ 369 .virtual = 0xf4000000, 370 .pfn = __phys_to_pfn(0x40000000), 371 .length = SZ_1M, 372 .type = MT_DEVICE 373 } 374 }; 375 376 void __init neponset_map_io(void) 377 { 378 iotable_init(neponset_io_desc, ARRAY_SIZE(neponset_io_desc)); 379 } 380