1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * linux/arch/arm/mach-sa1100/neponset.c 4 */ 5 #include <linux/err.h> 6 #include <linux/gpio/driver.h> 7 #include <linux/gpio/gpio-reg.h> 8 #include <linux/gpio/machine.h> 9 #include <linux/init.h> 10 #include <linux/ioport.h> 11 #include <linux/irq.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/platform_data/sa11x0-serial.h> 15 #include <linux/platform_device.h> 16 #include <linux/pm.h> 17 #include <linux/serial_core.h> 18 #include <linux/slab.h> 19 #include <linux/smc91x.h> 20 21 #include <asm/mach-types.h> 22 #include <asm/mach/map.h> 23 #include <asm/hardware/sa1111.h> 24 #include <linux/sizes.h> 25 26 #include <mach/hardware.h> 27 #include <mach/assabet.h> 28 #include <mach/neponset.h> 29 #include <mach/irqs.h> 30 31 #define NEP_IRQ_SMC91X 0 32 #define NEP_IRQ_USAR 1 33 #define NEP_IRQ_SA1111 2 34 #define NEP_IRQ_NR 3 35 36 #define WHOAMI 0x00 37 #define LEDS 0x10 38 #define SWPK 0x20 39 #define IRR 0x24 40 #define KP_Y_IN 0x80 41 #define KP_X_OUT 0x90 42 #define NCR_0 0xa0 43 #define MDM_CTL_0 0xb0 44 #define MDM_CTL_1 0xb4 45 #define AUD_CTL 0xc0 46 47 #define IRR_ETHERNET (1 << 0) 48 #define IRR_USAR (1 << 1) 49 #define IRR_SA1111 (1 << 2) 50 51 #define NCR_NGPIO 7 52 53 #define MDM_CTL0_RTS1 (1 << 0) 54 #define MDM_CTL0_DTR1 (1 << 1) 55 #define MDM_CTL0_RTS2 (1 << 2) 56 #define MDM_CTL0_DTR2 (1 << 3) 57 #define MDM_CTL0_NGPIO 4 58 59 #define MDM_CTL1_CTS1 (1 << 0) 60 #define MDM_CTL1_DSR1 (1 << 1) 61 #define MDM_CTL1_DCD1 (1 << 2) 62 #define MDM_CTL1_CTS2 (1 << 3) 63 #define MDM_CTL1_DSR2 (1 << 4) 64 #define MDM_CTL1_DCD2 (1 << 5) 65 #define MDM_CTL1_NGPIO 6 66 67 #define AUD_SEL_1341 (1 << 0) 68 #define AUD_MUTE_1341 (1 << 1) 69 #define AUD_NGPIO 2 70 71 extern void sa1110_mb_disable(void); 72 73 #define to_neponset_gpio_chip(x) container_of(x, struct neponset_gpio_chip, gc) 74 75 static const char *neponset_ncr_names[] = { 76 "gp01_off", "tp_power", "ms_power", "enet_osc", 77 "spi_kb_wk_up", "a0vpp", "a1vpp" 78 }; 79 80 static const char *neponset_mdmctl0_names[] = { 81 "rts3", "dtr3", "rts1", "dtr1", 82 }; 83 84 static const char *neponset_mdmctl1_names[] = { 85 "cts3", "dsr3", "dcd3", "cts1", "dsr1", "dcd1" 86 }; 87 88 static const char *neponset_aud_names[] = { 89 "sel_1341", "mute_1341", 90 }; 91 92 struct neponset_drvdata { 93 void __iomem *base; 94 struct platform_device *sa1111; 95 struct platform_device *smc91x; 96 unsigned irq_base; 97 struct gpio_chip *gpio[4]; 98 }; 99 100 static struct gpiod_lookup_table neponset_pcmcia_table = { 101 .dev_id = "1800", 102 .table = { 103 GPIO_LOOKUP("sa1111", 1, "a0vcc", GPIO_ACTIVE_HIGH), 104 GPIO_LOOKUP("sa1111", 0, "a1vcc", GPIO_ACTIVE_HIGH), 105 GPIO_LOOKUP("neponset-ncr", 5, "a0vpp", GPIO_ACTIVE_HIGH), 106 GPIO_LOOKUP("neponset-ncr", 6, "a1vpp", GPIO_ACTIVE_HIGH), 107 GPIO_LOOKUP("sa1111", 2, "b0vcc", GPIO_ACTIVE_HIGH), 108 GPIO_LOOKUP("sa1111", 3, "b1vcc", GPIO_ACTIVE_HIGH), 109 { }, 110 }, 111 }; 112 113 static struct neponset_drvdata *nep; 114 115 void neponset_ncr_frob(unsigned int mask, unsigned int val) 116 { 117 struct neponset_drvdata *n = nep; 118 unsigned long m = mask, v = val; 119 120 if (nep) 121 n->gpio[0]->set_multiple(n->gpio[0], &m, &v); 122 else 123 WARN(1, "nep unset\n"); 124 } 125 EXPORT_SYMBOL(neponset_ncr_frob); 126 127 static void neponset_set_mctrl(struct uart_port *port, u_int mctrl) 128 { 129 struct neponset_drvdata *n = nep; 130 unsigned long mask, val = 0; 131 132 if (!n) 133 return; 134 135 if (port->mapbase == _Ser1UTCR0) { 136 mask = MDM_CTL0_RTS2 | MDM_CTL0_DTR2; 137 138 if (!(mctrl & TIOCM_RTS)) 139 val |= MDM_CTL0_RTS2; 140 141 if (!(mctrl & TIOCM_DTR)) 142 val |= MDM_CTL0_DTR2; 143 } else if (port->mapbase == _Ser3UTCR0) { 144 mask = MDM_CTL0_RTS1 | MDM_CTL0_DTR1; 145 146 if (!(mctrl & TIOCM_RTS)) 147 val |= MDM_CTL0_RTS1; 148 149 if (!(mctrl & TIOCM_DTR)) 150 val |= MDM_CTL0_DTR1; 151 } 152 153 n->gpio[1]->set_multiple(n->gpio[1], &mask, &val); 154 } 155 156 static u_int neponset_get_mctrl(struct uart_port *port) 157 { 158 void __iomem *base = nep->base; 159 u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; 160 u_int mdm_ctl1; 161 162 if (!base) 163 return ret; 164 165 mdm_ctl1 = readb_relaxed(base + MDM_CTL_1); 166 if (port->mapbase == _Ser1UTCR0) { 167 if (mdm_ctl1 & MDM_CTL1_DCD2) 168 ret &= ~TIOCM_CD; 169 if (mdm_ctl1 & MDM_CTL1_CTS2) 170 ret &= ~TIOCM_CTS; 171 if (mdm_ctl1 & MDM_CTL1_DSR2) 172 ret &= ~TIOCM_DSR; 173 } else if (port->mapbase == _Ser3UTCR0) { 174 if (mdm_ctl1 & MDM_CTL1_DCD1) 175 ret &= ~TIOCM_CD; 176 if (mdm_ctl1 & MDM_CTL1_CTS1) 177 ret &= ~TIOCM_CTS; 178 if (mdm_ctl1 & MDM_CTL1_DSR1) 179 ret &= ~TIOCM_DSR; 180 } 181 182 return ret; 183 } 184 185 static struct sa1100_port_fns neponset_port_fns = { 186 .set_mctrl = neponset_set_mctrl, 187 .get_mctrl = neponset_get_mctrl, 188 }; 189 190 /* 191 * Install handler for Neponset IRQ. Note that we have to loop here 192 * since the ETHERNET and USAR IRQs are level based, and we need to 193 * ensure that the IRQ signal is deasserted before returning. This 194 * is rather unfortunate. 195 */ 196 static void neponset_irq_handler(struct irq_desc *desc) 197 { 198 struct neponset_drvdata *d = irq_desc_get_handler_data(desc); 199 unsigned int irr; 200 201 while (1) { 202 /* 203 * Acknowledge the parent IRQ. 204 */ 205 desc->irq_data.chip->irq_ack(&desc->irq_data); 206 207 /* 208 * Read the interrupt reason register. Let's have all 209 * active IRQ bits high. Note: there is a typo in the 210 * Neponset user's guide for the SA1111 IRR level. 211 */ 212 irr = readb_relaxed(d->base + IRR); 213 irr ^= IRR_ETHERNET | IRR_USAR; 214 215 if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0) 216 break; 217 218 /* 219 * Since there is no individual mask, we have to 220 * mask the parent IRQ. This is safe, since we'll 221 * recheck the register for any pending IRQs. 222 */ 223 if (irr & (IRR_ETHERNET | IRR_USAR)) { 224 desc->irq_data.chip->irq_mask(&desc->irq_data); 225 226 /* 227 * Ack the interrupt now to prevent re-entering 228 * this neponset handler. Again, this is safe 229 * since we'll check the IRR register prior to 230 * leaving. 231 */ 232 desc->irq_data.chip->irq_ack(&desc->irq_data); 233 234 if (irr & IRR_ETHERNET) 235 generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X); 236 237 if (irr & IRR_USAR) 238 generic_handle_irq(d->irq_base + NEP_IRQ_USAR); 239 240 desc->irq_data.chip->irq_unmask(&desc->irq_data); 241 } 242 243 if (irr & IRR_SA1111) 244 generic_handle_irq(d->irq_base + NEP_IRQ_SA1111); 245 } 246 } 247 248 /* Yes, we really do not have any kind of masking or unmasking */ 249 static void nochip_noop(struct irq_data *irq) 250 { 251 } 252 253 static struct irq_chip nochip = { 254 .name = "neponset", 255 .irq_ack = nochip_noop, 256 .irq_mask = nochip_noop, 257 .irq_unmask = nochip_noop, 258 }; 259 260 static int neponset_init_gpio(struct gpio_chip **gcp, 261 struct device *dev, const char *label, void __iomem *reg, 262 unsigned num, bool in, const char *const * names) 263 { 264 struct gpio_chip *gc; 265 266 gc = gpio_reg_init(dev, reg, -1, num, label, in ? 0xffffffff : 0, 267 readl_relaxed(reg), names, NULL, NULL); 268 if (IS_ERR(gc)) 269 return PTR_ERR(gc); 270 271 *gcp = gc; 272 273 return 0; 274 } 275 276 static struct sa1111_platform_data sa1111_info = { 277 .disable_devs = SA1111_DEVID_PS2_MSE, 278 }; 279 280 static int neponset_probe(struct platform_device *dev) 281 { 282 struct neponset_drvdata *d; 283 struct resource *nep_res, *sa1111_res, *smc91x_res; 284 struct resource sa1111_resources[] = { 285 DEFINE_RES_MEM(0x40000000, SZ_8K), 286 { .flags = IORESOURCE_IRQ }, 287 }; 288 struct platform_device_info sa1111_devinfo = { 289 .parent = &dev->dev, 290 .name = "sa1111", 291 .id = 0, 292 .res = sa1111_resources, 293 .num_res = ARRAY_SIZE(sa1111_resources), 294 .data = &sa1111_info, 295 .size_data = sizeof(sa1111_info), 296 .dma_mask = 0xffffffffUL, 297 }; 298 struct resource smc91x_resources[] = { 299 DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS, 300 0x02000000, "smc91x-regs"), 301 DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000, 302 0x02000000, "smc91x-attrib"), 303 { .flags = IORESOURCE_IRQ }, 304 }; 305 struct smc91x_platdata smc91x_platdata = { 306 .flags = SMC91X_USE_8BIT | SMC91X_IO_SHIFT_2 | SMC91X_NOWAIT, 307 }; 308 struct platform_device_info smc91x_devinfo = { 309 .parent = &dev->dev, 310 .name = "smc91x", 311 .id = 0, 312 .res = smc91x_resources, 313 .num_res = ARRAY_SIZE(smc91x_resources), 314 .data = &smc91x_platdata, 315 .size_data = sizeof(smc91x_platdata), 316 }; 317 int ret, irq; 318 319 if (nep) 320 return -EBUSY; 321 322 irq = ret = platform_get_irq(dev, 0); 323 if (ret < 0) 324 goto err_alloc; 325 326 nep_res = platform_get_resource(dev, IORESOURCE_MEM, 0); 327 smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1); 328 sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2); 329 if (!nep_res || !smc91x_res || !sa1111_res) { 330 ret = -ENXIO; 331 goto err_alloc; 332 } 333 334 d = kzalloc(sizeof(*d), GFP_KERNEL); 335 if (!d) { 336 ret = -ENOMEM; 337 goto err_alloc; 338 } 339 340 d->base = ioremap(nep_res->start, SZ_4K); 341 if (!d->base) { 342 ret = -ENOMEM; 343 goto err_ioremap; 344 } 345 346 if (readb_relaxed(d->base + WHOAMI) != 0x11) { 347 dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n", 348 readb_relaxed(d->base + WHOAMI)); 349 ret = -ENODEV; 350 goto err_id; 351 } 352 353 ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1); 354 if (ret <= 0) { 355 dev_err(&dev->dev, "unable to allocate %u irqs: %d\n", 356 NEP_IRQ_NR, ret); 357 if (ret == 0) 358 ret = -ENOMEM; 359 goto err_irq_alloc; 360 } 361 362 d->irq_base = ret; 363 364 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip, 365 handle_simple_irq); 366 irq_clear_status_flags(d->irq_base + NEP_IRQ_SMC91X, IRQ_NOREQUEST | IRQ_NOPROBE); 367 irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip, 368 handle_simple_irq); 369 irq_clear_status_flags(d->irq_base + NEP_IRQ_USAR, IRQ_NOREQUEST | IRQ_NOPROBE); 370 irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip); 371 372 irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); 373 irq_set_chained_handler_and_data(irq, neponset_irq_handler, d); 374 375 /* Disable GPIO 0/1 drivers so the buttons work on the Assabet */ 376 writeb_relaxed(NCR_GP01_OFF, d->base + NCR_0); 377 378 neponset_init_gpio(&d->gpio[0], &dev->dev, "neponset-ncr", 379 d->base + NCR_0, NCR_NGPIO, false, 380 neponset_ncr_names); 381 neponset_init_gpio(&d->gpio[1], &dev->dev, "neponset-mdm-ctl0", 382 d->base + MDM_CTL_0, MDM_CTL0_NGPIO, false, 383 neponset_mdmctl0_names); 384 neponset_init_gpio(&d->gpio[2], &dev->dev, "neponset-mdm-ctl1", 385 d->base + MDM_CTL_1, MDM_CTL1_NGPIO, true, 386 neponset_mdmctl1_names); 387 neponset_init_gpio(&d->gpio[3], &dev->dev, "neponset-aud-ctl", 388 d->base + AUD_CTL, AUD_NGPIO, false, 389 neponset_aud_names); 390 391 gpiod_add_lookup_table(&neponset_pcmcia_table); 392 393 /* 394 * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately 395 * something on the Neponset activates this IRQ on sleep (eth?) 396 */ 397 #if 0 398 enable_irq_wake(irq); 399 #endif 400 401 dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n", 402 d->irq_base, d->irq_base + NEP_IRQ_NR - 1); 403 nep = d; 404 405 sa1100_register_uart_fns(&neponset_port_fns); 406 407 /* Ensure that the memory bus request/grant signals are setup */ 408 sa1110_mb_disable(); 409 410 sa1111_resources[0].parent = sa1111_res; 411 sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111; 412 sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111; 413 d->sa1111 = platform_device_register_full(&sa1111_devinfo); 414 415 smc91x_resources[0].parent = smc91x_res; 416 smc91x_resources[1].parent = smc91x_res; 417 smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X; 418 smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X; 419 d->smc91x = platform_device_register_full(&smc91x_devinfo); 420 421 platform_set_drvdata(dev, d); 422 423 return 0; 424 425 err_irq_alloc: 426 err_id: 427 iounmap(d->base); 428 err_ioremap: 429 kfree(d); 430 err_alloc: 431 return ret; 432 } 433 434 static int neponset_remove(struct platform_device *dev) 435 { 436 struct neponset_drvdata *d = platform_get_drvdata(dev); 437 int irq = platform_get_irq(dev, 0); 438 439 if (!IS_ERR(d->sa1111)) 440 platform_device_unregister(d->sa1111); 441 if (!IS_ERR(d->smc91x)) 442 platform_device_unregister(d->smc91x); 443 444 gpiod_remove_lookup_table(&neponset_pcmcia_table); 445 446 irq_set_chained_handler(irq, NULL); 447 irq_free_descs(d->irq_base, NEP_IRQ_NR); 448 nep = NULL; 449 iounmap(d->base); 450 kfree(d); 451 452 return 0; 453 } 454 455 #ifdef CONFIG_PM_SLEEP 456 static int neponset_resume(struct device *dev) 457 { 458 struct neponset_drvdata *d = dev_get_drvdata(dev); 459 int i, ret = 0; 460 461 for (i = 0; i < ARRAY_SIZE(d->gpio); i++) { 462 ret = gpio_reg_resume(d->gpio[i]); 463 if (ret) 464 break; 465 } 466 467 return ret; 468 } 469 470 static const struct dev_pm_ops neponset_pm_ops = { 471 .resume_noirq = neponset_resume, 472 .restore_noirq = neponset_resume, 473 }; 474 #define PM_OPS &neponset_pm_ops 475 #else 476 #define PM_OPS NULL 477 #endif 478 479 static struct platform_driver neponset_device_driver = { 480 .probe = neponset_probe, 481 .remove = neponset_remove, 482 .driver = { 483 .name = "neponset", 484 .pm = PM_OPS, 485 }, 486 }; 487 488 static int __init neponset_init(void) 489 { 490 return platform_driver_register(&neponset_device_driver); 491 } 492 493 subsys_initcall(neponset_init); 494