xref: /openbmc/linux/arch/arm/mach-omap2/pm.c (revision 565d76cb)
1 /*
2  * pm.c - Common OMAP2+ power management-related code
3  *
4  * Copyright (C) 2010 Texas Instruments, Inc.
5  * Copyright (C) 2010 Nokia Corporation
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11 
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/io.h>
15 #include <linux/err.h>
16 #include <linux/opp.h>
17 
18 #include <plat/omap-pm.h>
19 #include <plat/omap_device.h>
20 #include <plat/common.h>
21 
22 #include "voltage.h"
23 #include "powerdomain.h"
24 #include "clockdomain.h"
25 #include "pm.h"
26 
27 static struct omap_device_pm_latency *pm_lats;
28 
29 static struct device *mpu_dev;
30 static struct device *iva_dev;
31 static struct device *l3_dev;
32 static struct device *dsp_dev;
33 
34 struct device *omap2_get_mpuss_device(void)
35 {
36 	WARN_ON_ONCE(!mpu_dev);
37 	return mpu_dev;
38 }
39 
40 struct device *omap2_get_iva_device(void)
41 {
42 	WARN_ON_ONCE(!iva_dev);
43 	return iva_dev;
44 }
45 
46 struct device *omap2_get_l3_device(void)
47 {
48 	WARN_ON_ONCE(!l3_dev);
49 	return l3_dev;
50 }
51 
52 struct device *omap4_get_dsp_device(void)
53 {
54 	WARN_ON_ONCE(!dsp_dev);
55 	return dsp_dev;
56 }
57 EXPORT_SYMBOL(omap4_get_dsp_device);
58 
59 /* static int _init_omap_device(struct omap_hwmod *oh, void *user) */
60 static int _init_omap_device(char *name, struct device **new_dev)
61 {
62 	struct omap_hwmod *oh;
63 	struct omap_device *od;
64 
65 	oh = omap_hwmod_lookup(name);
66 	if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
67 		 __func__, name))
68 		return -ENODEV;
69 
70 	od = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
71 	if (WARN(IS_ERR(od), "%s: could not build omap_device for %s\n",
72 		 __func__, name))
73 		return -ENODEV;
74 
75 	*new_dev = &od->pdev.dev;
76 
77 	return 0;
78 }
79 
80 /*
81  * Build omap_devices for processors and bus.
82  */
83 static void omap2_init_processor_devices(void)
84 {
85 	_init_omap_device("mpu", &mpu_dev);
86 	if (omap3_has_iva())
87 		_init_omap_device("iva", &iva_dev);
88 
89 	if (cpu_is_omap44xx()) {
90 		_init_omap_device("l3_main_1", &l3_dev);
91 		_init_omap_device("dsp", &dsp_dev);
92 	} else {
93 		_init_omap_device("l3_main", &l3_dev);
94 	}
95 }
96 
97 /* Types of sleep_switch used in omap_set_pwrdm_state */
98 #define FORCEWAKEUP_SWITCH	0
99 #define LOWPOWERSTATE_SWITCH	1
100 
101 /*
102  * This sets pwrdm state (other than mpu & core. Currently only ON &
103  * RET are supported.
104  */
105 int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
106 {
107 	u32 cur_state;
108 	int sleep_switch = 0;
109 	int ret = 0;
110 
111 	if (pwrdm == NULL || IS_ERR(pwrdm))
112 		return -EINVAL;
113 
114 	while (!(pwrdm->pwrsts & (1 << state))) {
115 		if (state == PWRDM_POWER_OFF)
116 			return ret;
117 		state--;
118 	}
119 
120 	cur_state = pwrdm_read_next_pwrst(pwrdm);
121 	if (cur_state == state)
122 		return ret;
123 
124 	if (pwrdm_read_pwrst(pwrdm) < PWRDM_POWER_ON) {
125 		if ((pwrdm_read_pwrst(pwrdm) > state) &&
126 			(pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
127 			sleep_switch = LOWPOWERSTATE_SWITCH;
128 		} else {
129 			clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
130 			pwrdm_wait_transition(pwrdm);
131 			sleep_switch = FORCEWAKEUP_SWITCH;
132 		}
133 	}
134 
135 	ret = pwrdm_set_next_pwrst(pwrdm, state);
136 	if (ret) {
137 		printk(KERN_ERR "Unable to set state of powerdomain: %s\n",
138 		       pwrdm->name);
139 		goto err;
140 	}
141 
142 	switch (sleep_switch) {
143 	case FORCEWAKEUP_SWITCH:
144 		if (pwrdm->pwrdm_clkdms[0]->flags & CLKDM_CAN_ENABLE_AUTO)
145 			clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
146 		else
147 			clkdm_sleep(pwrdm->pwrdm_clkdms[0]);
148 		break;
149 	case LOWPOWERSTATE_SWITCH:
150 		pwrdm_set_lowpwrstchange(pwrdm);
151 		break;
152 	default:
153 		return ret;
154 	}
155 
156 	pwrdm_wait_transition(pwrdm);
157 	pwrdm_state_switch(pwrdm);
158 err:
159 	return ret;
160 }
161 
162 /*
163  * This API is to be called during init to put the various voltage
164  * domains to the voltage as per the opp table. Typically we boot up
165  * at the nominal voltage. So this function finds out the rate of
166  * the clock associated with the voltage domain, finds out the correct
167  * opp entry and puts the voltage domain to the voltage specifies
168  * in the opp entry
169  */
170 static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
171 						struct device *dev)
172 {
173 	struct voltagedomain *voltdm;
174 	struct clk *clk;
175 	struct opp *opp;
176 	unsigned long freq, bootup_volt;
177 
178 	if (!vdd_name || !clk_name || !dev) {
179 		printk(KERN_ERR "%s: Invalid parameters!\n", __func__);
180 		goto exit;
181 	}
182 
183 	voltdm = omap_voltage_domain_lookup(vdd_name);
184 	if (IS_ERR(voltdm)) {
185 		printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n",
186 			__func__, vdd_name);
187 		goto exit;
188 	}
189 
190 	clk =  clk_get(NULL, clk_name);
191 	if (IS_ERR(clk)) {
192 		printk(KERN_ERR "%s: unable to get clk %s\n",
193 			__func__, clk_name);
194 		goto exit;
195 	}
196 
197 	freq = clk->rate;
198 	clk_put(clk);
199 
200 	opp = opp_find_freq_ceil(dev, &freq);
201 	if (IS_ERR(opp)) {
202 		printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n",
203 			__func__, vdd_name);
204 		goto exit;
205 	}
206 
207 	bootup_volt = opp_get_voltage(opp);
208 	if (!bootup_volt) {
209 		printk(KERN_ERR "%s: unable to find voltage corresponding"
210 			"to the bootup OPP for vdd_%s\n", __func__, vdd_name);
211 		goto exit;
212 	}
213 
214 	omap_voltage_scale_vdd(voltdm, bootup_volt);
215 	return 0;
216 
217 exit:
218 	printk(KERN_ERR "%s: Unable to put vdd_%s to its init voltage\n\n",
219 		__func__, vdd_name);
220 	return -EINVAL;
221 }
222 
223 static void __init omap3_init_voltages(void)
224 {
225 	if (!cpu_is_omap34xx())
226 		return;
227 
228 	omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev);
229 	omap2_set_init_voltage("core", "l3_ick", l3_dev);
230 }
231 
232 static void __init omap4_init_voltages(void)
233 {
234 	if (!cpu_is_omap44xx())
235 		return;
236 
237 	omap2_set_init_voltage("mpu", "dpll_mpu_ck", mpu_dev);
238 	omap2_set_init_voltage("core", "l3_div_ck", l3_dev);
239 	omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", iva_dev);
240 }
241 
242 static int __init omap2_common_pm_init(void)
243 {
244 	omap2_init_processor_devices();
245 	omap_pm_if_init();
246 
247 	return 0;
248 }
249 postcore_initcall(omap2_common_pm_init);
250 
251 static int __init omap2_common_pm_late_init(void)
252 {
253 	/* Init the OMAP TWL parameters */
254 	omap3_twl_init();
255 	omap4_twl_init();
256 
257 	/* Init the voltage layer */
258 	omap_voltage_late_init();
259 
260 	/* Initialize the voltages */
261 	omap3_init_voltages();
262 	omap4_init_voltages();
263 
264 	/* Smartreflex device init */
265 	omap_devinit_smartreflex();
266 
267 	return 0;
268 }
269 late_initcall(omap2_common_pm_late_init);
270