1 /* 2 * pm.c - Common OMAP2+ power management-related code 3 * 4 * Copyright (C) 2010 Texas Instruments, Inc. 5 * Copyright (C) 2010 Nokia Corporation 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/kernel.h> 13 #include <linux/init.h> 14 #include <linux/io.h> 15 #include <linux/err.h> 16 #include <linux/opp.h> 17 #include <linux/export.h> 18 #include <linux/suspend.h> 19 #include <linux/cpu.h> 20 21 #include <asm/system_misc.h> 22 23 #include "omap-pm.h" 24 #include "omap_device.h" 25 #include "common.h" 26 27 #include "soc.h" 28 #include "prcm-common.h" 29 #include "voltage.h" 30 #include "powerdomain.h" 31 #include "clockdomain.h" 32 #include "pm.h" 33 #include "twl-common.h" 34 35 static struct omap_device_pm_latency *pm_lats; 36 37 /* 38 * omap_pm_suspend: points to a function that does the SoC-specific 39 * suspend work 40 */ 41 int (*omap_pm_suspend)(void); 42 43 #ifdef CONFIG_PM 44 /** 45 * struct omap2_oscillator - Describe the board main oscillator latencies 46 * @startup_time: oscillator startup latency 47 * @shutdown_time: oscillator shutdown latency 48 */ 49 struct omap2_oscillator { 50 u32 startup_time; 51 u32 shutdown_time; 52 }; 53 54 static struct omap2_oscillator oscillator = { 55 .startup_time = ULONG_MAX, 56 .shutdown_time = ULONG_MAX, 57 }; 58 59 void omap_pm_setup_oscillator(u32 tstart, u32 tshut) 60 { 61 oscillator.startup_time = tstart; 62 oscillator.shutdown_time = tshut; 63 } 64 65 void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) 66 { 67 if (!tstart || !tshut) 68 return; 69 70 *tstart = oscillator.startup_time; 71 *tshut = oscillator.shutdown_time; 72 } 73 #endif 74 75 static int __init _init_omap_device(char *name) 76 { 77 struct omap_hwmod *oh; 78 struct platform_device *pdev; 79 80 oh = omap_hwmod_lookup(name); 81 if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", 82 __func__, name)) 83 return -ENODEV; 84 85 pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false); 86 if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n", 87 __func__, name)) 88 return -ENODEV; 89 90 return 0; 91 } 92 93 /* 94 * Build omap_devices for processors and bus. 95 */ 96 static void __init omap2_init_processor_devices(void) 97 { 98 _init_omap_device("mpu"); 99 if (omap3_has_iva()) 100 _init_omap_device("iva"); 101 102 if (cpu_is_omap44xx()) { 103 _init_omap_device("l3_main_1"); 104 _init_omap_device("dsp"); 105 _init_omap_device("iva"); 106 } else { 107 _init_omap_device("l3_main"); 108 } 109 } 110 111 /* Types of sleep_switch used in omap_set_pwrdm_state */ 112 #define FORCEWAKEUP_SWITCH 0 113 #define LOWPOWERSTATE_SWITCH 1 114 115 int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused) 116 { 117 if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) && 118 !(clkdm->flags & CLKDM_MISSING_IDLE_REPORTING)) 119 clkdm_allow_idle(clkdm); 120 else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP && 121 atomic_read(&clkdm->usecount) == 0) 122 clkdm_sleep(clkdm); 123 return 0; 124 } 125 126 /* 127 * This sets pwrdm state (other than mpu & core. Currently only ON & 128 * RET are supported. 129 */ 130 int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst) 131 { 132 u8 curr_pwrst, next_pwrst; 133 int sleep_switch = -1, ret = 0, hwsup = 0; 134 135 if (!pwrdm || IS_ERR(pwrdm)) 136 return -EINVAL; 137 138 while (!(pwrdm->pwrsts & (1 << pwrst))) { 139 if (pwrst == PWRDM_POWER_OFF) 140 return ret; 141 pwrst--; 142 } 143 144 next_pwrst = pwrdm_read_next_pwrst(pwrdm); 145 if (next_pwrst == pwrst) 146 return ret; 147 148 curr_pwrst = pwrdm_read_pwrst(pwrdm); 149 if (curr_pwrst < PWRDM_POWER_ON) { 150 if ((curr_pwrst > pwrst) && 151 (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) { 152 sleep_switch = LOWPOWERSTATE_SWITCH; 153 } else { 154 hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]); 155 clkdm_wakeup(pwrdm->pwrdm_clkdms[0]); 156 sleep_switch = FORCEWAKEUP_SWITCH; 157 } 158 } 159 160 ret = pwrdm_set_next_pwrst(pwrdm, pwrst); 161 if (ret) 162 pr_err("%s: unable to set power state of powerdomain: %s\n", 163 __func__, pwrdm->name); 164 165 switch (sleep_switch) { 166 case FORCEWAKEUP_SWITCH: 167 if (hwsup) 168 clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); 169 else 170 clkdm_sleep(pwrdm->pwrdm_clkdms[0]); 171 break; 172 case LOWPOWERSTATE_SWITCH: 173 pwrdm_set_lowpwrstchange(pwrdm); 174 pwrdm_wait_transition(pwrdm); 175 pwrdm_state_switch(pwrdm); 176 break; 177 } 178 179 return ret; 180 } 181 182 183 184 /* 185 * This API is to be called during init to set the various voltage 186 * domains to the voltage as per the opp table. Typically we boot up 187 * at the nominal voltage. So this function finds out the rate of 188 * the clock associated with the voltage domain, finds out the correct 189 * opp entry and sets the voltage domain to the voltage specified 190 * in the opp entry 191 */ 192 static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, 193 const char *oh_name) 194 { 195 struct voltagedomain *voltdm; 196 struct clk *clk; 197 struct opp *opp; 198 unsigned long freq, bootup_volt; 199 struct device *dev; 200 201 if (!vdd_name || !clk_name || !oh_name) { 202 pr_err("%s: invalid parameters\n", __func__); 203 goto exit; 204 } 205 206 if (!strncmp(oh_name, "mpu", 3)) 207 /* 208 * All current OMAPs share voltage rail and clock 209 * source, so CPU0 is used to represent the MPU-SS. 210 */ 211 dev = get_cpu_device(0); 212 else 213 dev = omap_device_get_by_hwmod_name(oh_name); 214 215 if (IS_ERR(dev)) { 216 pr_err("%s: Unable to get dev pointer for hwmod %s\n", 217 __func__, oh_name); 218 goto exit; 219 } 220 221 voltdm = voltdm_lookup(vdd_name); 222 if (!voltdm) { 223 pr_err("%s: unable to get vdd pointer for vdd_%s\n", 224 __func__, vdd_name); 225 goto exit; 226 } 227 228 clk = clk_get(NULL, clk_name); 229 if (IS_ERR(clk)) { 230 pr_err("%s: unable to get clk %s\n", __func__, clk_name); 231 goto exit; 232 } 233 234 freq = clk_get_rate(clk); 235 clk_put(clk); 236 237 rcu_read_lock(); 238 opp = opp_find_freq_ceil(dev, &freq); 239 if (IS_ERR(opp)) { 240 rcu_read_unlock(); 241 pr_err("%s: unable to find boot up OPP for vdd_%s\n", 242 __func__, vdd_name); 243 goto exit; 244 } 245 246 bootup_volt = opp_get_voltage(opp); 247 rcu_read_unlock(); 248 if (!bootup_volt) { 249 pr_err("%s: unable to find voltage corresponding to the bootup OPP for vdd_%s\n", 250 __func__, vdd_name); 251 goto exit; 252 } 253 254 voltdm_scale(voltdm, bootup_volt); 255 return 0; 256 257 exit: 258 pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name); 259 return -EINVAL; 260 } 261 262 #ifdef CONFIG_SUSPEND 263 static int omap_pm_enter(suspend_state_t suspend_state) 264 { 265 int ret = 0; 266 267 if (!omap_pm_suspend) 268 return -ENOENT; /* XXX doublecheck */ 269 270 switch (suspend_state) { 271 case PM_SUSPEND_STANDBY: 272 case PM_SUSPEND_MEM: 273 ret = omap_pm_suspend(); 274 break; 275 default: 276 ret = -EINVAL; 277 } 278 279 return ret; 280 } 281 282 static int omap_pm_begin(suspend_state_t state) 283 { 284 disable_hlt(); 285 if (cpu_is_omap34xx()) 286 omap_prcm_irq_prepare(); 287 return 0; 288 } 289 290 static void omap_pm_end(void) 291 { 292 enable_hlt(); 293 return; 294 } 295 296 static void omap_pm_finish(void) 297 { 298 if (cpu_is_omap34xx()) 299 omap_prcm_irq_complete(); 300 } 301 302 static const struct platform_suspend_ops omap_pm_ops = { 303 .begin = omap_pm_begin, 304 .end = omap_pm_end, 305 .enter = omap_pm_enter, 306 .finish = omap_pm_finish, 307 .valid = suspend_valid_only_mem, 308 }; 309 310 #endif /* CONFIG_SUSPEND */ 311 312 static void __init omap3_init_voltages(void) 313 { 314 if (!cpu_is_omap34xx()) 315 return; 316 317 omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu"); 318 omap2_set_init_voltage("core", "l3_ick", "l3_main"); 319 } 320 321 static void __init omap4_init_voltages(void) 322 { 323 if (!cpu_is_omap44xx()) 324 return; 325 326 omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu"); 327 omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1"); 328 omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva"); 329 } 330 331 static int __init omap2_common_pm_init(void) 332 { 333 if (!of_have_populated_dt()) 334 omap2_init_processor_devices(); 335 omap_pm_if_init(); 336 337 return 0; 338 } 339 postcore_initcall(omap2_common_pm_init); 340 341 int __init omap2_common_pm_late_init(void) 342 { 343 /* 344 * In the case of DT, the PMIC and SR initialization will be done using 345 * a completely different mechanism. 346 * Disable this part if a DT blob is available. 347 */ 348 if (of_have_populated_dt()) 349 return 0; 350 351 /* Init the voltage layer */ 352 omap_pmic_late_init(); 353 omap_voltage_late_init(); 354 355 /* Initialize the voltages */ 356 omap3_init_voltages(); 357 omap4_init_voltages(); 358 359 /* Smartreflex device init */ 360 omap_devinit_smartreflex(); 361 362 #ifdef CONFIG_SUSPEND 363 suspend_set_ops(&omap_pm_ops); 364 #endif 365 366 return 0; 367 } 368