1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2dd708413SRajendra Nayak /*
3dd708413SRajendra Nayak  * OMAP44xx Clock Management register bits
4dd708413SRajendra Nayak  *
5f19a3022SMike Turquette  * Copyright (C) 2009-2012 Texas Instruments, Inc.
6568997cfSRajendra Nayak  * Copyright (C) 2009-2010 Nokia Corporation
7dd708413SRajendra Nayak  *
8dd708413SRajendra Nayak  * Paul Walmsley (paul@pwsan.com)
9dd708413SRajendra Nayak  * Rajendra Nayak (rnayak@ti.com)
10dd708413SRajendra Nayak  * Benoit Cousson (b-cousson@ti.com)
11dd708413SRajendra Nayak  *
12dd708413SRajendra Nayak  * This file is automatically generated from the OMAP hardware databases.
13dd708413SRajendra Nayak  * We respectfully ask that any modifications to this file be coordinated
14dd708413SRajendra Nayak  * with the public linux-omap@vger.kernel.org mailing list and the
15dd708413SRajendra Nayak  * authors above to ensure that the autogeneration scripts are kept
16dd708413SRajendra Nayak  * up-to-date with the file contents.
17dd708413SRajendra Nayak  */
18dd708413SRajendra Nayak 
19dd708413SRajendra Nayak #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H
20dd708413SRajendra Nayak #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H
21dd708413SRajendra Nayak 
2256ef28acSRajendra Nayak #define OMAP4430_ABE_STATDEP_SHIFT				3
2356ef28acSRajendra Nayak #define OMAP4430_CLKTRCTRL_SHIFT				0
24568997cfSRajendra Nayak #define OMAP4430_CLKTRCTRL_MASK					(0x3 << 0)
2556ef28acSRajendra Nayak #define OMAP4430_DSS_STATDEP_SHIFT				8
2656ef28acSRajendra Nayak #define OMAP4430_DUCATI_STATDEP_SHIFT				0
2756ef28acSRajendra Nayak #define OMAP4430_GFX_STATDEP_SHIFT				10
2856ef28acSRajendra Nayak #define OMAP4430_IDLEST_SHIFT					16
29568997cfSRajendra Nayak #define OMAP4430_IDLEST_MASK					(0x3 << 16)
3056ef28acSRajendra Nayak #define OMAP4430_IVAHD_STATDEP_SHIFT				2
31568997cfSRajendra Nayak #define OMAP4430_L3INIT_STATDEP_SHIFT				7
32568997cfSRajendra Nayak #define OMAP4430_L3_1_STATDEP_SHIFT				5
33568997cfSRajendra Nayak #define OMAP4430_L3_2_STATDEP_SHIFT				6
34568997cfSRajendra Nayak #define OMAP4430_L4CFG_STATDEP_SHIFT				12
3556ef28acSRajendra Nayak #define OMAP4430_L4PER_STATDEP_SHIFT				13
3656ef28acSRajendra Nayak #define OMAP4430_L4SEC_STATDEP_SHIFT				14
3756ef28acSRajendra Nayak #define OMAP4430_L4WKUP_STATDEP_SHIFT				15
3856ef28acSRajendra Nayak #define OMAP4430_MEMIF_STATDEP_SHIFT				4
3956ef28acSRajendra Nayak #define OMAP4430_MODULEMODE_SHIFT				0
40568997cfSRajendra Nayak #define OMAP4430_MODULEMODE_MASK				(0x3 << 0)
4156ef28acSRajendra Nayak #define OMAP4430_TESLA_STATDEP_SHIFT				1
42dd708413SRajendra Nayak #endif
43