ARM: OMAP2+: Drop unused CM and SCRM defines for omap4

These are unused and should be handled by drivers/clock/ti nowadays.

Note that we also drop some unused SCRM registers that are not clock
rela

ARM: OMAP2+: Drop unused CM and SCRM defines for omap4

These are unused and should be handled by drivers/clock/ti nowadays.

Note that we also drop some unused SCRM registers that are not clock
related.

Signed-off-by: Tony Lindgren <tony@atomide.com>

show more ...

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of th

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

show more ...

ARM: OMAP4: PRM/CM: Cleanup unused header

Cleanup unused parts of the PRM and CM regbit headers leaving only whats
used.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <

ARM: OMAP4: PRM/CM: Cleanup unused header

Cleanup unused parts of the PRM and CM regbit headers leaving only whats
used.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

show more ...

ARM: OMAP4: cm: add bitfield width values

The new common clk framework includes basic definitions for mux and
divider clocks. These definitions depend on shift and width values
instead of the pre-c

ARM: OMAP4: cm: add bitfield width values

The new common clk framework includes basic definitions for mux and
divider clocks. These definitions depend on shift and width values
instead of the pre-computed masks that the OMAP clk framework has
traditionally used when accessing the register to control the mux or
divisor.

To ease this transition the masks are left intact and the width field is
simply added alongside the shift and mask data.

Signed-off-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

show more ...

OMAP4: cm: Remove RESTORE macros to avoid access from SW

The restore part of the CM is an alias of some regular registers
used only during the SAR restore to facilate the dma to write
a contiguous s

OMAP4: cm: Remove RESTORE macros to avoid access from SW

The restore part of the CM is an alias of some regular registers
used only during the SAR restore to facilate the dma to write
a contiguous set of registers.
The registers should never be used by the SW, only the original
register have to be used.

Remove them from cmX_44xx.h files to avoid anybody to use them by
mistake.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

show more ...

OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts

This patch adds additional register bitshifts for
registers added in OMAP4460 platform.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Si

OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts

This patch adds additional register bitshifts for
registers added in OMAP4460 platform.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
[tony@atomide.com: updated to apply on cleanup patches]
Signed-off-by: Tony Lindgren <tony@atomide.com>

show more ...

OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific files

In preparation for adding OMAP4-specific PRCM accessor/mutator
functions, split the existing OMAP2/3 PRCM code into OMAP2/

OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific files

In preparation for adding OMAP4-specific PRCM accessor/mutator
functions, split the existing OMAP2/3 PRCM code into OMAP2/3-specific
files. Most of what was in mach-omap2/{cm,prm}.{c,h} has now been
moved into mach-omap2/{cm,prm}2xxx_3xxx.{c,h}, since it was
OMAP2xxx/3xxx-specific.

This process also requires the #includes in each of these files to be
changed to reference the new file name. As part of doing so, add some
comments into plat-omap/sram.c and plat-omap/mcbsp.c, which use
"sideways includes", to indicate that these users of the PRM/CM includes
should not be doing so.

Thanks to Felipe Contreras <felipe.contreras@gmail.com> for comments on this
patch.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Cc: Felipe Contreras <felipe.contreras@gmail.com>
Acked-by: Felipe Contreras <felipe.contreras@gmail.com>
Cc: Greg Kroah-Hartman <greg@kroah.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

show more ...

OMAP4: CM & PRM: Update PRCM register bitshifts and masks for ES2

This patch updates the PRM and CM register bitshifts and masks
for OMAP4430 ES2.0.

Replace as well the BITFIELD macro with the shif

OMAP4: CM & PRM: Update PRCM register bitshifts and masks for ES2

This patch updates the PRM and CM register bitshifts and masks
for OMAP4430 ES2.0.

Replace as well the BITFIELD macro with the shift operator in order
to be consistent with the previous OMAP2 & 3 format.

Sort the register list in comments in order to have a consistent
register order and avoid futur change during code generation.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

show more ...

OMAP4: PRCM: Define shift macros as n instead of 1 << n

The macros defining the shift bits in registers for various
register bit fields are defined as 1 << n.
Instead define them as n. They can then

OMAP4: PRCM: Define shift macros as n instead of 1 << n

The macros defining the shift bits in registers for various
register bit fields are defined as 1 << n.
Instead define them as n. They can then be used as val << n.
The changes are generated by updating the script which autogenerates
the files modifed in the patch.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

show more ...

ARM: OMAP4: PM: Adds CM1/2 register field masks

This patch adds OMAP4 specific CM1 and CM2 module
register field masks. Auto generated using a python
script (gen_cm_shifts_and_mask.py) developed by

ARM: OMAP4: PM: Adds CM1/2 register field masks

This patch adds OMAP4 specific CM1 and CM2 module
register field masks. Auto generated using a python
script (gen_cm_shifts_and_mask.py) developed by Benoit
Cousson, Paul Walmsley and Rajendra Nayak.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

show more ...

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it u

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

Based on 2 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

show more ...

ARM: OMAP4: PRM/CM: Cleanup unused header

Cleanup unused parts of the PRM and CM regbit headers leaving only whats
used.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed

ARM: OMAP4: PRM/CM: Cleanup unused header

Cleanup unused parts of the PRM and CM regbit headers leaving only whats
used.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

show more ...

ARM: OMAP4: cm: add bitfield width values

The new common clk framework includes basic definitions for mux and
divider clocks. These definitions depend on shift and width values
inst

ARM: OMAP4: cm: add bitfield width values

The new common clk framework includes basic definitions for mux and
divider clocks. These definitions depend on shift and width values
instead of the pre-computed masks that the OMAP clk framework has
traditionally used when accessing the register to control the mux or
divisor.

To ease this transition the masks are left intact and the width field is
simply added alongside the shift and mask data.

Signed-off-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

show more ...

Merge branch 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc

* 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
MAINTAINERS:

Merge branch 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc

* 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
MAINTAINERS: add maintainer of CSR SiRFprimaII machine
ARM: CSR: initializing L2 cache
ARM: CSR: mapping early DEBUG_LL uart
ARM: CSR: Adding CSR SiRFprimaII board support
OMAP4: clocks: Update the clock tree with 4460 clock nodes
OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts
OMAP4: ID: add omap_has_feature for max freq supported
OMAP: ID: introduce chip detection for OMAP4460
ARM: Xilinx: merge board file into main platform code
ARM: Xilinx: Adding Xilinx board support

Fix up conflicts in arch/arm/mach-omap2/cm-regbits-44xx.h

show more ...

OMAP4: cm: Remove RESTORE macros to avoid access from SW

The restore part of the CM is an alias of some regular registers
used only during the SAR restore to facilate the dma to write

OMAP4: cm: Remove RESTORE macros to avoid access from SW

The restore part of the CM is an alias of some regular registers
used only during the SAR restore to facilate the dma to write
a contiguous set of registers.
The registers should never be used by the SW, only the original
register have to be used.

Remove them from cmX_44xx.h files to avoid anybody to use them by
mistake.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

show more ...

OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts

This patch adds additional register bitshifts for
registers added in OMAP4460 platform.

Signed-off-by: Rajendra Naya

OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts

This patch adds additional register bitshifts for
registers added in OMAP4460 platform.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
[tony@atomide.com: updated to apply on cleanup patches]
Signed-off-by: Tony Lindgren <tony@atomide.com>

show more ...

OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific files

In preparation for adding OMAP4-specific PRCM accessor/mutator
functions, split the existing OMAP2/3 PRCM code

OMAP2/3: PRCM: split OMAP2/3-specific PRCM code into OMAP2/3-specific files

In preparation for adding OMAP4-specific PRCM accessor/mutator
functions, split the existing OMAP2/3 PRCM code into OMAP2/3-specific
files. Most of what was in mach-omap2/{cm,prm}.{c,h} has now been
moved into mach-omap2/{cm,prm}2xxx_3xxx.{c,h}, since it was
OMAP2xxx/3xxx-specific.

This process also requires the #includes in each of these files to be
changed to reference the new file name. As part of doing so, add some
comments into plat-omap/sram.c and plat-omap/mcbsp.c, which use
"sideways includes", to indicate that these users of the PRM/CM includes
should not be doing so.

Thanks to Felipe Contreras <felipe.contreras@gmail.com> for comments on this
patch.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
Acked-by: Omar Ramirez Luna <omar.ramirez@ti.com>
Cc: Felipe Contreras <felipe.contreras@gmail.com>
Acked-by: Felipe Contreras <felipe.contreras@gmail.com>
Cc: Greg Kroah-Hartman <greg@kroah.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

show more ...

OMAP4: CM & PRM: Update PRCM register bitshifts and masks for ES2

This patch updates the PRM and CM register bitshifts and masks
for OMAP4430 ES2.0.

Replace as well the BITFIELD

OMAP4: CM & PRM: Update PRCM register bitshifts and masks for ES2

This patch updates the PRM and CM register bitshifts and masks
for OMAP4430 ES2.0.

Replace as well the BITFIELD macro with the shift operator in order
to be consistent with the previous OMAP2 & 3 format.

Sort the register list in comments in order to have a consistent
register order and avoid futur change during code generation.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>

show more ...

OMAP4: PRCM: Define shift macros as n instead of 1 << n

The macros defining the shift bits in registers for various
register bit fields are defined as 1 << n.
Instead define them as

OMAP4: PRCM: Define shift macros as n instead of 1 << n

The macros defining the shift bits in registers for various
register bit fields are defined as 1 << n.
Instead define them as n. They can then be used as val << n.
The changes are generated by updating the script which autogenerates
the files modifed in the patch.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

show more ...

ARM: OMAP4: PM: Adds CM1/2 register field masks

This patch adds OMAP4 specific CM1 and CM2 module
register field masks. Auto generated using a python
script (gen_cm_shifts_and_mask.p

ARM: OMAP4: PM: Adds CM1/2 register field masks

This patch adds OMAP4 specific CM1 and CM2 module
register field masks. Auto generated using a python
script (gen_cm_shifts_and_mask.py) developed by Benoit
Cousson, Paul Walmsley and Rajendra Nayak.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

show more ...