1 /* 2 * Copyright 2010-2011 Calxeda, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License along with 14 * this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 #include <linux/clk.h> 17 #include <linux/clkdev.h> 18 #include <linux/clocksource.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/io.h> 21 #include <linux/irqchip.h> 22 #include <linux/of.h> 23 #include <linux/of_irq.h> 24 #include <linux/of_platform.h> 25 #include <linux/of_address.h> 26 #include <linux/amba/bus.h> 27 #include <linux/clk-provider.h> 28 29 #include <asm/cacheflush.h> 30 #include <asm/cputype.h> 31 #include <asm/smp_plat.h> 32 #include <asm/hardware/cache-l2x0.h> 33 #include <asm/mach/arch.h> 34 #include <asm/mach/map.h> 35 36 #include "core.h" 37 #include "sysregs.h" 38 39 void __iomem *sregs_base; 40 void __iomem *scu_base_addr; 41 42 static void __init highbank_scu_map_io(void) 43 { 44 unsigned long base; 45 46 /* Get SCU base */ 47 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); 48 49 scu_base_addr = ioremap(base, SZ_4K); 50 } 51 52 #define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu))) 53 #define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu)) 54 55 void highbank_set_cpu_jump(int cpu, void *jump_addr) 56 { 57 cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 0); 58 writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu)); 59 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); 60 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), 61 HB_JUMP_TABLE_PHYS(cpu) + 15); 62 } 63 64 static void highbank_l2x0_disable(void) 65 { 66 /* Disable PL310 L2 Cache controller */ 67 highbank_smc1(0x102, 0x0); 68 } 69 70 static void __init highbank_init_irq(void) 71 { 72 irqchip_init(); 73 74 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) 75 highbank_scu_map_io(); 76 77 /* Enable PL310 L2 Cache controller */ 78 if (IS_ENABLED(CONFIG_CACHE_L2X0) && 79 of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) { 80 highbank_smc1(0x102, 0x1); 81 l2x0_of_init(0, ~0UL); 82 outer_cache.disable = highbank_l2x0_disable; 83 } 84 } 85 86 static void __init highbank_timer_init(void) 87 { 88 struct device_node *np; 89 90 /* Map system registers */ 91 np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); 92 sregs_base = of_iomap(np, 0); 93 WARN_ON(!sregs_base); 94 95 of_clk_init(NULL); 96 97 clocksource_of_init(); 98 } 99 100 static void highbank_power_off(void) 101 { 102 highbank_set_pwr_shutdown(); 103 104 while (1) 105 cpu_do_idle(); 106 } 107 108 static int highbank_platform_notifier(struct notifier_block *nb, 109 unsigned long event, void *__dev) 110 { 111 struct resource *res; 112 int reg = -1; 113 u32 val; 114 struct device *dev = __dev; 115 116 if (event != BUS_NOTIFY_ADD_DEVICE) 117 return NOTIFY_DONE; 118 119 if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci")) 120 reg = 0xc; 121 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci")) 122 reg = 0x18; 123 else if (of_device_is_compatible(dev->of_node, "arm,pl330")) 124 reg = 0x20; 125 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) { 126 res = platform_get_resource(to_platform_device(dev), 127 IORESOURCE_MEM, 0); 128 if (res) { 129 if (res->start == 0xfff50000) 130 reg = 0; 131 else if (res->start == 0xfff51000) 132 reg = 4; 133 } 134 } 135 136 if (reg < 0) 137 return NOTIFY_DONE; 138 139 if (of_property_read_bool(dev->of_node, "dma-coherent")) { 140 val = readl(sregs_base + reg); 141 writel(val | 0xff01, sregs_base + reg); 142 set_dma_ops(dev, &arm_coherent_dma_ops); 143 } 144 145 return NOTIFY_OK; 146 } 147 148 static struct notifier_block highbank_amba_nb = { 149 .notifier_call = highbank_platform_notifier, 150 }; 151 152 static struct notifier_block highbank_platform_nb = { 153 .notifier_call = highbank_platform_notifier, 154 }; 155 156 static void __init highbank_init(void) 157 { 158 pm_power_off = highbank_power_off; 159 highbank_pm_init(); 160 161 bus_register_notifier(&platform_bus_type, &highbank_platform_nb); 162 bus_register_notifier(&amba_bustype, &highbank_amba_nb); 163 164 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 165 } 166 167 static const char *highbank_match[] __initconst = { 168 "calxeda,highbank", 169 "calxeda,ecx-2000", 170 NULL, 171 }; 172 173 DT_MACHINE_START(HIGHBANK, "Highbank") 174 #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) 175 .dma_zone_size = (4ULL * SZ_1G), 176 #endif 177 .smp = smp_ops(highbank_smp_ops), 178 .init_irq = highbank_init_irq, 179 .init_time = highbank_timer_init, 180 .init_machine = highbank_init, 181 .dt_compat = highbank_match, 182 .restart = highbank_restart, 183 MACHINE_END 184