ARM/dma-mapping: use dma-direct unconditionally

Use dma-direct unconditionally on arm. It has already been used for
some time for LPAE and nommu configurations.

This mostly changes the streaming m

ARM/dma-mapping: use dma-direct unconditionally

Use dma-direct unconditionally on arm. It has already been used for
some time for LPAE and nommu configurations.

This mostly changes the streaming mapping implementation and the (simple)
coherent allocator for device that are DMA coherent. The existing
complex allocator for uncached mappings for non-coherent devices is still
used as is using the arch_dma_alloc/arch_dma_free hooks.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Andre Przywara <andre.przywara@arm.com> [highbank]
Tested-by: Marc Zyngier <maz@kernel.org>

show more ...

dma-mapping: split <linux/dma-mapping.h>

Split out all the bits that are purely for dma_map_ops implementations
and related code into a new <linux/dma-map-ops.h> header so that they
don't get pulled

dma-mapping: split <linux/dma-mapping.h>

Split out all the bits that are purely for dma_map_ops implementations
and related code into a new <linux/dma-map-ops.h> header so that they
don't get pulled into all the drivers. That also means the architecture
specific <asm/dma-mapping.h> is not pulled in by <linux/dma-mapping.h>
any more, which leads to a missing includes that were pulled in by the
x86 or arm versions in a few not overly portable drivers.

Signed-off-by: Christoph Hellwig <hch@lst.de>

show more ...

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms and c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms and conditions of the gnu general public license
version 2 as published by the free software foundation this program
is distributed in the hope it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details you should have received a copy of the gnu general
public license along with this program if not see http www gnu org
licenses

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 228 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

show more ...

arm: Remove unnecessary of_platform_populate with default match table

After patch "of/platform: Add common method to populate default bus",
it is possible for arch code to remove unnecessary callers

arm: Remove unnecessary of_platform_populate with default match table

After patch "of/platform: Add common method to populate default bus",
it is possible for arch code to remove unnecessary callers of
of_platform_populate with default match table.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Lee Jones <lee@kernel.org>
Cc: Krzysztof Halasa <khalasa@piap.pl>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Roland Stigge <stigge@antcom.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Viresh Kumar <vireshk@kernel.org>
Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com>
Cc: Tony Prisk <linux@prisktech.co.nz>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Rob Herring <robh@kernel.org>

show more ...

ARM: migrate to common PSCI client code

Now that the common PSCI client code has been factored out to
drivers/firmware, and made safe for 32-bit use, move the 32-bit ARM code
over to it. This result

ARM: migrate to common PSCI client code

Now that the common PSCI client code has been factored out to
drivers/firmware, and made safe for 32-bit use, move the 32-bit ARM code
over to it. This results in a moderate reduction of duplicated lines,
and will prevent further duplication as the PSCI client code is updated
for PSCI 1.0 and beyond.

The two legacy platform users of the PSCI invocation code are updated to
account for interface changes. In both cases the power state parameter
(which is constant) is now generated using macros, so that the
pack/unpack logic can be killed in preparation for PSCI 1.0 power state
changes.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Ashwin Chaugule <ashwin.chaugule@linaro.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

show more ...

ARM: make arrays containing machine compatible strings const

The definition

static const char *axxia_dt_match[] __initconst = {
...

defines a changable array of constant strings. That is you mu

ARM: make arrays containing machine compatible strings const

The definition

static const char *axxia_dt_match[] __initconst = {
...

defines a changable array of constant strings. That is you must not do:

*axxia_dt_match[0] = 'k';

but

axxia_dt_match[0] = "different string";

is fine. So the annotation __initconst is wrong and yields a compiler
error when other really const variables are added with __initconst.

As the struct machine_desc member dt_compat is declared as

const char *const *dt_compat;

making the arrays const is the better alternative over changing all
annotations to __initdata.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

show more ...

mailbox: rename pl320-ipc specific mailbox.h

The patch 30058677 "ARM / highbank: add support for pl320 IPC"
added a pl320 IPC specific header file as a generic mailbox.h.
This file has been renamed

mailbox: rename pl320-ipc specific mailbox.h

The patch 30058677 "ARM / highbank: add support for pl320 IPC"
added a pl320 IPC specific header file as a generic mailbox.h.
This file has been renamed appropriately to allow the
introduction of the generic mailbox API framework.

Acked-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Mark Brown <broonie@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>

show more ...

ARM: l2c: highbank: convert to generic l2c OF initialisation

Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.

Signed-off-by: Russell King <rmk+kernel@ar

ARM: l2c: highbank: convert to generic l2c OF initialisation

Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

show more ...

ARM: l2c: highbank: remove explicit SMI call in L2 cache initialisation

Now that highbank uses the write_sec method, we don't need to enable
the L2 cache in SoC specific code; this can be done via t

ARM: l2c: highbank: remove explicit SMI call in L2 cache initialisation

Now that highbank uses the write_sec method, we don't need to enable
the L2 cache in SoC specific code; this can be done via the normal
mechanisms in the L2C code.

Checking with Rob Herring:
> > Can we kill the "highbank_smc1(0x102, 0x1);" here? That means
> > l2x0_of_init() will see the L2 cache disabled, and will try to enable
> > it via the write_sec hook, so it should do the right thing.
>
> Yes, that should work. You should be able to just call l2x0_of_init
> unconditionally. The condition was really to just avoid the smc on
> Midway which does get handled on h/w, but not if running virtualized.

So also drop the DT check too. I'm leaving the config check in place
so that if L2 is disabled, the write_sec hook can be optimised away.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

show more ...

ARM: l2c: highbank: implement new write_sec method

With the write_sec method, we no longer need to override the default L2C
disable method. This can be handled via the write_sec method instead.

Si

ARM: l2c: highbank: implement new write_sec method

With the write_sec method, we no longer need to override the default L2C
disable method. This can be handled via the write_sec method instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

show more ...

ARM: l2c: remove unnecessary UL-suffix to mask values

They're u32, they're not unsigned long. The UL suffix is not required
here.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell

ARM: l2c: remove unnecessary UL-suffix to mask values

They're u32, they're not unsigned long. The UL suffix is not required
here.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

show more ...

ARM: 7938/1: OMAP4/highbank: Flush L2 cache before disabling

Kexec disables outer cache before jumping to reboot code, but it doesn't
flush it explicitly. Flush is done implicitly inside of l2x0_dis

ARM: 7938/1: OMAP4/highbank: Flush L2 cache before disabling

Kexec disables outer cache before jumping to reboot code, but it doesn't
flush it explicitly. Flush is done implicitly inside of l2x0_disable().
But some SoC's override default .disable handler and don't flush cache.
This may lead to a corrupted memory during Kexec reboot on these
platforms.

This patch adds cache flush inside of OMAP4 and Highbank outer_cache.disable()
handlers to make it consistent with default l2x0_disable().

Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

show more ...

ARM: highbank: handle soft poweroff and reset key events

Graceful reboot and poweroff via IPMI commands to the management
processor don't work. Power and reset keys are events from the
management pr

ARM: highbank: handle soft poweroff and reset key events

Graceful reboot and poweroff via IPMI commands to the management
processor don't work. Power and reset keys are events from the
management processor which are generated via IPC messages. Passing
the keys to userspace does not work as neither acpid nor a desktop
environment are present.

This adds a notifier handler for the IPC messages so the kernel can
handle the key events directly and IPMI graceful shutdown will work.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: stable@vger.kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>

show more ...

ARM: highbank: adapt to use ARM PSCI calls

This adapts highbank to use psci for smp_ops and the cpu_suspend function
for suspend/resume.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>

cpuidle: calxeda: add support to use PSCI calls

This updates the Calxeda cpuidle driver to use PSCI calls to powergate
cores. This also enables cpuidle for the ECX-2000.

This could possibly become

cpuidle: calxeda: add support to use PSCI calls

This updates the Calxeda cpuidle driver to use PSCI calls to powergate
cores. This also enables cpuidle for the ECX-2000.

This could possibly become a generic PSCI driver, but there are no other
PSCI users in the kernel other than mach-virt.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: linux-pm@vger.kernel.org

show more ...

ARM: highbank: cpuidle: convert to platform driver

As the ux500 and the kirkwood driver, make the calxeda driver a platform driver

[Compiled only]

Signed-off-by: Daniel Lezcano <daniel.lezcano@lin

ARM: highbank: cpuidle: convert to platform driver

As the ux500 and the kirkwood driver, make the calxeda driver a platform driver

[Compiled only]

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>

show more ...

ARM: highbank: remove custom .init_time hook

With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks. Highbank clock provider need a reference
to system r

ARM: highbank: remove custom .init_time hook

With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks. Highbank clock provider need a reference
to system registers, as a workaround current clk driver maps those
independent of arch code now.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Mike Turquette <mturquette@linaro.org>

show more ...

ARM: highbank: clean-up some unused includes

Signed-off-by: Rob Herring <rob.herring@calxeda.com>

ARM: highbank: avoid L2 cache smc calls when PL310 is not present

While Midway firmware handles L2 smc calls as nops, the custom smc calls
present a problem when running virtualized Midway guest. Th

ARM: highbank: avoid L2 cache smc calls when PL310 is not present

While Midway firmware handles L2 smc calls as nops, the custom smc calls
present a problem when running virtualized Midway guest. They aren't
needed so just avoid calling them.

In the process, cleanup the L2X0 ifdefs and use IS_ENABLED instead.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>

show more ...

ARM: highbank: enable DMA zone for LPAE

Some devices are restricted to 32-bit DMA. Thus the platform dma_zone_size
needs to be set. Otherwise dma-mapping code is complaining, e.g.

calxedaxgmac fff5

ARM: highbank: enable DMA zone for LPAE

Some devices are restricted to 32-bit DMA. Thus the platform dma_zone_size
needs to be set. Otherwise dma-mapping code is complaining, e.g.

calxedaxgmac fff50000.ethernet: coherent DMA mask 0xffffffff is smaller
than system GFP_DMA mask 0xffffffffffffffff

Signed-off-by: Andreas Herrmann <andreas.herrmann@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>

show more ...

ARM: highbank: Only touch common coherency control register fields

Midway adds new register fields to the coherency control registers, so
writing absolute values will break on Midway. Change the reg

ARM: highbank: Only touch common coherency control register fields

Midway adds new register fields to the coherency control registers, so
writing absolute values will break on Midway. Change the register
accesses to only modify the necessary and common fields in order to
support both Midway and Highbank.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

show more ...

ARM: highbank: remove the .map_io declaration

Now that the ARM core code calls debug_ll_io_init, we can remove it from
the machine_desc declaration.

Signed-off-by: Maxime Ripard <maxime.ripard@free

ARM: highbank: remove the .map_io declaration

Now that the ARM core code calls debug_ll_io_init, we can remove it from
the machine_desc declaration.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

show more ...

ARM: highbank: use OF init for sp804 timer

Remove the highbank specific setup for the sp804 timer now that
clocksource_of_init will do it.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>

ARM: convert arm/arm64 arch timer to use CLKSRC_OF init

This converts arm and arm64 to use CLKSRC_OF DT based initialization for
the arch timer. A new function arch_timer_arch_init is added to allow

ARM: convert arm/arm64 arch timer to use CLKSRC_OF init

This converts arm and arm64 to use CLKSRC_OF DT based initialization for
the arch timer. A new function arch_timer_arch_init is added to allow for
arch specific setup.

This has a side effect of enabling sched_clock on omap5 and exynos5. There
should not be any reason not to use the arch timers for sched_clock.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Simon Horman <horms@verge.net.au>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-sh@vger.kernel.org
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

show more ...

ARM: smp_twd: convert to use CLKSRC_OF init

Now that we have OF based init with CLKSRC_OF, convert smp_twd init
function to use it and covert all callers of
twd_local_timer_of_register.

Signed-off-

ARM: smp_twd: convert to use CLKSRC_OF init

Now that we have OF based init with CLKSRC_OF, convert smp_twd init
function to use it and covert all callers of
twd_local_timer_of_register.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: John Stultz <johnstul@us.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-omap@vger.kernel.org
Cc: spear-devel@list.st.com
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>

show more ...