1/*
2 * Copyright 2017 Gateworks Corporation
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This file is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of
12 *     the License, or (at your option) any later version.
13 *
14 *     This file is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 *     You should have received a copy of the GNU General Public
20 *     License along with this file; if not, write to the Free
21 *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 *     MA 02110-1301 USA
23 *
24 * Or, alternatively,
25 *
26 *  b) Permission is hereby granted, free of charge, to any person
27 *     obtaining a copy of this software and associated documentation
28 *     files (the "Software"), to deal in the Software without
29 *     restriction, including without limitation the rights to use,
30 *     copy, modify, merge, publish, distribute, sublicense, and/or
31 *     sell copies of the Software, and to permit persons to whom the
32 *     Software is furnished to do so, subject to the following
33 *     conditions:
34 *
35 *     The above copyright notice and this permission notice shall be
36 *     included in all copies or substantial portions of the Software.
37 *
38 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 *     OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48#include <dt-bindings/gpio/gpio.h>
49#include <dt-bindings/input/input.h>
50#include <dt-bindings/interrupt-controller/irq.h>
51
52/ {
53	/* these are used by bootloader for disabling nodes */
54	aliases {
55		led0 = &led0;
56		led1 = &led1;
57		led2 = &led2;
58		ssi0 = &ssi1;
59		usb0 = &usbh1;
60		usb1 = &usbotg;
61	};
62
63	chosen {
64		stdout-path = &uart2;
65	};
66
67	backlight-display {
68		compatible = "pwm-backlight";
69		pwms = <&pwm4 0 5000000>;
70		brightness-levels = <
71			0  1  2  3  4  5  6  7  8  9
72			10 11 12 13 14 15 16 17 18 19
73			20 21 22 23 24 25 26 27 28 29
74			30 31 32 33 34 35 36 37 38 39
75			40 41 42 43 44 45 46 47 48 49
76			50 51 52 53 54 55 56 57 58 59
77			60 61 62 63 64 65 66 67 68 69
78			70 71 72 73 74 75 76 77 78 79
79			80 81 82 83 84 85 86 87 88 89
80			90 91 92 93 94 95 96 97 98 99
81			100
82			>;
83		default-brightness-level = <100>;
84	};
85
86	backlight-keypad {
87		compatible = "gpio-backlight";
88		gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
89		default-on;
90	};
91
92	gpio-keys {
93		compatible = "gpio-keys";
94
95		user-pb {
96			label = "user_pb";
97			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
98			linux,code = <BTN_0>;
99		};
100
101		user-pb1x {
102			label = "user_pb1x";
103			linux,code = <BTN_1>;
104			interrupt-parent = <&gsc>;
105			interrupts = <0>;
106		};
107
108		key-erased {
109			label = "key-erased";
110			linux,code = <BTN_2>;
111			interrupt-parent = <&gsc>;
112			interrupts = <1>;
113		};
114
115		eeprom-wp {
116			label = "eeprom_wp";
117			linux,code = <BTN_3>;
118			interrupt-parent = <&gsc>;
119			interrupts = <2>;
120		};
121
122		tamper {
123			label = "tamper";
124			linux,code = <BTN_4>;
125			interrupt-parent = <&gsc>;
126			interrupts = <5>;
127		};
128
129		switch-hold {
130			label = "switch_hold";
131			linux,code = <BTN_5>;
132			interrupt-parent = <&gsc>;
133			interrupts = <7>;
134		};
135	};
136
137	leds {
138		compatible = "gpio-leds";
139		pinctrl-names = "default";
140		pinctrl-0 = <&pinctrl_gpio_leds>;
141
142		led0: led-user1 {
143			label = "user1";
144			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
145			default-state = "on";
146			linux,default-trigger = "heartbeat";
147		};
148
149		led1: led-user2 {
150			label = "user2";
151			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
152			default-state = "off";
153		};
154
155		led2: led-user3 {
156			label = "user3";
157			gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
158			default-state = "off";
159		};
160	};
161
162	memory@10000000 {
163		device_type = "memory";
164		reg = <0x10000000 0x40000000>;
165	};
166
167	pps {
168		compatible = "pps-gpio";
169		pinctrl-names = "default";
170		pinctrl-0 = <&pinctrl_pps>;
171		gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
172	};
173
174	reg_2p5v: regulator-2p5v {
175		compatible = "regulator-fixed";
176		regulator-name = "2P5V";
177		regulator-min-microvolt = <2500000>;
178		regulator-max-microvolt = <2500000>;
179		regulator-always-on;
180	};
181
182	reg_3p3v: regulator-3p3v {
183		compatible = "regulator-fixed";
184		regulator-name = "3P3V";
185		regulator-min-microvolt = <3300000>;
186		regulator-max-microvolt = <3300000>;
187		regulator-always-on;
188	};
189
190	reg_5p0v: regulator-5p0v {
191		compatible = "regulator-fixed";
192		regulator-name = "5P0V";
193		regulator-min-microvolt = <5000000>;
194		regulator-max-microvolt = <5000000>;
195		regulator-always-on;
196	};
197
198	reg_12p0v: regulator-12p0v {
199		compatible = "regulator-fixed";
200		regulator-name = "12P0V";
201		regulator-min-microvolt = <12000000>;
202		regulator-max-microvolt = <12000000>;
203		gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
204		enable-active-high;
205	};
206
207	reg_1p4v: regulator-vddsoc {
208		compatible = "regulator-fixed";
209		regulator-name = "vdd_soc";
210		regulator-min-microvolt = <1400000>;
211		regulator-max-microvolt = <1400000>;
212		regulator-always-on;
213	};
214
215	reg_usb_h1_vbus: regulator-usb-h1-vbus {
216		compatible = "regulator-fixed";
217		regulator-name = "usb_h1_vbus";
218		regulator-min-microvolt = <5000000>;
219		regulator-max-microvolt = <5000000>;
220		regulator-always-on;
221	};
222
223	reg_usb_otg_vbus: regulator-usb-otg-vbus {
224		compatible = "regulator-fixed";
225		regulator-name = "usb_otg_vbus";
226		regulator-min-microvolt = <5000000>;
227		regulator-max-microvolt = <5000000>;
228		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
229		enable-active-high;
230	};
231
232	sound {
233		compatible = "fsl,imx6q-ventana-sgtl5000",
234			     "fsl,imx-audio-sgtl5000";
235		model = "sgtl5000-audio";
236		ssi-controller = <&ssi1>;
237		audio-codec = <&sgtl5000>;
238		audio-routing =
239			"MIC_IN", "Mic Jack",
240			"Mic Jack", "Mic Bias",
241			"Headphone Jack", "HP_OUT";
242		mux-int-port = <1>;
243		mux-ext-port = <4>;
244	};
245};
246
247&audmux {
248	pinctrl-names = "default";
249	pinctrl-0 = <&pinctrl_audmux>;
250	status = "okay";
251};
252
253&ecspi3 {
254	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
255	pinctrl-names = "default";
256	pinctrl-0 = <&pinctrl_ecspi3>;
257	status = "okay";
258};
259
260&can1 {
261	pinctrl-names = "default";
262	pinctrl-0 = <&pinctrl_flexcan>;
263	status = "okay";
264};
265
266&clks {
267	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
268			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
269	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
270				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
271};
272
273&fec {
274	pinctrl-names = "default";
275	pinctrl-0 = <&pinctrl_enet>;
276	phy-mode = "rgmii-id";
277	phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
278	status = "okay";
279};
280
281&hdmi {
282	ddc-i2c-bus = <&i2c3>;
283	status = "okay";
284};
285
286&i2c1 {
287	clock-frequency = <100000>;
288	pinctrl-names = "default";
289	pinctrl-0 = <&pinctrl_i2c1>;
290	status = "okay";
291
292	gsc: gsc@20 {
293		compatible = "gw,gsc";
294		reg = <0x20>;
295		interrupt-parent = <&gpio1>;
296		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
297		interrupt-controller;
298		#interrupt-cells = <1>;
299		#size-cells = <0>;
300
301		adc {
302			compatible = "gw,gsc-adc";
303			#address-cells = <1>;
304			#size-cells = <0>;
305
306			channel@0 {
307				gw,mode = <0>;
308				reg = <0x00>;
309				label = "temp";
310			};
311
312			channel@2 {
313				gw,mode = <1>;
314				reg = <0x02>;
315				label = "vdd_vin";
316			};
317
318			channel@5 {
319				gw,mode = <1>;
320				reg = <0x05>;
321				label = "vdd_3p3";
322			};
323
324			channel@8 {
325				gw,mode = <1>;
326				reg = <0x08>;
327				label = "vdd_bat";
328			};
329
330			channel@b {
331				gw,mode = <1>;
332				reg = <0x0b>;
333				label = "vdd_5p0";
334			};
335
336			channel@e {
337				gw,mode = <1>;
338				reg = <0xe>;
339				label = "vdd_arm";
340			};
341
342			channel@11 {
343				gw,mode = <1>;
344				reg = <0x11>;
345				label = "vdd_soc";
346			};
347
348			channel@14 {
349				gw,mode = <1>;
350				reg = <0x14>;
351				label = "vdd_3p0";
352			};
353
354			channel@17 {
355				gw,mode = <1>;
356				reg = <0x17>;
357				label = "vdd_1p5";
358			};
359
360			channel@1d {
361				gw,mode = <1>;
362				reg = <0x1d>;
363				label = "vdd_1p8";
364			};
365
366			channel@20 {
367				gw,mode = <1>;
368				reg = <0x20>;
369				label = "vdd_an1";
370			};
371
372			channel@23 {
373				gw,mode = <1>;
374				reg = <0x23>;
375				label = "vdd_2p5";
376			};
377
378			channel@26 {
379				gw,mode = <1>;
380				reg = <0x26>;
381				label = "vdd_gps";
382			};
383
384			channel@29 {
385				gw,mode = <1>;
386				reg = <0x29>;
387				label = "vdd_an2";
388			};
389		};
390	};
391
392	gsc_gpio: gpio@23 {
393		compatible = "nxp,pca9555";
394		reg = <0x23>;
395		gpio-controller;
396		#gpio-cells = <2>;
397		interrupt-parent = <&gsc>;
398		interrupts = <4>;
399	};
400
401	eeprom1: eeprom@50 {
402		compatible = "atmel,24c02";
403		reg = <0x50>;
404		pagesize = <16>;
405	};
406
407	eeprom2: eeprom@51 {
408		compatible = "atmel,24c02";
409		reg = <0x51>;
410		pagesize = <16>;
411	};
412
413	eeprom3: eeprom@52 {
414		compatible = "atmel,24c02";
415		reg = <0x52>;
416		pagesize = <16>;
417	};
418
419	eeprom4: eeprom@53 {
420		compatible = "atmel,24c02";
421		reg = <0x53>;
422		pagesize = <16>;
423	};
424
425	ds1672: rtc@68 {
426		compatible = "dallas,ds1672";
427		reg = <0x68>;
428	};
429};
430
431&i2c2 {
432	clock-frequency = <100000>;
433	pinctrl-names = "default";
434	pinctrl-0 = <&pinctrl_i2c2>;
435	status = "okay";
436
437	sgtl5000: codec@a {
438		compatible = "fsl,sgtl5000";
439		reg = <0x0a>;
440		#sound-dai-cells = <0>;
441		clocks = <&clks IMX6QDL_CLK_CKO>;
442		VDDA-supply = <&reg_1p8v>;
443		VDDIO-supply = <&reg_3p3v>;
444	};
445
446	magn@1c {
447		compatible = "st,lsm9ds1-magn";
448		reg = <0x1c>;
449		pinctrl-names = "default";
450		pinctrl-0 = <&pinctrl_mag>;
451		interrupt-parent = <&gpio5>;
452		interrupts = <9 IRQ_TYPE_EDGE_RISING>;
453	};
454
455	tca8418: keypad@34 {
456		compatible = "ti,tca8418";
457		pinctrl-names = "default";
458		pinctrl-0 = <&pinctrl_keypad>;
459		reg = <0x34>;
460		interrupt-parent = <&gpio5>;
461		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
462		linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0)
463			         MATRIX_KEY(0x00, 0x00, BTN_1)
464			         MATRIX_KEY(0x01, 0x01, BTN_2)
465			         MATRIX_KEY(0x01, 0x00, BTN_3)
466			         MATRIX_KEY(0x02, 0x00, BTN_4)
467			         MATRIX_KEY(0x00, 0x03, BTN_5)
468			         MATRIX_KEY(0x00, 0x02, BTN_6)
469			         MATRIX_KEY(0x01, 0x03, BTN_7)
470			         MATRIX_KEY(0x01, 0x02, BTN_8)
471			         MATRIX_KEY(0x02, 0x02, BTN_9)
472		>;
473		keypad,num-rows = <4>;
474		keypad,num-columns = <4>;
475	};
476
477	ltc3676: pmic@3c {
478		compatible = "lltc,ltc3676";
479		pinctrl-names = "default";
480		pinctrl-0 = <&pinctrl_pmic>;
481		reg = <0x3c>;
482		interrupt-parent = <&gpio1>;
483		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
484
485		regulators {
486			/* VDD_DDR (1+R1/R2 = 2.105) */
487			reg_vdd_ddr: sw2 {
488				regulator-name = "vddddr";
489				regulator-min-microvolt = <868310>;
490				regulator-max-microvolt = <1684000>;
491				lltc,fb-voltage-divider = <221000 200000>;
492				regulator-ramp-delay = <7000>;
493				regulator-boot-on;
494				regulator-always-on;
495			};
496
497			/* VDD_ARM (1+R1/R2 = 1.931) */
498			reg_vdd_arm: sw3 {
499				regulator-name = "vddarm";
500				regulator-min-microvolt = <796551>;
501				regulator-max-microvolt = <1544827>;
502				lltc,fb-voltage-divider = <243000 261000>;
503				regulator-ramp-delay = <7000>;
504				regulator-boot-on;
505				regulator-always-on;
506				linux,phandle = <&reg_vdd_arm>;
507			};
508
509			/* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
510			reg_1p8v: sw4 {
511				regulator-name = "vdd1p8";
512				regulator-min-microvolt = <1033310>;
513				regulator-max-microvolt = <2004000>;
514				lltc,fb-voltage-divider = <301000 200000>;
515				regulator-ramp-delay = <7000>;
516				regulator-boot-on;
517				regulator-always-on;
518			};
519
520			/* VDD_1P0 (1+R1/R2 = 1.39): PCIe/ENET-PHY */
521			reg_1p0v: ldo2 {
522				regulator-name = "vdd1p0";
523				regulator-min-microvolt = <950000>;
524				regulator-max-microvolt = <1050000>;
525				lltc,fb-voltage-divider = <78700 200000>;
526				regulator-boot-on;
527				regulator-always-on;
528			};
529
530			/* VDD_AUD_1P8: Audio codec */
531			reg_aud_1p8v: ldo3 {
532				regulator-name = "vdd1p8a";
533				regulator-min-microvolt = <1800000>;
534				regulator-max-microvolt = <1800000>;
535				regulator-boot-on;
536			};
537
538			/* VDD_HIGH (1+R1/R2 = 4.17) */
539			reg_3p0v: ldo4 {
540				regulator-name = "vdd3p0";
541				regulator-min-microvolt = <3023250>;
542				regulator-max-microvolt = <3023250>;
543				lltc,fb-voltage-divider = <634000 200000>;
544				regulator-boot-on;
545				regulator-always-on;
546			};
547		};
548	};
549
550	imu@6a {
551		compatible = "st,lsm9ds1-imu";
552		reg = <0x6a>;
553		st,drdy-int-pin = <1>;
554		pinctrl-names = "default";
555		pinctrl-0 = <&pinctrl_imu>;
556		interrupt-parent = <&gpio5>;
557		interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
558	};
559};
560
561&i2c3 {
562	clock-frequency = <100000>;
563	pinctrl-names = "default";
564	pinctrl-0 = <&pinctrl_i2c3>;
565	status = "okay";
566
567	egalax_ts: touchscreen@4 {
568		compatible = "eeti,egalax_ts";
569		reg = <0x04>;
570		interrupt-parent = <&gpio5>;
571		interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
572		wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
573	};
574};
575
576&ldb {
577	fsl,dual-channel;
578	status = "okay";
579
580	lvds-channel@0 {
581		fsl,data-mapping = "spwg";
582		fsl,data-width = <18>;
583		status = "okay";
584
585		display-timings {
586			native-mode = <&timing0>;
587			timing0: hsd100pxn1 {
588				clock-frequency = <65000000>;
589				hactive = <1024>;
590				vactive = <768>;
591				hback-porch = <220>;
592				hfront-porch = <40>;
593				vback-porch = <21>;
594				vfront-porch = <7>;
595				hsync-len = <60>;
596				vsync-len = <10>;
597			};
598		};
599	};
600};
601
602&pcie {
603	pinctrl-names = "default";
604	pinctrl-0 = <&pinctrl_pcie>;
605	reset-gpio = <&gpio4 31 GPIO_ACTIVE_LOW>;
606	status = "okay";
607};
608
609&pwm2 {
610	pinctrl-names = "default";
611	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
612	status = "disabled";
613};
614
615&pwm3 {
616	pinctrl-names = "default";
617	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
618	status = "disabled";
619};
620
621&pwm4 {
622	#pwm-cells = <2>;
623	pinctrl-names = "default";
624	pinctrl-0 = <&pinctrl_pwm4>;
625	status = "okay";
626};
627
628&ssi1 {
629	status = "okay";
630};
631
632&uart1 {
633	pinctrl-names = "default";
634	pinctrl-0 = <&pinctrl_uart1>;
635	rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
636	status = "okay";
637};
638
639&uart2 {
640	pinctrl-names = "default";
641	pinctrl-0 = <&pinctrl_uart2>;
642	status = "okay";
643};
644
645&uart5 {
646	pinctrl-names = "default";
647	pinctrl-0 = <&pinctrl_uart5>;
648	status = "okay";
649};
650
651&usbotg {
652	vbus-supply = <&reg_usb_otg_vbus>;
653	pinctrl-names = "default";
654	pinctrl-0 = <&pinctrl_usbotg>;
655	disable-over-current;
656	status = "okay";
657};
658
659&usbh1 {
660	vbus-supply = <&reg_usb_h1_vbus>;
661	pinctrl-names = "default";
662	pinctrl-0 = <&pinctrl_usbh1>;
663	status = "okay";
664};
665
666&usdhc2 {
667	pinctrl-names = "default";
668	pinctrl-0 = <&pinctrl_usdhc2>;
669	bus-width = <8>;
670	vmmc-supply = <&reg_3p3v>;
671	non-removable;
672	status = "okay";
673};
674
675&usdhc3 {
676	pinctrl-names = "default", "state_100mhz", "state_200mhz";
677	pinctrl-0 = <&pinctrl_usdhc3>;
678	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
679	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
680	cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
681	vmmc-supply = <&reg_3p3v>;
682	status = "okay";
683};
684
685&wdog1 {
686	pinctrl-names = "default";
687	pinctrl-0 = <&pinctrl_wdog>;
688	fsl,ext-reset-output;
689};
690
691&iomuxc {
692	pinctrl_audmux: audmuxgrp {
693		fsl,pins = <
694			/* AUD4 */
695			MX6QDL_PAD_DISP0_DAT20__AUD4_TXC	0x130b0
696			MX6QDL_PAD_DISP0_DAT21__AUD4_TXD	0x110b0
697			MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS	0x130b0
698			MX6QDL_PAD_DISP0_DAT23__AUD4_RXD	0x130b0
699			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0 /* AUD4_MCK */
700			/* AUD6 */
701			MX6QDL_PAD_DI0_PIN2__AUD6_TXD		0x130b0
702			MX6QDL_PAD_DI0_PIN3__AUD6_TXFS		0x130b0
703			MX6QDL_PAD_DI0_PIN4__AUD6_RXD		0x130b0
704			MX6QDL_PAD_DI0_PIN15__AUD6_TXC		0x130b0
705		>;
706	};
707
708	pinctrl_ecspi3: escpi3grp {
709		fsl,pins = <
710			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1
711			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1
712			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1
713			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x100b1
714		>;
715	};
716
717	pinctrl_enet: enetgrp {
718		fsl,pins = <
719			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
720			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
721			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
722			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
723			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
724			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
725			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
726			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
727			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
728			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
729			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
730			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
731			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
732			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
733			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
734			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
735			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x4001b0b0 /* PHY_RST# */
736		>;
737	};
738
739	pinctrl_flexcan: flexcangrp {
740		fsl,pins = <
741			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
742			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1
743			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x4001b0b0 /* CAN_STBY */
744		>;
745	};
746
747	pinctrl_gpio_leds: gpioledsgrp {
748		fsl,pins = <
749			MX6QDL_PAD_KEY_COL0__GPIO4_IO06		0x1b0b0
750			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0
751			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15		0x1b0b0
752		>;
753	};
754
755	pinctrl_i2c1: i2c1grp {
756		fsl,pins = <
757			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
758			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
759			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0xb0b1
760		>;
761	};
762
763	pinctrl_i2c2: i2c2grp {
764		fsl,pins = <
765			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
766			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
767		>;
768	};
769
770	pinctrl_i2c3: i2c3grp {
771		fsl,pins = <
772			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
773			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
774			MX6QDL_PAD_GPIO_19__GPIO4_IO05		0x4001b0b0 /* DIOI2C_DIS# */
775			MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12	0x0001b0b0 /* LVDS_TOUCH_IRQ# */
776			MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13	0x0001b0b0 /* LVDS_BACKEN */
777		>;
778	};
779
780	pinctrl_imu: imugrp {
781		fsl,pins = <
782			MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06	0x1b0b0
783		>;
784	};
785
786	pinctrl_keypad: keypadgrp {
787		fsl,pins = <
788			MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11	0x0001b0b0 /* KEYPAD_IRQ# */
789			MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30	0x0001b0b0 /* KEYPAD_LED_EN */
790		>;
791	};
792
793	pinctrl_mag: maggrp {
794		fsl,pins = <
795			MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09	0x1b0b0
796		>;
797	};
798
799	pinctrl_pcie: pciegrp {
800		fsl,pins = <
801			MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31	0x1b0b0    /* PCI_RST# */
802			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x4001b0b0 /* PCIESKT_WDIS# */
803		>;
804	};
805
806	pinctrl_pmic: pmicgrp {
807		fsl,pins = <
808			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0001b0b0 /* PMIC_IRQ# */
809		>;
810	};
811
812	pinctrl_pps: ppsgrp {
813		fsl,pins = <
814			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b0b1
815		>;
816	};
817
818	pinctrl_pwm2: pwm2grp {
819		fsl,pins = <
820			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
821		>;
822	};
823
824	pinctrl_pwm3: pwm3grp {
825		fsl,pins = <
826			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
827		>;
828	};
829
830	pinctrl_pwm4: pwm4grp {
831		fsl,pins = <
832			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
833		>;
834	};
835
836	pinctrl_uart1: uart1grp {
837		fsl,pins = <
838			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
839			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
840			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x4001b0b1 /* TEN */
841		>;
842	};
843
844	pinctrl_uart2: uart2grp {
845		fsl,pins = <
846			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
847			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
848		>;
849	};
850
851	pinctrl_uart5: uart5grp {
852		fsl,pins = <
853			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
854			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
855		>;
856	};
857
858	pinctrl_usbh1: usbh1grp {
859		fsl,pins = <
860			MX6QDL_PAD_GPIO_9__GPIO1_IO09		0x4001b0b0 /* USBHUB_RST# */
861		>;
862	};
863
864	pinctrl_usbotg: usbotggrp {
865		fsl,pins = <
866			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
867			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* PWR_EN */
868			MX6QDL_PAD_KEY_COL4__GPIO4_IO14		0x1b0b0 /* OC */
869		>;
870	};
871
872	pinctrl_usdhc2: usdhc2grp {
873		fsl,pins = <
874			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170f9
875			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100f9
876			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170f9
877			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170f9
878			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170f9
879			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170f9
880			MX6QDL_PAD_NANDF_D4__SD2_DATA4		0x170f9
881			MX6QDL_PAD_NANDF_D5__SD2_DATA5		0x170f9
882			MX6QDL_PAD_NANDF_D6__SD2_DATA6		0x170f9
883			MX6QDL_PAD_NANDF_D7__SD2_DATA7		0x170f9
884		>;
885	};
886
887	pinctrl_usdhc3: usdhc3grp {
888		fsl,pins = <
889			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
890			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
891			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
892			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
893			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
894			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
895			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x17059 /* CD */
896			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x17059
897		>;
898	};
899
900	pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
901		fsl,pins = <
902			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170b9
903			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100b9
904			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170b9
905			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170b9
906			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170b9
907			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170b9
908			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170b9 /* CD */
909			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170b9
910		>;
911	};
912
913	pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
914		fsl,pins = <
915			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x170f9
916			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x100f9
917			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x170f9
918			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x170f9
919			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x170f9
920			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
921			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x170f9 /* CD */
922			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
923		>;
924	};
925
926	pinctrl_wdog: wdoggrp {
927		fsl,pins = <
928			MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
929		>;
930	};
931};
932