1/*
2 * Support for imx6 based Advantech DMS-BA16 Qseven module
3 *
4 * Copyright 2015 Timesys Corporation.
5 * Copyright 2015 General Electric Company
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 *  a) This file is free software; you can redistribute it and/or
13 *     modify it under the terms of the GNU General Public License
14 *     version 2 as published by the Free Software Foundation.
15 *
16 *     This file is distributed in the hope that it will be useful,
17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19 *     GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 *  b) Permission is hereby granted, free of charge, to any person
24 *     obtaining a copy of this software and associated documentation
25 *     files (the "Software"), to deal in the Software without
26 *     restriction, including without limitation the rights to use,
27 *     copy, modify, merge, publish, distribute, sublicense, and/or
28 *     sell copies of the Software, and to permit persons to whom the
29 *     Software is furnished to do so, subject to the following
30 *     conditions:
31 *
32 *     The above copyright notice and this permission notice shall be
33 *     included in all copies or substantial portions of the Software.
34 *
35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 *     OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45#include "imx6q.dtsi"
46#include <dt-bindings/gpio/gpio.h>
47
48/ {
49	memory@10000000 {
50		device_type = "memory";
51		reg = <0x10000000 0x40000000>;
52	};
53
54	backlight_lvds: backlight {
55		compatible = "pwm-backlight";
56		pinctrl-names = "default";
57		pinctrl-0 = <&pinctrl_display>;
58		pwms = <&pwm1 0 5000000>;
59		brightness-levels = <  0   1   2   3   4   5   6   7   8   9
60				      10  11  12  13  14  15  16  17  18  19
61				      20  21  22  23  24  25  26  27  28  29
62				      30  31  32  33  34  35  36  37  38  39
63				      40  41  42  43  44  45  46  47  48  49
64				      50  51  52  53  54  55  56  57  58  59
65				      60  61  62  63  64  65  66  67  68  69
66				      70  71  72  73  74  75  76  77  78  79
67				      80  81  82  83  84  85  86  87  88  89
68				      90  91  92  93  94  95  96  97  98  99
69				     100 101 102 103 104 105 106 107 108 109
70				     110 111 112 113 114 115 116 117 118 119
71				     120 121 122 123 124 125 126 127 128 129
72				     130 131 132 133 134 135 136 137 138 139
73				     140 141 142 143 144 145 146 147 148 149
74				     150 151 152 153 154 155 156 157 158 159
75				     160 161 162 163 164 165 166 167 168 169
76				     170 171 172 173 174 175 176 177 178 179
77				     180 181 182 183 184 185 186 187 188 189
78				     190 191 192 193 194 195 196 197 198 199
79				     200 201 202 203 204 205 206 207 208 209
80				     210 211 212 213 214 215 216 217 218 219
81				     220 221 222 223 224 225 226 227 228 229
82				     230 231 232 233 234 235 236 237 238 239
83				     240 241 242 243 244 245 246 247 248 249
84				     250 251 252 253 254 255>;
85		default-brightness-level = <255>;
86		enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
87	};
88
89	reg_1p8v: regulator-1p8v {
90		compatible = "regulator-fixed";
91		regulator-name = "1P8V";
92		regulator-min-microvolt = <1800000>;
93		regulator-max-microvolt = <1800000>;
94		regulator-always-on;
95	};
96
97	reg_3p3v: regulator-3p3v {
98		compatible = "regulator-fixed";
99		regulator-name = "3P3V";
100		regulator-min-microvolt = <3300000>;
101		regulator-max-microvolt = <3300000>;
102		regulator-always-on;
103	};
104
105	reg_lvds: regulator-lvds {
106		compatible = "regulator-fixed";
107		regulator-name = "lvds_ppen";
108		regulator-min-microvolt = <3300000>;
109		regulator-max-microvolt = <3300000>;
110		regulator-boot-on;
111		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
112		enable-active-high;
113	};
114
115	reg_usb_h1_vbus: regulator-usbh1vbus {
116		compatible = "regulator-fixed";
117		regulator-name = "usb_h1_vbus";
118		regulator-min-microvolt = <5000000>;
119		regulator-max-microvolt = <5000000>;
120	};
121
122	reg_usb_otg_vbus: regulator-usbotgvbus {
123		compatible = "regulator-fixed";
124		regulator-name = "usb_otg_vbus";
125		regulator-min-microvolt = <5000000>;
126		regulator-max-microvolt = <5000000>;
127		pinctrl-0 = <&pinctrl_usbotg_vbus>;
128		gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
129		enable-active-high;
130	};
131};
132
133&audmux {
134	pinctrl-names = "default";
135	pinctrl-0 = <&pinctrl_audmux>;
136	status = "okay";
137};
138
139&ecspi1 {
140	cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
141	pinctrl-names = "default";
142	pinctrl-0 = <&pinctrl_ecspi1>;
143	status = "okay";
144
145	flash: flash@0 {
146		compatible = "jedec,spi-nor";
147		#address-cells = <1>;
148		#size-cells = <1>;
149		spi-max-frequency = <20000000>;
150		reg = <0>;
151
152		partition@0 {
153			label = "U-Boot";
154			reg = <0x0 0xc0000>;
155		};
156
157		partition@c0000 {
158			label = "env";
159			reg = <0xc0000 0x10000>;
160		};
161
162		partition@d0000 {
163			label = "spare";
164			reg = <0xd0000 0x320000>;
165		};
166
167		partition@3f0000 {
168			label = "mfg";
169			reg = <0x3f0000 0x10000>;
170		};
171	};
172};
173
174&fec {
175	pinctrl-names = "default";
176	pinctrl-0 = <&pinctrl_enet>;
177	phy-mode = "rgmii-id";
178	phy-supply = <&reg_3p3v>;
179	phy-handle = <&phy0>;
180	status = "okay";
181
182	mdio {
183		#address-cells = <1>;
184		#size-cells = <0>;
185
186		phy0: ethernet-phy@4 {
187			reg = <4>;
188			qca,clk-out-frequency = <125000000>;
189		};
190	};
191};
192
193&hdmi {
194	ddc-i2c-bus = <&i2c2>;
195	status = "okay";
196};
197
198&i2c1 {
199	clock-frequency = <100000>;
200	pinctrl-names = "default";
201	pinctrl-0 = <&pinctrl_i2c1>;
202	status = "okay";
203};
204
205&i2c2 {
206	clock-frequency = <100000>;
207	pinctrl-names = "default";
208	pinctrl-0 = <&pinctrl_i2c2>;
209	status = "okay";
210};
211
212&i2c3 {
213	clock-frequency = <100000>;
214	pinctrl-names = "default";
215	pinctrl-0 = <&pinctrl_i2c3>;
216	status = "okay";
217
218	pmic@58 {
219		compatible = "dlg,da9063";
220		reg = <0x58>;
221		pinctrl-names = "default";
222		pinctrl-0 = <&pinctrl_pmic>;
223		interrupt-parent = <&gpio7>;
224		interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
225
226		onkey {
227			compatible = "dlg,da9063-onkey";
228		};
229
230		regulators {
231			vdd_bcore1: bcore1 {
232				regulator-min-microvolt = <1420000>;
233				regulator-max-microvolt = <1420000>;
234				regulator-always-on;
235				regulator-boot-on;
236			};
237
238			vdd_bcore2: bcore2 {
239				regulator-min-microvolt = <1420000>;
240				regulator-max-microvolt = <1420000>;
241				regulator-always-on;
242				regulator-boot-on;
243			};
244
245			vdd_bpro: bpro {
246				regulator-min-microvolt = <1500000>;
247				regulator-max-microvolt = <1500000>;
248				regulator-always-on;
249				regulator-boot-on;
250			};
251
252			vdd_bmem: bmem {
253				regulator-min-microvolt = <1800000>;
254				regulator-max-microvolt = <1800000>;
255				regulator-always-on;
256				regulator-boot-on;
257			};
258
259			vdd_bio: bio {
260				regulator-min-microvolt = <1800000>;
261				regulator-max-microvolt = <1800000>;
262				regulator-always-on;
263				regulator-boot-on;
264			};
265
266			vdd_bperi: bperi {
267				regulator-min-microvolt = <3300000>;
268				regulator-max-microvolt = <3300000>;
269				regulator-always-on;
270				regulator-boot-on;
271			};
272
273			vdd_ldo1: ldo1 {
274				regulator-min-microvolt = <600000>;
275				regulator-max-microvolt = <1860000>;
276			};
277
278			vdd_ldo2: ldo2 {
279				regulator-min-microvolt = <600000>;
280				regulator-max-microvolt = <1860000>;
281			};
282
283			vdd_ldo3: ldo3 {
284				regulator-min-microvolt = <900000>;
285				regulator-max-microvolt = <3440000>;
286			};
287
288			vdd_ldo4: ldo4 {
289				regulator-min-microvolt = <900000>;
290				regulator-max-microvolt = <3440000>;
291			};
292
293			vdd_ldo5: ldo5 {
294				regulator-min-microvolt = <900000>;
295				regulator-max-microvolt = <3600000>;
296			};
297
298			vdd_ldo6: ldo6 {
299				regulator-min-microvolt = <900000>;
300				regulator-max-microvolt = <3600000>;
301			};
302
303			vdd_ldo7: ldo7 {
304				regulator-min-microvolt = <900000>;
305				regulator-max-microvolt = <3600000>;
306			};
307
308			vdd_ldo8: ldo8 {
309				regulator-min-microvolt = <900000>;
310				regulator-max-microvolt = <3600000>;
311			};
312
313			vdd_ldo9: ldo9 {
314				regulator-min-microvolt = <950000>;
315				regulator-max-microvolt = <3600000>;
316			};
317
318			vdd_ldo10: ldo10 {
319				regulator-min-microvolt = <900000>;
320				regulator-max-microvolt = <3600000>;
321			};
322
323			vdd_ldo11: ldo11 {
324				regulator-min-microvolt = <900000>;
325				regulator-max-microvolt = <3600000>;
326				regulator-always-on;
327				regulator-boot-on;
328			};
329		};
330	};
331
332	rtc@32 {
333		compatible = "epson,rx8010";
334		pinctrl-names = "default";
335		pinctrl-0 = <&pinctrl_rtc>;
336		reg = <0x32>;
337		interrupt-parent = <&gpio4>;
338		interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
339	};
340};
341
342&pcie {
343	pinctrl-names = "default";
344	pinctrl-0 = <&pinctrl_pcie>;
345	reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
346	fsl,tx-swing-full = <103>;
347	fsl,tx-swing-low = <103>;
348	status = "okay";
349};
350
351&pwm1 {
352	#pwm-cells = <2>;
353	pinctrl-names = "default";
354	pinctrl-0 = <&pinctrl_pwm1>;
355	status = "okay";
356};
357
358&pwm2 {
359	pinctrl-names = "default";
360	pinctrl-0 = <&pinctrl_pwm2>;
361	status = "disabled";
362};
363
364&sata {
365	status = "okay";
366};
367
368&ssi1 {
369	status = "okay";
370};
371
372&uart3 {
373	pinctrl-names = "default";
374	pinctrl-0 = <&pinctrl_uart3>;
375	uart-has-rtscts;
376	status = "okay";
377};
378
379&uart4 {
380	pinctrl-names = "default";
381	pinctrl-0 = <&pinctrl_uart4>;
382	status = "okay";
383};
384
385&usbh1 {
386	pinctrl-names = "default";
387	pinctrl-0 = <&pinctrl_usbhub>;
388	vbus-supply = <&reg_usb_h1_vbus>;
389	reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
390	status = "okay";
391};
392
393&usbotg {
394	vbus-supply = <&reg_usb_otg_vbus>;
395	pinctrl-names = "default";
396	pinctrl-0 = <&pinctrl_usbotg>;
397	disable-over-current;
398	status = "okay";
399};
400
401&usdhc2 {
402	pinctrl-names = "default";
403	pinctrl-0 = <&pinctrl_usdhc2>;
404	cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
405	no-1-8-v;
406	keep-power-in-suspend;
407	wakeup-source;
408	status = "okay";
409};
410
411&usdhc3 {
412	pinctrl-names = "default";
413	pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
414	bus-width = <8>;
415	vmmc-supply = <&vdd_bperi>;
416	non-removable;
417	keep-power-in-suspend;
418	status = "okay";
419};
420
421&wdog1 {
422	pinctrl-names = "default";
423	pinctrl-0 = <&pinctrl_wdog>;
424	fsl,ext-reset-output;
425};
426
427&iomuxc {
428	pinctrl-names = "default";
429	pinctrl-0 = <&pinctrl_hog>;
430
431	pinctrl_audmux: audmuxgrp {
432		fsl,pins = <
433			MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
434			MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x130b0
435			MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
436			MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
437		>;
438	};
439
440	pinctrl_display: dispgrp {
441		fsl,pins = <
442			/* BLEN_OUT */
443			MX6QDL_PAD_GPIO_0__GPIO1_IO00    0x1b0b0
444			/* LVDS_PPEN_OUT */
445			MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x1b0b0
446		>;
447	};
448
449	pinctrl_ecspi1: ecspi1grp {
450		fsl,pins = <
451			MX6QDL_PAD_EIM_D17__ECSPI1_MISO	0x100b1
452			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI	0x100b1
453			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK	0x100b1
454			/* SPI1 CS */
455			MX6QDL_PAD_EIM_EB2__GPIO2_IO30	0x1b0b0
456		>;
457	};
458
459	pinctrl_ecspi5: ecspi5grp {
460		fsl,pins = <
461			MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO	0x1b0b0
462			MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI		0x1b0b0
463			MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK		0x1b0b0
464			MX6QDL_PAD_SD1_DAT1__GPIO1_IO17		0x1b0b0
465		>;
466	};
467
468	pinctrl_enet: enetgrp {
469		fsl,pins = <
470			MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x100b0
471			MX6QDL_PAD_ENET_MDC__ENET_MDC         0x100b0
472			MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x10030
473			MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x10030
474			MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x10030
475			MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x10030
476			MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x10030
477			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
478			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x100b0
479			MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b030
480			MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b030
481			MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b030
482			MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b030
483			MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b030
484			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
485			/* FEC Reset */
486			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28     0x1b0b0
487			/* AR8033 Interrupt */
488			MX6QDL_PAD_GPIO_19__GPIO4_IO05        0x1b0b0
489		>;
490	};
491
492	pinctrl_hog: hoggrp {
493		fsl,pins = <
494			/* GPIO 0-7 */
495			MX6QDL_PAD_NANDF_D0__GPIO2_IO00  0x1b0b0
496			MX6QDL_PAD_NANDF_D1__GPIO2_IO01  0x1b0b0
497			MX6QDL_PAD_NANDF_D2__GPIO2_IO02  0x1b0b0
498			MX6QDL_PAD_NANDF_D3__GPIO2_IO03  0x1b0b0
499			MX6QDL_PAD_NANDF_D4__GPIO2_IO04  0x1b0b0
500			MX6QDL_PAD_NANDF_D5__GPIO2_IO05  0x1b0b0
501			MX6QDL_PAD_NANDF_D6__GPIO2_IO06  0x1b0b0
502			MX6QDL_PAD_NANDF_D7__GPIO2_IO07  0x1b0b0
503			/* SUS_S3_OUT to CPLD */
504			MX6QDL_PAD_KEY_ROW2__GPIO4_IO11  0x1b0b0
505		>;
506	};
507
508	pinctrl_i2c1: i2c1grp {
509		fsl,pins = <
510			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA	0x4001b8b1
511			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL	0x4001b8b1
512		>;
513	};
514
515	pinctrl_i2c2: i2c2grp {
516		fsl,pins = <
517			MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1
518			MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1
519		>;
520	};
521
522	pinctrl_i2c3: i2c3grp {
523		fsl,pins = <
524			MX6QDL_PAD_GPIO_3__I2C3_SCL	0x4001b8b1
525			MX6QDL_PAD_GPIO_6__I2C3_SDA	0x4001b8b1
526		>;
527	};
528
529	pinctrl_pcie: pciegrp {
530		fsl,pins = <
531			/* PCIe Reset */
532			MX6QDL_PAD_GPIO_17__GPIO7_IO12	0x1b0b0
533			/* PCIe Wake */
534			MX6QDL_PAD_GPIO_5__GPIO1_IO05	0x1b0b0
535		>;
536	};
537
538	pinctrl_pmic: pmicgrp {
539		fsl,pins = <
540			/* PMIC Interrupt */
541			MX6QDL_PAD_GPIO_18__GPIO7_IO13	0x1b0b0
542		>;
543	};
544
545	pinctrl_pwm1: pwm1grp {
546		fsl,pins = <
547			MX6QDL_PAD_SD1_DAT3__PWM1_OUT	0x1b0b1
548		>;
549	};
550
551	pinctrl_pwm2: pwm2grp {
552		fsl,pins = <
553			MX6QDL_PAD_GPIO_1__PWM2_OUT	0x1b0b1
554		>;
555	};
556
557	pinctrl_rtc: rtcgrp {
558		fsl,pins = <
559			/* RTC_INT */
560			MX6QDL_PAD_KEY_COL2__GPIO4_IO10	0x1b0b0
561		>;
562	};
563
564	pinctrl_uart3: uart3grp {
565		fsl,pins = <
566			MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
567			MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
568			MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b1
569			MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b1
570		>;
571	};
572
573	pinctrl_uart4: uart4grp {
574		fsl,pins = <
575			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
576			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
577		>;
578	};
579
580	pinctrl_usbhub: usbhubgrp {
581		fsl,pins = <
582			/* HUB_RESET */
583			MX6QDL_PAD_GPIO_16__GPIO7_IO11	0x1b0b0
584		>;
585	};
586
587	pinctrl_usbotg: usbotggrp {
588		fsl,pins = <
589			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
590		>;
591	};
592
593	pinctrl_usbotg_vbus: usbotgvbusgrp {
594		fsl,pins = <
595			MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b0
596		>;
597	};
598
599	pinctrl_usdhc2: usdhc2grp {
600		fsl,pins = <
601			MX6QDL_PAD_SD2_CMD__SD2_CMD	0x17059
602			MX6QDL_PAD_SD2_CLK__SD2_CLK	0x10059
603			MX6QDL_PAD_SD2_DAT0__SD2_DATA0	0x17059
604			MX6QDL_PAD_SD2_DAT1__SD2_DATA1	0x17059
605			MX6QDL_PAD_SD2_DAT2__SD2_DATA2	0x17059
606			MX6QDL_PAD_SD2_DAT3__SD2_DATA3	0x17059
607			/* uSDHC2 CD */
608			MX6QDL_PAD_GPIO_4__GPIO1_IO04	0x1b0b0
609		>;
610	};
611
612	pinctrl_usdhc3: usdhc3grp {
613		fsl,pins = <
614			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059
615			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059
616			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059
617			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059
618			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059
619			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059
620			MX6QDL_PAD_SD3_DAT4__SD3_DATA4	0x17059
621			MX6QDL_PAD_SD3_DAT5__SD3_DATA5	0x17059
622			MX6QDL_PAD_SD3_DAT6__SD3_DATA6	0x17059
623			MX6QDL_PAD_SD3_DAT7__SD3_DATA7	0x17059
624		>;
625	};
626
627	pinctrl_usdhc3_reset: usdhc3grp-reset {
628		fsl,pins = <
629			MX6QDL_PAD_SD3_RST__SD3_RESET   0x170F9
630		>;
631	};
632
633	pinctrl_usdhc4: usdhc4grp {
634		fsl,pins = <
635			MX6QDL_PAD_SD4_CMD__SD4_CMD	0x17059
636			MX6QDL_PAD_SD4_CLK__SD4_CLK	0x17059
637			MX6QDL_PAD_SD4_DAT0__SD4_DATA0	0x17059
638			MX6QDL_PAD_SD4_DAT1__SD4_DATA1	0x17059
639			MX6QDL_PAD_SD4_DAT2__SD4_DATA2	0x17059
640			MX6QDL_PAD_SD4_DAT3__SD4_DATA3	0x17059
641			MX6QDL_PAD_SD4_DAT4__SD4_DATA4	0x17059
642			MX6QDL_PAD_SD4_DAT5__SD4_DATA5	0x17059
643			MX6QDL_PAD_SD4_DAT6__SD4_DATA6	0x17059
644			MX6QDL_PAD_SD4_DAT7__SD4_DATA7	0x17059
645			/* uSDHC4 CD */
646			MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
647			/* uSDHC4 SDIO PWR */
648			MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
649			/* uSDHC4 SDIO WP */
650			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
651			/* uSDHC4 SDIO LED */
652			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
653		>;
654	};
655
656	pinctrl_wdog: wdoggrp {
657		fsl,pins = <
658			MX6QDL_PAD_GPIO_9__WDOG1_B	0x1b0b0
659		>;
660	};
661};
662