xref: /openbmc/linux/arch/arm/Kconfig (revision 9d749629)
1config ARM
2	bool
3	default y
4	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
5	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
6	select ARCH_HAVE_CUSTOM_GPIO_H
7	select ARCH_WANT_IPC_PARSE_VERSION
8	select BUILDTIME_EXTABLE_SORT if MMU
9	select CPU_PM if (SUSPEND || CPU_IDLE)
10	select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
11	select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
12	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
13	select GENERIC_IRQ_PROBE
14	select GENERIC_IRQ_SHOW
15	select GENERIC_PCI_IOMAP
16	select GENERIC_SMP_IDLE_THREAD
17	select GENERIC_STRNCPY_FROM_USER
18	select GENERIC_STRNLEN_USER
19	select HARDIRQS_SW_RESEND
20	select HAVE_AOUT
21	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
22	select HAVE_ARCH_KGDB
23	select HAVE_ARCH_SECCOMP_FILTER
24	select HAVE_ARCH_TRACEHOOK
25	select HAVE_BPF_JIT
26	select HAVE_C_RECORDMCOUNT
27	select HAVE_DEBUG_KMEMLEAK
28	select HAVE_DMA_API_DEBUG
29	select HAVE_DMA_ATTRS
30	select HAVE_DMA_CONTIGUOUS if MMU
31	select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
32	select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
33	select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
34	select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
35	select HAVE_GENERIC_DMA_COHERENT
36	select HAVE_GENERIC_HARDIRQS
37	select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
38	select HAVE_IDE if PCI || ISA || PCMCIA
39	select HAVE_KERNEL_GZIP
40	select HAVE_KERNEL_LZMA
41	select HAVE_KERNEL_LZO
42	select HAVE_KERNEL_XZ
43	select HAVE_KPROBES if !XIP_KERNEL
44	select HAVE_KRETPROBES if (HAVE_KPROBES)
45	select HAVE_MEMBLOCK
46	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
47	select HAVE_PERF_EVENTS
48	select HAVE_REGS_AND_STACK_ACCESS_API
49	select HAVE_SYSCALL_TRACEPOINTS
50	select HAVE_UID16
51	select KTIME_SCALAR
52	select PERF_USE_VMALLOC
53	select RTC_LIB
54	select SYS_SUPPORTS_APM_EMULATION
55	select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
56	select MODULES_USE_ELF_REL
57	select CLONE_BACKWARDS
58	help
59	  The ARM series is a line of low-power-consumption RISC chip designs
60	  licensed by ARM Ltd and targeted at embedded applications and
61	  handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
62	  manufactured, but legacy ARM-based PC hardware remains popular in
63	  Europe.  There is an ARM Linux project with a web page at
64	  <http://www.arm.linux.org.uk/>.
65
66config ARM_HAS_SG_CHAIN
67	bool
68
69config NEED_SG_DMA_LENGTH
70	bool
71
72config ARM_DMA_USE_IOMMU
73	bool
74	select ARM_HAS_SG_CHAIN
75	select NEED_SG_DMA_LENGTH
76
77config HAVE_PWM
78	bool
79
80config MIGHT_HAVE_PCI
81	bool
82
83config SYS_SUPPORTS_APM_EMULATION
84	bool
85
86config GENERIC_GPIO
87	bool
88
89config HAVE_TCM
90	bool
91	select GENERIC_ALLOCATOR
92
93config HAVE_PROC_CPU
94	bool
95
96config NO_IOPORT
97	bool
98
99config EISA
100	bool
101	---help---
102	  The Extended Industry Standard Architecture (EISA) bus was
103	  developed as an open alternative to the IBM MicroChannel bus.
104
105	  The EISA bus provided some of the features of the IBM MicroChannel
106	  bus while maintaining backward compatibility with cards made for
107	  the older ISA bus.  The EISA bus saw limited use between 1988 and
108	  1995 when it was made obsolete by the PCI bus.
109
110	  Say Y here if you are building a kernel for an EISA-based machine.
111
112	  Otherwise, say N.
113
114config SBUS
115	bool
116
117config STACKTRACE_SUPPORT
118	bool
119	default y
120
121config HAVE_LATENCYTOP_SUPPORT
122	bool
123	depends on !SMP
124	default y
125
126config LOCKDEP_SUPPORT
127	bool
128	default y
129
130config TRACE_IRQFLAGS_SUPPORT
131	bool
132	default y
133
134config RWSEM_GENERIC_SPINLOCK
135	bool
136	default y
137
138config RWSEM_XCHGADD_ALGORITHM
139	bool
140
141config ARCH_HAS_ILOG2_U32
142	bool
143
144config ARCH_HAS_ILOG2_U64
145	bool
146
147config ARCH_HAS_CPUFREQ
148	bool
149	help
150	  Internal node to signify that the ARCH has CPUFREQ support
151	  and that the relevant menu configurations are displayed for
152	  it.
153
154config GENERIC_HWEIGHT
155	bool
156	default y
157
158config GENERIC_CALIBRATE_DELAY
159	bool
160	default y
161
162config ARCH_MAY_HAVE_PC_FDC
163	bool
164
165config ZONE_DMA
166	bool
167
168config NEED_DMA_MAP_STATE
169       def_bool y
170
171config ARCH_HAS_DMA_SET_COHERENT_MASK
172	bool
173
174config GENERIC_ISA_DMA
175	bool
176
177config FIQ
178	bool
179
180config NEED_RET_TO_USER
181	bool
182
183config ARCH_MTD_XIP
184	bool
185
186config VECTORS_BASE
187	hex
188	default 0xffff0000 if MMU || CPU_HIGH_VECTOR
189	default DRAM_BASE if REMAP_VECTORS_TO_RAM
190	default 0x00000000
191	help
192	  The base address of exception vectors.
193
194config ARM_PATCH_PHYS_VIRT
195	bool "Patch physical to virtual translations at runtime" if EMBEDDED
196	default y
197	depends on !XIP_KERNEL && MMU
198	depends on !ARCH_REALVIEW || !SPARSEMEM
199	help
200	  Patch phys-to-virt and virt-to-phys translation functions at
201	  boot and module load time according to the position of the
202	  kernel in system memory.
203
204	  This can only be used with non-XIP MMU kernels where the base
205	  of physical memory is at a 16MB boundary.
206
207	  Only disable this option if you know that you do not require
208	  this feature (eg, building a kernel for a single machine) and
209	  you need to shrink the kernel to the minimal size.
210
211config NEED_MACH_GPIO_H
212	bool
213	help
214	  Select this when mach/gpio.h is required to provide special
215	  definitions for this platform. The need for mach/gpio.h should
216	  be avoided when possible.
217
218config NEED_MACH_IO_H
219	bool
220	help
221	  Select this when mach/io.h is required to provide special
222	  definitions for this platform.  The need for mach/io.h should
223	  be avoided when possible.
224
225config NEED_MACH_MEMORY_H
226	bool
227	help
228	  Select this when mach/memory.h is required to provide special
229	  definitions for this platform.  The need for mach/memory.h should
230	  be avoided when possible.
231
232config PHYS_OFFSET
233	hex "Physical address of main memory" if MMU
234	depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
235	default DRAM_BASE if !MMU
236	help
237	  Please provide the physical address corresponding to the
238	  location of main memory in your system.
239
240config GENERIC_BUG
241	def_bool y
242	depends on BUG
243
244source "init/Kconfig"
245
246source "kernel/Kconfig.freezer"
247
248menu "System Type"
249
250config MMU
251	bool "MMU-based Paged Memory Management Support"
252	default y
253	help
254	  Select if you want MMU-based virtualised addressing space
255	  support by paged memory management. If unsure, say 'Y'.
256
257#
258# The "ARM system type" choice list is ordered alphabetically by option
259# text.  Please add new entries in the option alphabetic order.
260#
261choice
262	prompt "ARM system type"
263	default ARCH_MULTIPLATFORM
264
265config ARCH_MULTIPLATFORM
266	bool "Allow multiple platforms to be selected"
267	depends on MMU
268	select ARM_PATCH_PHYS_VIRT
269	select AUTO_ZRELADDR
270	select COMMON_CLK
271	select MULTI_IRQ_HANDLER
272	select SPARSE_IRQ
273	select USE_OF
274
275config ARCH_INTEGRATOR
276	bool "ARM Ltd. Integrator family"
277	select ARCH_HAS_CPUFREQ
278	select ARM_AMBA
279	select COMMON_CLK
280	select COMMON_CLK_VERSATILE
281	select GENERIC_CLOCKEVENTS
282	select HAVE_TCM
283	select ICST
284	select MULTI_IRQ_HANDLER
285	select NEED_MACH_MEMORY_H
286	select PLAT_VERSATILE
287	select SPARSE_IRQ
288	select VERSATILE_FPGA_IRQ
289	help
290	  Support for ARM's Integrator platform.
291
292config ARCH_REALVIEW
293	bool "ARM Ltd. RealView family"
294	select ARCH_WANT_OPTIONAL_GPIOLIB
295	select ARM_AMBA
296	select ARM_TIMER_SP804
297	select COMMON_CLK
298	select COMMON_CLK_VERSATILE
299	select GENERIC_CLOCKEVENTS
300	select GPIO_PL061 if GPIOLIB
301	select ICST
302	select NEED_MACH_MEMORY_H
303	select PLAT_VERSATILE
304	select PLAT_VERSATILE_CLCD
305	help
306	  This enables support for ARM Ltd RealView boards.
307
308config ARCH_VERSATILE
309	bool "ARM Ltd. Versatile family"
310	select ARCH_WANT_OPTIONAL_GPIOLIB
311	select ARM_AMBA
312	select ARM_TIMER_SP804
313	select ARM_VIC
314	select CLKDEV_LOOKUP
315	select GENERIC_CLOCKEVENTS
316	select HAVE_MACH_CLKDEV
317	select ICST
318	select PLAT_VERSATILE
319	select PLAT_VERSATILE_CLCD
320	select PLAT_VERSATILE_CLOCK
321	select VERSATILE_FPGA_IRQ
322	help
323	  This enables support for ARM Ltd Versatile board.
324
325config ARCH_AT91
326	bool "Atmel AT91"
327	select ARCH_REQUIRE_GPIOLIB
328	select CLKDEV_LOOKUP
329	select HAVE_CLK
330	select IRQ_DOMAIN
331	select NEED_MACH_GPIO_H
332	select NEED_MACH_IO_H if PCCARD
333	select PINCTRL
334	select PINCTRL_AT91 if USE_OF
335	help
336	  This enables support for systems based on Atmel
337	  AT91RM9200 and AT91SAM9* processors.
338
339config ARCH_BCM2835
340	bool "Broadcom BCM2835 family"
341	select ARCH_REQUIRE_GPIOLIB
342	select ARM_AMBA
343	select ARM_ERRATA_411920
344	select ARM_TIMER_SP804
345	select CLKDEV_LOOKUP
346	select COMMON_CLK
347	select CPU_V6
348	select GENERIC_CLOCKEVENTS
349	select GENERIC_GPIO
350	select MULTI_IRQ_HANDLER
351	select PINCTRL
352	select PINCTRL_BCM2835
353	select SPARSE_IRQ
354	select USE_OF
355	help
356	  This enables support for the Broadcom BCM2835 SoC. This SoC is
357	  use in the Raspberry Pi, and Roku 2 devices.
358
359config ARCH_CNS3XXX
360	bool "Cavium Networks CNS3XXX family"
361	select ARM_GIC
362	select CPU_V6K
363	select GENERIC_CLOCKEVENTS
364	select MIGHT_HAVE_CACHE_L2X0
365	select MIGHT_HAVE_PCI
366	select PCI_DOMAINS if PCI
367	help
368	  Support for Cavium Networks CNS3XXX platform.
369
370config ARCH_CLPS711X
371	bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
372	select ARCH_REQUIRE_GPIOLIB
373	select AUTO_ZRELADDR
374	select CLKDEV_LOOKUP
375	select COMMON_CLK
376	select CPU_ARM720T
377	select GENERIC_CLOCKEVENTS
378	select MULTI_IRQ_HANDLER
379	select NEED_MACH_MEMORY_H
380	select SPARSE_IRQ
381	help
382	  Support for Cirrus Logic 711x/721x/731x based boards.
383
384config ARCH_GEMINI
385	bool "Cortina Systems Gemini"
386	select ARCH_REQUIRE_GPIOLIB
387	select ARCH_USES_GETTIMEOFFSET
388	select CPU_FA526
389	help
390	  Support for the Cortina Systems Gemini family SoCs
391
392config ARCH_SIRF
393	bool "CSR SiRF"
394	select ARCH_REQUIRE_GPIOLIB
395	select COMMON_CLK
396	select GENERIC_CLOCKEVENTS
397	select GENERIC_IRQ_CHIP
398	select MIGHT_HAVE_CACHE_L2X0
399	select NO_IOPORT
400	select PINCTRL
401	select PINCTRL_SIRF
402	select USE_OF
403	help
404	  Support for CSR SiRFprimaII/Marco/Polo platforms
405
406config ARCH_EBSA110
407	bool "EBSA-110"
408	select ARCH_USES_GETTIMEOFFSET
409	select CPU_SA110
410	select ISA
411	select NEED_MACH_IO_H
412	select NEED_MACH_MEMORY_H
413	select NO_IOPORT
414	help
415	  This is an evaluation board for the StrongARM processor available
416	  from Digital. It has limited hardware on-board, including an
417	  Ethernet interface, two PCMCIA sockets, two serial ports and a
418	  parallel port.
419
420config ARCH_EP93XX
421	bool "EP93xx-based"
422	select ARCH_HAS_HOLES_MEMORYMODEL
423	select ARCH_REQUIRE_GPIOLIB
424	select ARCH_USES_GETTIMEOFFSET
425	select ARM_AMBA
426	select ARM_VIC
427	select CLKDEV_LOOKUP
428	select CPU_ARM920T
429	select NEED_MACH_MEMORY_H
430	help
431	  This enables support for the Cirrus EP93xx series of CPUs.
432
433config ARCH_FOOTBRIDGE
434	bool "FootBridge"
435	select CPU_SA110
436	select FOOTBRIDGE
437	select GENERIC_CLOCKEVENTS
438	select HAVE_IDE
439	select NEED_MACH_IO_H if !MMU
440	select NEED_MACH_MEMORY_H
441	help
442	  Support for systems based on the DC21285 companion chip
443	  ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
444
445config ARCH_MXS
446	bool "Freescale MXS-based"
447	select ARCH_REQUIRE_GPIOLIB
448	select CLKDEV_LOOKUP
449	select CLKSRC_MMIO
450	select COMMON_CLK
451	select GENERIC_CLOCKEVENTS
452	select HAVE_CLK_PREPARE
453	select MULTI_IRQ_HANDLER
454	select PINCTRL
455	select SPARSE_IRQ
456	select USE_OF
457	help
458	  Support for Freescale MXS-based family of processors
459
460config ARCH_NETX
461	bool "Hilscher NetX based"
462	select ARM_VIC
463	select CLKSRC_MMIO
464	select CPU_ARM926T
465	select GENERIC_CLOCKEVENTS
466	help
467	  This enables support for systems based on the Hilscher NetX Soc
468
469config ARCH_H720X
470	bool "Hynix HMS720x-based"
471	select ARCH_USES_GETTIMEOFFSET
472	select CPU_ARM720T
473	select ISA_DMA_API
474	help
475	  This enables support for systems based on the Hynix HMS720x
476
477config ARCH_IOP13XX
478	bool "IOP13xx-based"
479	depends on MMU
480	select ARCH_SUPPORTS_MSI
481	select CPU_XSC3
482	select NEED_MACH_MEMORY_H
483	select NEED_RET_TO_USER
484	select PCI
485	select PLAT_IOP
486	select VMSPLIT_1G
487	help
488	  Support for Intel's IOP13XX (XScale) family of processors.
489
490config ARCH_IOP32X
491	bool "IOP32x-based"
492	depends on MMU
493	select ARCH_REQUIRE_GPIOLIB
494	select CPU_XSCALE
495	select NEED_MACH_GPIO_H
496	select NEED_RET_TO_USER
497	select PCI
498	select PLAT_IOP
499	help
500	  Support for Intel's 80219 and IOP32X (XScale) family of
501	  processors.
502
503config ARCH_IOP33X
504	bool "IOP33x-based"
505	depends on MMU
506	select ARCH_REQUIRE_GPIOLIB
507	select CPU_XSCALE
508	select NEED_MACH_GPIO_H
509	select NEED_RET_TO_USER
510	select PCI
511	select PLAT_IOP
512	help
513	  Support for Intel's IOP33X (XScale) family of processors.
514
515config ARCH_IXP4XX
516	bool "IXP4xx-based"
517	depends on MMU
518	select ARCH_HAS_DMA_SET_COHERENT_MASK
519	select ARCH_REQUIRE_GPIOLIB
520	select CLKSRC_MMIO
521	select CPU_XSCALE
522	select DMABOUNCE if PCI
523	select GENERIC_CLOCKEVENTS
524	select MIGHT_HAVE_PCI
525	select NEED_MACH_IO_H
526	help
527	  Support for Intel's IXP4XX (XScale) family of processors.
528
529config ARCH_DOVE
530	bool "Marvell Dove"
531	select ARCH_REQUIRE_GPIOLIB
532	select COMMON_CLK_DOVE
533	select CPU_V7
534	select GENERIC_CLOCKEVENTS
535	select MIGHT_HAVE_PCI
536	select PINCTRL
537	select PINCTRL_DOVE
538	select PLAT_ORION_LEGACY
539	select USB_ARCH_HAS_EHCI
540	help
541	  Support for the Marvell Dove SoC 88AP510
542
543config ARCH_KIRKWOOD
544	bool "Marvell Kirkwood"
545	select ARCH_REQUIRE_GPIOLIB
546	select CPU_FEROCEON
547	select GENERIC_CLOCKEVENTS
548	select PCI
549	select PCI_QUIRKS
550	select PINCTRL
551	select PINCTRL_KIRKWOOD
552	select PLAT_ORION_LEGACY
553	help
554	  Support for the following Marvell Kirkwood series SoCs:
555	  88F6180, 88F6192 and 88F6281.
556
557config ARCH_MV78XX0
558	bool "Marvell MV78xx0"
559	select ARCH_REQUIRE_GPIOLIB
560	select CPU_FEROCEON
561	select GENERIC_CLOCKEVENTS
562	select PCI
563	select PLAT_ORION_LEGACY
564	help
565	  Support for the following Marvell MV78xx0 series SoCs:
566	  MV781x0, MV782x0.
567
568config ARCH_ORION5X
569	bool "Marvell Orion"
570	depends on MMU
571	select ARCH_REQUIRE_GPIOLIB
572	select CPU_FEROCEON
573	select GENERIC_CLOCKEVENTS
574	select PCI
575	select PLAT_ORION_LEGACY
576	help
577	  Support for the following Marvell Orion 5x series SoCs:
578	  Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
579	  Orion-2 (5281), Orion-1-90 (6183).
580
581config ARCH_MMP
582	bool "Marvell PXA168/910/MMP2"
583	depends on MMU
584	select ARCH_REQUIRE_GPIOLIB
585	select CLKDEV_LOOKUP
586	select GENERIC_ALLOCATOR
587	select GENERIC_CLOCKEVENTS
588	select GPIO_PXA
589	select IRQ_DOMAIN
590	select NEED_MACH_GPIO_H
591	select PINCTRL
592	select PLAT_PXA
593	select SPARSE_IRQ
594	help
595	  Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
596
597config ARCH_KS8695
598	bool "Micrel/Kendin KS8695"
599	select ARCH_REQUIRE_GPIOLIB
600	select CLKSRC_MMIO
601	select CPU_ARM922T
602	select GENERIC_CLOCKEVENTS
603	select NEED_MACH_MEMORY_H
604	help
605	  Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
606	  System-on-Chip devices.
607
608config ARCH_W90X900
609	bool "Nuvoton W90X900 CPU"
610	select ARCH_REQUIRE_GPIOLIB
611	select CLKDEV_LOOKUP
612	select CLKSRC_MMIO
613	select CPU_ARM926T
614	select GENERIC_CLOCKEVENTS
615	help
616	  Support for Nuvoton (Winbond logic dept.) ARM9 processor,
617	  At present, the w90x900 has been renamed nuc900, regarding
618	  the ARM series product line, you can login the following
619	  link address to know more.
620
621	  <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
622		ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
623
624config ARCH_LPC32XX
625	bool "NXP LPC32XX"
626	select ARCH_REQUIRE_GPIOLIB
627	select ARM_AMBA
628	select CLKDEV_LOOKUP
629	select CLKSRC_MMIO
630	select CPU_ARM926T
631	select GENERIC_CLOCKEVENTS
632	select HAVE_IDE
633	select HAVE_PWM
634	select USB_ARCH_HAS_OHCI
635	select USE_OF
636	help
637	  Support for the NXP LPC32XX family of processors
638
639config ARCH_TEGRA
640	bool "NVIDIA Tegra"
641	select ARCH_HAS_CPUFREQ
642	select CLKDEV_LOOKUP
643	select CLKSRC_MMIO
644	select COMMON_CLK
645	select GENERIC_CLOCKEVENTS
646	select GENERIC_GPIO
647	select HAVE_CLK
648	select HAVE_SMP
649	select MIGHT_HAVE_CACHE_L2X0
650	select SPARSE_IRQ
651	select USE_OF
652	help
653	  This enables support for NVIDIA Tegra based systems (Tegra APX,
654	  Tegra 6xx and Tegra 2 series).
655
656config ARCH_PXA
657	bool "PXA2xx/PXA3xx-based"
658	depends on MMU
659	select ARCH_HAS_CPUFREQ
660	select ARCH_MTD_XIP
661	select ARCH_REQUIRE_GPIOLIB
662	select ARM_CPU_SUSPEND if PM
663	select AUTO_ZRELADDR
664	select CLKDEV_LOOKUP
665	select CLKSRC_MMIO
666	select GENERIC_CLOCKEVENTS
667	select GPIO_PXA
668	select HAVE_IDE
669	select MULTI_IRQ_HANDLER
670	select NEED_MACH_GPIO_H
671	select PLAT_PXA
672	select SPARSE_IRQ
673	help
674	  Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
675
676config ARCH_MSM
677	bool "Qualcomm MSM"
678	select ARCH_REQUIRE_GPIOLIB
679	select CLKDEV_LOOKUP
680	select GENERIC_CLOCKEVENTS
681	select HAVE_CLK
682	help
683	  Support for Qualcomm MSM/QSD based systems.  This runs on the
684	  apps processor of the MSM/QSD and depends on a shared memory
685	  interface to the modem processor which runs the baseband
686	  stack and controls some vital subsystems
687	  (clock and power control, etc).
688
689config ARCH_SHMOBILE
690	bool "Renesas SH-Mobile / R-Mobile"
691	select CLKDEV_LOOKUP
692	select GENERIC_CLOCKEVENTS
693	select HAVE_CLK
694	select HAVE_MACH_CLKDEV
695	select HAVE_SMP
696	select MIGHT_HAVE_CACHE_L2X0
697	select MULTI_IRQ_HANDLER
698	select NEED_MACH_MEMORY_H
699	select NO_IOPORT
700	select PM_GENERIC_DOMAINS if PM
701	select SPARSE_IRQ
702	help
703	  Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
704
705config ARCH_RPC
706	bool "RiscPC"
707	select ARCH_ACORN
708	select ARCH_MAY_HAVE_PC_FDC
709	select ARCH_SPARSEMEM_ENABLE
710	select ARCH_USES_GETTIMEOFFSET
711	select FIQ
712	select HAVE_IDE
713	select HAVE_PATA_PLATFORM
714	select ISA_DMA_API
715	select NEED_MACH_IO_H
716	select NEED_MACH_MEMORY_H
717	select NO_IOPORT
718	help
719	  On the Acorn Risc-PC, Linux can support the internal IDE disk and
720	  CD-ROM interface, serial and parallel port, and the floppy drive.
721
722config ARCH_SA1100
723	bool "SA1100-based"
724	select ARCH_HAS_CPUFREQ
725	select ARCH_MTD_XIP
726	select ARCH_REQUIRE_GPIOLIB
727	select ARCH_SPARSEMEM_ENABLE
728	select CLKDEV_LOOKUP
729	select CLKSRC_MMIO
730	select CPU_FREQ
731	select CPU_SA1100
732	select GENERIC_CLOCKEVENTS
733	select HAVE_IDE
734	select ISA
735	select NEED_MACH_GPIO_H
736	select NEED_MACH_MEMORY_H
737	select SPARSE_IRQ
738	help
739	  Support for StrongARM 11x0 based boards.
740
741config ARCH_S3C24XX
742	bool "Samsung S3C24XX SoCs"
743	select ARCH_HAS_CPUFREQ
744	select ARCH_USES_GETTIMEOFFSET
745	select CLKDEV_LOOKUP
746	select GENERIC_GPIO
747	select HAVE_CLK
748	select HAVE_S3C2410_I2C if I2C
749	select HAVE_S3C2410_WATCHDOG if WATCHDOG
750	select HAVE_S3C_RTC if RTC_CLASS
751	select NEED_MACH_GPIO_H
752	select NEED_MACH_IO_H
753	help
754	  Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
755	  and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
756	  (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
757	  Samsung SMDK2410 development board (and derivatives).
758
759config ARCH_S3C64XX
760	bool "Samsung S3C64XX"
761	select ARCH_HAS_CPUFREQ
762	select ARCH_REQUIRE_GPIOLIB
763	select ARCH_USES_GETTIMEOFFSET
764	select ARM_VIC
765	select CLKDEV_LOOKUP
766	select CPU_V6
767	select HAVE_CLK
768	select HAVE_S3C2410_I2C if I2C
769	select HAVE_S3C2410_WATCHDOG if WATCHDOG
770	select HAVE_TCM
771	select NEED_MACH_GPIO_H
772	select NO_IOPORT
773	select PLAT_SAMSUNG
774	select S3C_DEV_NAND
775	select S3C_GPIO_TRACK
776	select SAMSUNG_CLKSRC
777	select SAMSUNG_GPIOLIB_4BIT
778	select SAMSUNG_IRQ_VIC_TIMER
779	select USB_ARCH_HAS_OHCI
780	help
781	  Samsung S3C64XX series based systems
782
783config ARCH_S5P64X0
784	bool "Samsung S5P6440 S5P6450"
785	select CLKDEV_LOOKUP
786	select CLKSRC_MMIO
787	select CPU_V6
788	select GENERIC_CLOCKEVENTS
789	select GENERIC_GPIO
790	select HAVE_CLK
791	select HAVE_S3C2410_I2C if I2C
792	select HAVE_S3C2410_WATCHDOG if WATCHDOG
793	select HAVE_S3C_RTC if RTC_CLASS
794	select NEED_MACH_GPIO_H
795	help
796	  Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
797	  SMDK6450.
798
799config ARCH_S5PC100
800	bool "Samsung S5PC100"
801	select ARCH_USES_GETTIMEOFFSET
802	select CLKDEV_LOOKUP
803	select CPU_V7
804	select GENERIC_GPIO
805	select HAVE_CLK
806	select HAVE_S3C2410_I2C if I2C
807	select HAVE_S3C2410_WATCHDOG if WATCHDOG
808	select HAVE_S3C_RTC if RTC_CLASS
809	select NEED_MACH_GPIO_H
810	help
811	  Samsung S5PC100 series based systems
812
813config ARCH_S5PV210
814	bool "Samsung S5PV210/S5PC110"
815	select ARCH_HAS_CPUFREQ
816	select ARCH_HAS_HOLES_MEMORYMODEL
817	select ARCH_SPARSEMEM_ENABLE
818	select CLKDEV_LOOKUP
819	select CLKSRC_MMIO
820	select CPU_V7
821	select GENERIC_CLOCKEVENTS
822	select GENERIC_GPIO
823	select HAVE_CLK
824	select HAVE_S3C2410_I2C if I2C
825	select HAVE_S3C2410_WATCHDOG if WATCHDOG
826	select HAVE_S3C_RTC if RTC_CLASS
827	select NEED_MACH_GPIO_H
828	select NEED_MACH_MEMORY_H
829	help
830	  Samsung S5PV210/S5PC110 series based systems
831
832config ARCH_EXYNOS
833	bool "Samsung EXYNOS"
834	select ARCH_HAS_CPUFREQ
835	select ARCH_HAS_HOLES_MEMORYMODEL
836	select ARCH_SPARSEMEM_ENABLE
837	select CLKDEV_LOOKUP
838	select CPU_V7
839	select GENERIC_CLOCKEVENTS
840	select GENERIC_GPIO
841	select HAVE_CLK
842	select HAVE_S3C2410_I2C if I2C
843	select HAVE_S3C2410_WATCHDOG if WATCHDOG
844	select HAVE_S3C_RTC if RTC_CLASS
845	select NEED_MACH_GPIO_H
846	select NEED_MACH_MEMORY_H
847	help
848	  Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
849
850config ARCH_SHARK
851	bool "Shark"
852	select ARCH_USES_GETTIMEOFFSET
853	select CPU_SA110
854	select ISA
855	select ISA_DMA
856	select NEED_MACH_MEMORY_H
857	select PCI
858	select ZONE_DMA
859	help
860	  Support for the StrongARM based Digital DNARD machine, also known
861	  as "Shark" (<http://www.shark-linux.de/shark.html>).
862
863config ARCH_U300
864	bool "ST-Ericsson U300 Series"
865	depends on MMU
866	select ARCH_REQUIRE_GPIOLIB
867	select ARM_AMBA
868	select ARM_PATCH_PHYS_VIRT
869	select ARM_VIC
870	select CLKDEV_LOOKUP
871	select CLKSRC_MMIO
872	select COMMON_CLK
873	select CPU_ARM926T
874	select GENERIC_CLOCKEVENTS
875	select GENERIC_GPIO
876	select HAVE_TCM
877	select SPARSE_IRQ
878	help
879	  Support for ST-Ericsson U300 series mobile platforms.
880
881config ARCH_U8500
882	bool "ST-Ericsson U8500 Series"
883	depends on MMU
884	select ARCH_HAS_CPUFREQ
885	select ARCH_REQUIRE_GPIOLIB
886	select ARM_AMBA
887	select CLKDEV_LOOKUP
888	select CPU_V7
889	select GENERIC_CLOCKEVENTS
890	select HAVE_SMP
891	select MIGHT_HAVE_CACHE_L2X0
892	select SPARSE_IRQ
893	help
894	  Support for ST-Ericsson's Ux500 architecture
895
896config ARCH_NOMADIK
897	bool "STMicroelectronics Nomadik"
898	select ARCH_REQUIRE_GPIOLIB
899	select ARM_AMBA
900	select ARM_VIC
901	select COMMON_CLK
902	select CPU_ARM926T
903	select GENERIC_CLOCKEVENTS
904	select MIGHT_HAVE_CACHE_L2X0
905	select PINCTRL
906	select PINCTRL_STN8815
907	select SPARSE_IRQ
908	help
909	  Support for the Nomadik platform by ST-Ericsson
910
911config PLAT_SPEAR
912	bool "ST SPEAr"
913	select ARCH_HAS_CPUFREQ
914	select ARCH_REQUIRE_GPIOLIB
915	select ARM_AMBA
916	select CLKDEV_LOOKUP
917	select CLKSRC_MMIO
918	select COMMON_CLK
919	select GENERIC_CLOCKEVENTS
920	select HAVE_CLK
921	help
922	  Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
923
924config ARCH_DAVINCI
925	bool "TI DaVinci"
926	select ARCH_HAS_HOLES_MEMORYMODEL
927	select ARCH_REQUIRE_GPIOLIB
928	select CLKDEV_LOOKUP
929	select GENERIC_ALLOCATOR
930	select GENERIC_CLOCKEVENTS
931	select GENERIC_IRQ_CHIP
932	select HAVE_IDE
933	select NEED_MACH_GPIO_H
934	select USE_OF
935	select ZONE_DMA
936	help
937	  Support for TI's DaVinci platform.
938
939config ARCH_OMAP
940	bool "TI OMAP"
941	depends on MMU
942	select ARCH_HAS_CPUFREQ
943	select ARCH_HAS_HOLES_MEMORYMODEL
944	select ARCH_REQUIRE_GPIOLIB
945	select CLKSRC_MMIO
946	select GENERIC_CLOCKEVENTS
947	select HAVE_CLK
948	help
949	  Support for TI's OMAP platform (OMAP1/2/3/4).
950
951config ARCH_VT8500_SINGLE
952	bool "VIA/WonderMedia 85xx"
953	select ARCH_HAS_CPUFREQ
954	select ARCH_REQUIRE_GPIOLIB
955	select CLKDEV_LOOKUP
956	select COMMON_CLK
957	select CPU_ARM926T
958	select GENERIC_CLOCKEVENTS
959	select GENERIC_GPIO
960	select HAVE_CLK
961	select MULTI_IRQ_HANDLER
962	select SPARSE_IRQ
963	select USE_OF
964	help
965	  Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
966
967endchoice
968
969menu "Multiple platform selection"
970	depends on ARCH_MULTIPLATFORM
971
972comment "CPU Core family selection"
973
974config ARCH_MULTI_V4
975	bool "ARMv4 based platforms (FA526, StrongARM)"
976	depends on !ARCH_MULTI_V6_V7
977	select ARCH_MULTI_V4_V5
978
979config ARCH_MULTI_V4T
980	bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
981	depends on !ARCH_MULTI_V6_V7
982	select ARCH_MULTI_V4_V5
983
984config ARCH_MULTI_V5
985	bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
986	depends on !ARCH_MULTI_V6_V7
987	select ARCH_MULTI_V4_V5
988
989config ARCH_MULTI_V4_V5
990	bool
991
992config ARCH_MULTI_V6
993	bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
994	select ARCH_MULTI_V6_V7
995	select CPU_V6
996
997config ARCH_MULTI_V7
998	bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
999	default y
1000	select ARCH_MULTI_V6_V7
1001	select ARCH_VEXPRESS
1002	select CPU_V7
1003
1004config ARCH_MULTI_V6_V7
1005	bool
1006
1007config ARCH_MULTI_CPU_AUTO
1008	def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
1009	select ARCH_MULTI_V5
1010
1011endmenu
1012
1013#
1014# This is sorted alphabetically by mach-* pathname.  However, plat-*
1015# Kconfigs may be included either alphabetically (according to the
1016# plat- suffix) or along side the corresponding mach-* source.
1017#
1018source "arch/arm/mach-mvebu/Kconfig"
1019
1020source "arch/arm/mach-at91/Kconfig"
1021
1022source "arch/arm/mach-bcm/Kconfig"
1023
1024source "arch/arm/mach-clps711x/Kconfig"
1025
1026source "arch/arm/mach-cns3xxx/Kconfig"
1027
1028source "arch/arm/mach-davinci/Kconfig"
1029
1030source "arch/arm/mach-dove/Kconfig"
1031
1032source "arch/arm/mach-ep93xx/Kconfig"
1033
1034source "arch/arm/mach-footbridge/Kconfig"
1035
1036source "arch/arm/mach-gemini/Kconfig"
1037
1038source "arch/arm/mach-h720x/Kconfig"
1039
1040source "arch/arm/mach-highbank/Kconfig"
1041
1042source "arch/arm/mach-integrator/Kconfig"
1043
1044source "arch/arm/mach-iop32x/Kconfig"
1045
1046source "arch/arm/mach-iop33x/Kconfig"
1047
1048source "arch/arm/mach-iop13xx/Kconfig"
1049
1050source "arch/arm/mach-ixp4xx/Kconfig"
1051
1052source "arch/arm/mach-kirkwood/Kconfig"
1053
1054source "arch/arm/mach-ks8695/Kconfig"
1055
1056source "arch/arm/mach-msm/Kconfig"
1057
1058source "arch/arm/mach-mv78xx0/Kconfig"
1059
1060source "arch/arm/mach-imx/Kconfig"
1061
1062source "arch/arm/mach-mxs/Kconfig"
1063
1064source "arch/arm/mach-netx/Kconfig"
1065
1066source "arch/arm/mach-nomadik/Kconfig"
1067
1068source "arch/arm/plat-omap/Kconfig"
1069
1070source "arch/arm/mach-omap1/Kconfig"
1071
1072source "arch/arm/mach-omap2/Kconfig"
1073
1074source "arch/arm/mach-orion5x/Kconfig"
1075
1076source "arch/arm/mach-picoxcell/Kconfig"
1077
1078source "arch/arm/mach-pxa/Kconfig"
1079source "arch/arm/plat-pxa/Kconfig"
1080
1081source "arch/arm/mach-mmp/Kconfig"
1082
1083source "arch/arm/mach-realview/Kconfig"
1084
1085source "arch/arm/mach-sa1100/Kconfig"
1086
1087source "arch/arm/plat-samsung/Kconfig"
1088source "arch/arm/plat-s3c24xx/Kconfig"
1089
1090source "arch/arm/mach-socfpga/Kconfig"
1091
1092source "arch/arm/plat-spear/Kconfig"
1093
1094source "arch/arm/mach-s3c24xx/Kconfig"
1095if ARCH_S3C24XX
1096source "arch/arm/mach-s3c2412/Kconfig"
1097source "arch/arm/mach-s3c2440/Kconfig"
1098endif
1099
1100if ARCH_S3C64XX
1101source "arch/arm/mach-s3c64xx/Kconfig"
1102endif
1103
1104source "arch/arm/mach-s5p64x0/Kconfig"
1105
1106source "arch/arm/mach-s5pc100/Kconfig"
1107
1108source "arch/arm/mach-s5pv210/Kconfig"
1109
1110source "arch/arm/mach-exynos/Kconfig"
1111
1112source "arch/arm/mach-shmobile/Kconfig"
1113
1114source "arch/arm/mach-sunxi/Kconfig"
1115
1116source "arch/arm/mach-prima2/Kconfig"
1117
1118source "arch/arm/mach-tegra/Kconfig"
1119
1120source "arch/arm/mach-u300/Kconfig"
1121
1122source "arch/arm/mach-ux500/Kconfig"
1123
1124source "arch/arm/mach-versatile/Kconfig"
1125
1126source "arch/arm/mach-vexpress/Kconfig"
1127source "arch/arm/plat-versatile/Kconfig"
1128
1129source "arch/arm/mach-vt8500/Kconfig"
1130
1131source "arch/arm/mach-w90x900/Kconfig"
1132
1133source "arch/arm/mach-zynq/Kconfig"
1134
1135# Definitions to make life easier
1136config ARCH_ACORN
1137	bool
1138
1139config PLAT_IOP
1140	bool
1141	select GENERIC_CLOCKEVENTS
1142
1143config PLAT_ORION
1144	bool
1145	select CLKSRC_MMIO
1146	select COMMON_CLK
1147	select GENERIC_IRQ_CHIP
1148	select IRQ_DOMAIN
1149
1150config PLAT_ORION_LEGACY
1151	bool
1152	select PLAT_ORION
1153
1154config PLAT_PXA
1155	bool
1156
1157config PLAT_VERSATILE
1158	bool
1159
1160config ARM_TIMER_SP804
1161	bool
1162	select CLKSRC_MMIO
1163	select HAVE_SCHED_CLOCK
1164
1165source arch/arm/mm/Kconfig
1166
1167config ARM_NR_BANKS
1168	int
1169	default 16 if ARCH_EP93XX
1170	default 8
1171
1172config IWMMXT
1173	bool "Enable iWMMXt support"
1174	depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1175	default y if PXA27x || PXA3xx || ARCH_MMP
1176	help
1177	  Enable support for iWMMXt context switching at run time if
1178	  running on a CPU that supports it.
1179
1180config XSCALE_PMU
1181	bool
1182	depends on CPU_XSCALE
1183	default y
1184
1185config MULTI_IRQ_HANDLER
1186	bool
1187	help
1188	  Allow each machine to specify it's own IRQ handler at run time.
1189
1190if !MMU
1191source "arch/arm/Kconfig-nommu"
1192endif
1193
1194config ARM_ERRATA_326103
1195	bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
1196	depends on CPU_V6
1197	help
1198	  Executing a SWP instruction to read-only memory does not set bit 11
1199	  of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
1200	  treat the access as a read, preventing a COW from occurring and
1201	  causing the faulting task to livelock.
1202
1203config ARM_ERRATA_411920
1204	bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1205	depends on CPU_V6 || CPU_V6K
1206	help
1207	  Invalidation of the Instruction Cache operation can
1208	  fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1209	  It does not affect the MPCore. This option enables the ARM Ltd.
1210	  recommended workaround.
1211
1212config ARM_ERRATA_430973
1213	bool "ARM errata: Stale prediction on replaced interworking branch"
1214	depends on CPU_V7
1215	help
1216	  This option enables the workaround for the 430973 Cortex-A8
1217	  (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1218	  interworking branch is replaced with another code sequence at the
1219	  same virtual address, whether due to self-modifying code or virtual
1220	  to physical address re-mapping, Cortex-A8 does not recover from the
1221	  stale interworking branch prediction. This results in Cortex-A8
1222	  executing the new code sequence in the incorrect ARM or Thumb state.
1223	  The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1224	  and also flushes the branch target cache at every context switch.
1225	  Note that setting specific bits in the ACTLR register may not be
1226	  available in non-secure mode.
1227
1228config ARM_ERRATA_458693
1229	bool "ARM errata: Processor deadlock when a false hazard is created"
1230	depends on CPU_V7
1231	depends on !ARCH_MULTIPLATFORM
1232	help
1233	  This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1234	  erratum. For very specific sequences of memory operations, it is
1235	  possible for a hazard condition intended for a cache line to instead
1236	  be incorrectly associated with a different cache line. This false
1237	  hazard might then cause a processor deadlock. The workaround enables
1238	  the L1 caching of the NEON accesses and disables the PLD instruction
1239	  in the ACTLR register. Note that setting specific bits in the ACTLR
1240	  register may not be available in non-secure mode.
1241
1242config ARM_ERRATA_460075
1243	bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1244	depends on CPU_V7
1245	depends on !ARCH_MULTIPLATFORM
1246	help
1247	  This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1248	  erratum. Any asynchronous access to the L2 cache may encounter a
1249	  situation in which recent store transactions to the L2 cache are lost
1250	  and overwritten with stale memory contents from external memory. The
1251	  workaround disables the write-allocate mode for the L2 cache via the
1252	  ACTLR register. Note that setting specific bits in the ACTLR register
1253	  may not be available in non-secure mode.
1254
1255config ARM_ERRATA_742230
1256	bool "ARM errata: DMB operation may be faulty"
1257	depends on CPU_V7 && SMP
1258	depends on !ARCH_MULTIPLATFORM
1259	help
1260	  This option enables the workaround for the 742230 Cortex-A9
1261	  (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1262	  between two write operations may not ensure the correct visibility
1263	  ordering of the two writes. This workaround sets a specific bit in
1264	  the diagnostic register of the Cortex-A9 which causes the DMB
1265	  instruction to behave as a DSB, ensuring the correct behaviour of
1266	  the two writes.
1267
1268config ARM_ERRATA_742231
1269	bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1270	depends on CPU_V7 && SMP
1271	depends on !ARCH_MULTIPLATFORM
1272	help
1273	  This option enables the workaround for the 742231 Cortex-A9
1274	  (r2p0..r2p2) erratum. Under certain conditions, specific to the
1275	  Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1276	  accessing some data located in the same cache line, may get corrupted
1277	  data due to bad handling of the address hazard when the line gets
1278	  replaced from one of the CPUs at the same time as another CPU is
1279	  accessing it. This workaround sets specific bits in the diagnostic
1280	  register of the Cortex-A9 which reduces the linefill issuing
1281	  capabilities of the processor.
1282
1283config PL310_ERRATA_588369
1284	bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
1285	depends on CACHE_L2X0
1286	help
1287	   The PL310 L2 cache controller implements three types of Clean &
1288	   Invalidate maintenance operations: by Physical Address
1289	   (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1290	   They are architecturally defined to behave as the execution of a
1291	   clean operation followed immediately by an invalidate operation,
1292	   both performing to the same memory location. This functionality
1293	   is not correctly implemented in PL310 as clean lines are not
1294	   invalidated as a result of these operations.
1295
1296config ARM_ERRATA_720789
1297	bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1298	depends on CPU_V7
1299	help
1300	  This option enables the workaround for the 720789 Cortex-A9 (prior to
1301	  r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1302	  broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1303	  As a consequence of this erratum, some TLB entries which should be
1304	  invalidated are not, resulting in an incoherency in the system page
1305	  tables. The workaround changes the TLB flushing routines to invalidate
1306	  entries regardless of the ASID.
1307
1308config PL310_ERRATA_727915
1309	bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
1310	depends on CACHE_L2X0
1311	help
1312	  PL310 implements the Clean & Invalidate by Way L2 cache maintenance
1313	  operation (offset 0x7FC). This operation runs in background so that
1314	  PL310 can handle normal accesses while it is in progress. Under very
1315	  rare circumstances, due to this erratum, write data can be lost when
1316	  PL310 treats a cacheable write transaction during a Clean &
1317	  Invalidate by Way operation.
1318
1319config ARM_ERRATA_743622
1320	bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1321	depends on CPU_V7
1322	depends on !ARCH_MULTIPLATFORM
1323	help
1324	  This option enables the workaround for the 743622 Cortex-A9
1325	  (r2p*) erratum. Under very rare conditions, a faulty
1326	  optimisation in the Cortex-A9 Store Buffer may lead to data
1327	  corruption. This workaround sets a specific bit in the diagnostic
1328	  register of the Cortex-A9 which disables the Store Buffer
1329	  optimisation, preventing the defect from occurring. This has no
1330	  visible impact on the overall performance or power consumption of the
1331	  processor.
1332
1333config ARM_ERRATA_751472
1334	bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
1335	depends on CPU_V7
1336	depends on !ARCH_MULTIPLATFORM
1337	help
1338	  This option enables the workaround for the 751472 Cortex-A9 (prior
1339	  to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1340	  completion of a following broadcasted operation if the second
1341	  operation is received by a CPU before the ICIALLUIS has completed,
1342	  potentially leading to corrupted entries in the cache or TLB.
1343
1344config PL310_ERRATA_753970
1345	bool "PL310 errata: cache sync operation may be faulty"
1346	depends on CACHE_PL310
1347	help
1348	  This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1349
1350	  Under some condition the effect of cache sync operation on
1351	  the store buffer still remains when the operation completes.
1352	  This means that the store buffer is always asked to drain and
1353	  this prevents it from merging any further writes. The workaround
1354	  is to replace the normal offset of cache sync operation (0x730)
1355	  by another offset targeting an unmapped PL310 register 0x740.
1356	  This has the same effect as the cache sync operation: store buffer
1357	  drain and waiting for all buffers empty.
1358
1359config ARM_ERRATA_754322
1360	bool "ARM errata: possible faulty MMU translations following an ASID switch"
1361	depends on CPU_V7
1362	help
1363	  This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1364	  r3p*) erratum. A speculative memory access may cause a page table walk
1365	  which starts prior to an ASID switch but completes afterwards. This
1366	  can populate the micro-TLB with a stale entry which may be hit with
1367	  the new ASID. This workaround places two dsb instructions in the mm
1368	  switching code so that no page table walks can cross the ASID switch.
1369
1370config ARM_ERRATA_754327
1371	bool "ARM errata: no automatic Store Buffer drain"
1372	depends on CPU_V7 && SMP
1373	help
1374	  This option enables the workaround for the 754327 Cortex-A9 (prior to
1375	  r2p0) erratum. The Store Buffer does not have any automatic draining
1376	  mechanism and therefore a livelock may occur if an external agent
1377	  continuously polls a memory location waiting to observe an update.
1378	  This workaround defines cpu_relax() as smp_mb(), preventing correctly
1379	  written polling loops from denying visibility of updates to memory.
1380
1381config ARM_ERRATA_364296
1382	bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1383	depends on CPU_V6 && !SMP
1384	help
1385	  This options enables the workaround for the 364296 ARM1136
1386	  r0p2 erratum (possible cache data corruption with
1387	  hit-under-miss enabled). It sets the undocumented bit 31 in
1388	  the auxiliary control register and the FI bit in the control
1389	  register, thus disabling hit-under-miss without putting the
1390	  processor into full low interrupt latency mode. ARM11MPCore
1391	  is not affected.
1392
1393config ARM_ERRATA_764369
1394	bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1395	depends on CPU_V7 && SMP
1396	help
1397	  This option enables the workaround for erratum 764369
1398	  affecting Cortex-A9 MPCore with two or more processors (all
1399	  current revisions). Under certain timing circumstances, a data
1400	  cache line maintenance operation by MVA targeting an Inner
1401	  Shareable memory region may fail to proceed up to either the
1402	  Point of Coherency or to the Point of Unification of the
1403	  system. This workaround adds a DSB instruction before the
1404	  relevant cache maintenance functions and sets a specific bit
1405	  in the diagnostic control register of the SCU.
1406
1407config PL310_ERRATA_769419
1408	bool "PL310 errata: no automatic Store Buffer drain"
1409	depends on CACHE_L2X0
1410	help
1411	  On revisions of the PL310 prior to r3p2, the Store Buffer does
1412	  not automatically drain. This can cause normal, non-cacheable
1413	  writes to be retained when the memory system is idle, leading
1414	  to suboptimal I/O performance for drivers using coherent DMA.
1415	  This option adds a write barrier to the cpu_idle loop so that,
1416	  on systems with an outer cache, the store buffer is drained
1417	  explicitly.
1418
1419config ARM_ERRATA_775420
1420       bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1421       depends on CPU_V7
1422       help
1423	 This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1424	 r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1425	 operation aborts with MMU exception, it might cause the processor
1426	 to deadlock. This workaround puts DSB before executing ISB if
1427	 an abort may occur on cache maintenance.
1428
1429endmenu
1430
1431source "arch/arm/common/Kconfig"
1432
1433menu "Bus support"
1434
1435config ARM_AMBA
1436	bool
1437
1438config ISA
1439	bool
1440	help
1441	  Find out whether you have ISA slots on your motherboard.  ISA is the
1442	  name of a bus system, i.e. the way the CPU talks to the other stuff
1443	  inside your box.  Other bus systems are PCI, EISA, MicroChannel
1444	  (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
1445	  newer boards don't support it.  If you have ISA, say Y, otherwise N.
1446
1447# Select ISA DMA controller support
1448config ISA_DMA
1449	bool
1450	select ISA_DMA_API
1451
1452# Select ISA DMA interface
1453config ISA_DMA_API
1454	bool
1455
1456config PCI
1457	bool "PCI support" if MIGHT_HAVE_PCI
1458	help
1459	  Find out whether you have a PCI motherboard. PCI is the name of a
1460	  bus system, i.e. the way the CPU talks to the other stuff inside
1461	  your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1462	  VESA. If you have PCI, say Y, otherwise N.
1463
1464config PCI_DOMAINS
1465	bool
1466	depends on PCI
1467
1468config PCI_NANOENGINE
1469	bool "BSE nanoEngine PCI support"
1470	depends on SA1100_NANOENGINE
1471	help
1472	  Enable PCI on the BSE nanoEngine board.
1473
1474config PCI_SYSCALL
1475	def_bool PCI
1476
1477# Select the host bridge type
1478config PCI_HOST_VIA82C505
1479	bool
1480	depends on PCI && ARCH_SHARK
1481	default y
1482
1483config PCI_HOST_ITE8152
1484	bool
1485	depends on PCI && MACH_ARMCORE
1486	default y
1487	select DMABOUNCE
1488
1489source "drivers/pci/Kconfig"
1490
1491source "drivers/pcmcia/Kconfig"
1492
1493endmenu
1494
1495menu "Kernel Features"
1496
1497config HAVE_SMP
1498	bool
1499	help
1500	  This option should be selected by machines which have an SMP-
1501	  capable CPU.
1502
1503	  The only effect of this option is to make the SMP-related
1504	  options available to the user for configuration.
1505
1506config SMP
1507	bool "Symmetric Multi-Processing"
1508	depends on CPU_V6K || CPU_V7
1509	depends on GENERIC_CLOCKEVENTS
1510	depends on HAVE_SMP
1511	depends on MMU
1512	select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1513	select USE_GENERIC_SMP_HELPERS
1514	help
1515	  This enables support for systems with more than one CPU. If you have
1516	  a system with only one CPU, like most personal computers, say N. If
1517	  you have a system with more than one CPU, say Y.
1518
1519	  If you say N here, the kernel will run on single and multiprocessor
1520	  machines, but will use only one CPU of a multiprocessor machine. If
1521	  you say Y here, the kernel will run on many, but not all, single
1522	  processor machines. On a single processor machine, the kernel will
1523	  run faster if you say N here.
1524
1525	  See also <file:Documentation/x86/i386/IO-APIC.txt>,
1526	  <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1527	  <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1528
1529	  If you don't know what to do here, say N.
1530
1531config SMP_ON_UP
1532	bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1533	depends on EXPERIMENTAL
1534	depends on SMP && !XIP_KERNEL
1535	default y
1536	help
1537	  SMP kernels contain instructions which fail on non-SMP processors.
1538	  Enabling this option allows the kernel to modify itself to make
1539	  these instructions safe.  Disabling it allows about 1K of space
1540	  savings.
1541
1542	  If you don't know what to do here, say Y.
1543
1544config ARM_CPU_TOPOLOGY
1545	bool "Support cpu topology definition"
1546	depends on SMP && CPU_V7
1547	default y
1548	help
1549	  Support ARM cpu topology definition. The MPIDR register defines
1550	  affinity between processors which is then used to describe the cpu
1551	  topology of an ARM System.
1552
1553config SCHED_MC
1554	bool "Multi-core scheduler support"
1555	depends on ARM_CPU_TOPOLOGY
1556	help
1557	  Multi-core scheduler support improves the CPU scheduler's decision
1558	  making when dealing with multi-core CPU chips at a cost of slightly
1559	  increased overhead in some places. If unsure say N here.
1560
1561config SCHED_SMT
1562	bool "SMT scheduler support"
1563	depends on ARM_CPU_TOPOLOGY
1564	help
1565	  Improves the CPU scheduler's decision making when dealing with
1566	  MultiThreading at a cost of slightly increased overhead in some
1567	  places. If unsure say N here.
1568
1569config HAVE_ARM_SCU
1570	bool
1571	help
1572	  This option enables support for the ARM system coherency unit
1573
1574config ARM_ARCH_TIMER
1575	bool "Architected timer support"
1576	depends on CPU_V7
1577	help
1578	  This option enables support for the ARM architected timer
1579
1580config HAVE_ARM_TWD
1581	bool
1582	depends on SMP
1583	help
1584	  This options enables support for the ARM timer and watchdog unit
1585
1586choice
1587	prompt "Memory split"
1588	default VMSPLIT_3G
1589	help
1590	  Select the desired split between kernel and user memory.
1591
1592	  If you are not absolutely sure what you are doing, leave this
1593	  option alone!
1594
1595	config VMSPLIT_3G
1596		bool "3G/1G user/kernel split"
1597	config VMSPLIT_2G
1598		bool "2G/2G user/kernel split"
1599	config VMSPLIT_1G
1600		bool "1G/3G user/kernel split"
1601endchoice
1602
1603config PAGE_OFFSET
1604	hex
1605	default 0x40000000 if VMSPLIT_1G
1606	default 0x80000000 if VMSPLIT_2G
1607	default 0xC0000000
1608
1609config NR_CPUS
1610	int "Maximum number of CPUs (2-32)"
1611	range 2 32
1612	depends on SMP
1613	default "4"
1614
1615config HOTPLUG_CPU
1616	bool "Support for hot-pluggable CPUs"
1617	depends on SMP && HOTPLUG
1618	help
1619	  Say Y here to experiment with turning CPUs off and on.  CPUs
1620	  can be controlled through /sys/devices/system/cpu.
1621
1622config ARM_PSCI
1623	bool "Support for the ARM Power State Coordination Interface (PSCI)"
1624	depends on CPU_V7
1625	help
1626	  Say Y here if you want Linux to communicate with system firmware
1627	  implementing the PSCI specification for CPU-centric power
1628	  management operations described in ARM document number ARM DEN
1629	  0022A ("Power State Coordination Interface System Software on
1630	  ARM processors").
1631
1632config LOCAL_TIMERS
1633	bool "Use local timer interrupts"
1634	depends on SMP
1635	default y
1636	select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
1637	help
1638	  Enable support for local timers on SMP platforms, rather then the
1639	  legacy IPI broadcast method.  Local timers allows the system
1640	  accounting to be spread across the timer interval, preventing a
1641	  "thundering herd" at every timer tick.
1642
1643config ARCH_NR_GPIO
1644	int
1645	default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1646	default 355 if ARCH_U8500
1647	default 264 if MACH_H4700
1648	default 512 if SOC_OMAP5
1649	default 288 if ARCH_VT8500 || ARCH_SUNXI
1650	default 0
1651	help
1652	  Maximum number of GPIOs in the system.
1653
1654	  If unsure, leave the default value.
1655
1656source kernel/Kconfig.preempt
1657
1658config HZ
1659	int
1660	default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
1661		ARCH_S5PV210 || ARCH_EXYNOS4
1662	default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1663	default AT91_TIMER_HZ if ARCH_AT91
1664	default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1665	default 100
1666
1667config SCHED_HRTICK
1668	def_bool HIGH_RES_TIMERS
1669
1670config THUMB2_KERNEL
1671	bool "Compile the kernel in Thumb-2 mode"
1672	depends on CPU_V7 && !CPU_V6 && !CPU_V6K
1673	select AEABI
1674	select ARM_ASM_UNIFIED
1675	select ARM_UNWIND
1676	help
1677	  By enabling this option, the kernel will be compiled in
1678	  Thumb-2 mode. A compiler/assembler that understand the unified
1679	  ARM-Thumb syntax is needed.
1680
1681	  If unsure, say N.
1682
1683config THUMB2_AVOID_R_ARM_THM_JUMP11
1684	bool "Work around buggy Thumb-2 short branch relocations in gas"
1685	depends on THUMB2_KERNEL && MODULES
1686	default y
1687	help
1688	  Various binutils versions can resolve Thumb-2 branches to
1689	  locally-defined, preemptible global symbols as short-range "b.n"
1690	  branch instructions.
1691
1692	  This is a problem, because there's no guarantee the final
1693	  destination of the symbol, or any candidate locations for a
1694	  trampoline, are within range of the branch.  For this reason, the
1695	  kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1696	  relocation in modules at all, and it makes little sense to add
1697	  support.
1698
1699	  The symptom is that the kernel fails with an "unsupported
1700	  relocation" error when loading some modules.
1701
1702	  Until fixed tools are available, passing
1703	  -fno-optimize-sibling-calls to gcc should prevent gcc generating
1704	  code which hits this problem, at the cost of a bit of extra runtime
1705	  stack usage in some cases.
1706
1707	  The problem is described in more detail at:
1708	      https://bugs.launchpad.net/binutils-linaro/+bug/725126
1709
1710	  Only Thumb-2 kernels are affected.
1711
1712	  Unless you are sure your tools don't have this problem, say Y.
1713
1714config ARM_ASM_UNIFIED
1715	bool
1716
1717config AEABI
1718	bool "Use the ARM EABI to compile the kernel"
1719	help
1720	  This option allows for the kernel to be compiled using the latest
1721	  ARM ABI (aka EABI).  This is only useful if you are using a user
1722	  space environment that is also compiled with EABI.
1723
1724	  Since there are major incompatibilities between the legacy ABI and
1725	  EABI, especially with regard to structure member alignment, this
1726	  option also changes the kernel syscall calling convention to
1727	  disambiguate both ABIs and allow for backward compatibility support
1728	  (selected with CONFIG_OABI_COMPAT).
1729
1730	  To use this you need GCC version 4.0.0 or later.
1731
1732config OABI_COMPAT
1733	bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1734	depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1735	default y
1736	help
1737	  This option preserves the old syscall interface along with the
1738	  new (ARM EABI) one. It also provides a compatibility layer to
1739	  intercept syscalls that have structure arguments which layout
1740	  in memory differs between the legacy ABI and the new ARM EABI
1741	  (only for non "thumb" binaries). This option adds a tiny
1742	  overhead to all syscalls and produces a slightly larger kernel.
1743	  If you know you'll be using only pure EABI user space then you
1744	  can say N here. If this option is not selected and you attempt
1745	  to execute a legacy ABI binary then the result will be
1746	  UNPREDICTABLE (in fact it can be predicted that it won't work
1747	  at all). If in doubt say Y.
1748
1749config ARCH_HAS_HOLES_MEMORYMODEL
1750	bool
1751
1752config ARCH_SPARSEMEM_ENABLE
1753	bool
1754
1755config ARCH_SPARSEMEM_DEFAULT
1756	def_bool ARCH_SPARSEMEM_ENABLE
1757
1758config ARCH_SELECT_MEMORY_MODEL
1759	def_bool ARCH_SPARSEMEM_ENABLE
1760
1761config HAVE_ARCH_PFN_VALID
1762	def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1763
1764config HIGHMEM
1765	bool "High Memory Support"
1766	depends on MMU
1767	help
1768	  The address space of ARM processors is only 4 Gigabytes large
1769	  and it has to accommodate user address space, kernel address
1770	  space as well as some memory mapped IO. That means that, if you
1771	  have a large amount of physical memory and/or IO, not all of the
1772	  memory can be "permanently mapped" by the kernel. The physical
1773	  memory that is not permanently mapped is called "high memory".
1774
1775	  Depending on the selected kernel/user memory split, minimum
1776	  vmalloc space and actual amount of RAM, you may not need this
1777	  option which should result in a slightly faster kernel.
1778
1779	  If unsure, say n.
1780
1781config HIGHPTE
1782	bool "Allocate 2nd-level pagetables from highmem"
1783	depends on HIGHMEM
1784
1785config HW_PERF_EVENTS
1786	bool "Enable hardware performance counter support for perf events"
1787	depends on PERF_EVENTS
1788	default y
1789	help
1790	  Enable hardware performance counter support for perf events. If
1791	  disabled, perf events will use software events only.
1792
1793source "mm/Kconfig"
1794
1795config FORCE_MAX_ZONEORDER
1796	int "Maximum zone order" if ARCH_SHMOBILE
1797	range 11 64 if ARCH_SHMOBILE
1798	default "12" if SOC_AM33XX
1799	default "9" if SA1111
1800	default "11"
1801	help
1802	  The kernel memory allocator divides physically contiguous memory
1803	  blocks into "zones", where each zone is a power of two number of
1804	  pages.  This option selects the largest power of two that the kernel
1805	  keeps in the memory allocator.  If you need to allocate very large
1806	  blocks of physically contiguous memory, then you may need to
1807	  increase this value.
1808
1809	  This config option is actually maximum order plus one. For example,
1810	  a value of 11 means that the largest free memory block is 2^10 pages.
1811
1812config ALIGNMENT_TRAP
1813	bool
1814	depends on CPU_CP15_MMU
1815	default y if !ARCH_EBSA110
1816	select HAVE_PROC_CPU if PROC_FS
1817	help
1818	  ARM processors cannot fetch/store information which is not
1819	  naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1820	  address divisible by 4. On 32-bit ARM processors, these non-aligned
1821	  fetch/store instructions will be emulated in software if you say
1822	  here, which has a severe performance impact. This is necessary for
1823	  correct operation of some network protocols. With an IP-only
1824	  configuration it is safe to say N, otherwise say Y.
1825
1826config UACCESS_WITH_MEMCPY
1827	bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1828	depends on MMU
1829	default y if CPU_FEROCEON
1830	help
1831	  Implement faster copy_to_user and clear_user methods for CPU
1832	  cores where a 8-word STM instruction give significantly higher
1833	  memory write throughput than a sequence of individual 32bit stores.
1834
1835	  A possible side effect is a slight increase in scheduling latency
1836	  between threads sharing the same address space if they invoke
1837	  such copy operations with large buffers.
1838
1839	  However, if the CPU data cache is using a write-allocate mode,
1840	  this option is unlikely to provide any performance gain.
1841
1842config SECCOMP
1843	bool
1844	prompt "Enable seccomp to safely compute untrusted bytecode"
1845	---help---
1846	  This kernel feature is useful for number crunching applications
1847	  that may need to compute untrusted bytecode during their
1848	  execution. By using pipes or other transports made available to
1849	  the process as file descriptors supporting the read/write
1850	  syscalls, it's possible to isolate those applications in
1851	  their own address space using seccomp. Once seccomp is
1852	  enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1853	  and the task is only allowed to execute a few safe syscalls
1854	  defined by each seccomp mode.
1855
1856config CC_STACKPROTECTOR
1857	bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1858	depends on EXPERIMENTAL
1859	help
1860	  This option turns on the -fstack-protector GCC feature. This
1861	  feature puts, at the beginning of functions, a canary value on
1862	  the stack just before the return address, and validates
1863	  the value just before actually returning.  Stack based buffer
1864	  overflows (that need to overwrite this return address) now also
1865	  overwrite the canary, which gets detected and the attack is then
1866	  neutralized via a kernel panic.
1867	  This feature requires gcc version 4.2 or above.
1868
1869config XEN_DOM0
1870	def_bool y
1871	depends on XEN
1872
1873config XEN
1874	bool "Xen guest support on ARM (EXPERIMENTAL)"
1875	depends on EXPERIMENTAL && ARM && OF
1876	depends on CPU_V7 && !CPU_V6
1877	help
1878	  Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1879
1880endmenu
1881
1882menu "Boot options"
1883
1884config USE_OF
1885	bool "Flattened Device Tree support"
1886	select IRQ_DOMAIN
1887	select OF
1888	select OF_EARLY_FLATTREE
1889	help
1890	  Include support for flattened device tree machine descriptions.
1891
1892config ATAGS
1893	bool "Support for the traditional ATAGS boot data passing" if USE_OF
1894	default y
1895	help
1896	  This is the traditional way of passing data to the kernel at boot
1897	  time. If you are solely relying on the flattened device tree (or
1898	  the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1899	  to remove ATAGS support from your kernel binary.  If unsure,
1900	  leave this to y.
1901
1902config DEPRECATED_PARAM_STRUCT
1903	bool "Provide old way to pass kernel parameters"
1904	depends on ATAGS
1905	help
1906	  This was deprecated in 2001 and announced to live on for 5 years.
1907	  Some old boot loaders still use this way.
1908
1909# Compressed boot loader in ROM.  Yes, we really want to ask about
1910# TEXT and BSS so we preserve their values in the config files.
1911config ZBOOT_ROM_TEXT
1912	hex "Compressed ROM boot loader base address"
1913	default "0"
1914	help
1915	  The physical address at which the ROM-able zImage is to be
1916	  placed in the target.  Platforms which normally make use of
1917	  ROM-able zImage formats normally set this to a suitable
1918	  value in their defconfig file.
1919
1920	  If ZBOOT_ROM is not enabled, this has no effect.
1921
1922config ZBOOT_ROM_BSS
1923	hex "Compressed ROM boot loader BSS address"
1924	default "0"
1925	help
1926	  The base address of an area of read/write memory in the target
1927	  for the ROM-able zImage which must be available while the
1928	  decompressor is running. It must be large enough to hold the
1929	  entire decompressed kernel plus an additional 128 KiB.
1930	  Platforms which normally make use of ROM-able zImage formats
1931	  normally set this to a suitable value in their defconfig file.
1932
1933	  If ZBOOT_ROM is not enabled, this has no effect.
1934
1935config ZBOOT_ROM
1936	bool "Compressed boot loader in ROM/flash"
1937	depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1938	help
1939	  Say Y here if you intend to execute your compressed kernel image
1940	  (zImage) directly from ROM or flash.  If unsure, say N.
1941
1942choice
1943	prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
1944	depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
1945	default ZBOOT_ROM_NONE
1946	help
1947	  Include experimental SD/MMC loading code in the ROM-able zImage.
1948	  With this enabled it is possible to write the ROM-able zImage
1949	  kernel image to an MMC or SD card and boot the kernel straight
1950	  from the reset vector. At reset the processor Mask ROM will load
1951	  the first part of the ROM-able zImage which in turn loads the
1952	  rest the kernel image to RAM.
1953
1954config ZBOOT_ROM_NONE
1955	bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
1956	help
1957	  Do not load image from SD or MMC
1958
1959config ZBOOT_ROM_MMCIF
1960	bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
1961	help
1962	  Load image from MMCIF hardware block.
1963
1964config ZBOOT_ROM_SH_MOBILE_SDHI
1965	bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
1966	help
1967	  Load image from SDHI hardware block
1968
1969endchoice
1970
1971config ARM_APPENDED_DTB
1972	bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
1973	depends on OF && !ZBOOT_ROM && EXPERIMENTAL
1974	help
1975	  With this option, the boot code will look for a device tree binary
1976	  (DTB) appended to zImage
1977	  (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1978
1979	  This is meant as a backward compatibility convenience for those
1980	  systems with a bootloader that can't be upgraded to accommodate
1981	  the documented boot protocol using a device tree.
1982
1983	  Beware that there is very little in terms of protection against
1984	  this option being confused by leftover garbage in memory that might
1985	  look like a DTB header after a reboot if no actual DTB is appended
1986	  to zImage.  Do not leave this option active in a production kernel
1987	  if you don't intend to always append a DTB.  Proper passing of the
1988	  location into r2 of a bootloader provided DTB is always preferable
1989	  to this option.
1990
1991config ARM_ATAG_DTB_COMPAT
1992	bool "Supplement the appended DTB with traditional ATAG information"
1993	depends on ARM_APPENDED_DTB
1994	help
1995	  Some old bootloaders can't be updated to a DTB capable one, yet
1996	  they provide ATAGs with memory configuration, the ramdisk address,
1997	  the kernel cmdline string, etc.  Such information is dynamically
1998	  provided by the bootloader and can't always be stored in a static
1999	  DTB.  To allow a device tree enabled kernel to be used with such
2000	  bootloaders, this option allows zImage to extract the information
2001	  from the ATAG list and store it at run time into the appended DTB.
2002
2003choice
2004	prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
2005	default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
2006
2007config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
2008	bool "Use bootloader kernel arguments if available"
2009	help
2010	  Uses the command-line options passed by the boot loader instead of
2011	  the device tree bootargs property. If the boot loader doesn't provide
2012	  any, the device tree bootargs property will be used.
2013
2014config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
2015	bool "Extend with bootloader kernel arguments"
2016	help
2017	  The command-line arguments provided by the boot loader will be
2018	  appended to the the device tree bootargs property.
2019
2020endchoice
2021
2022config CMDLINE
2023	string "Default kernel command string"
2024	default ""
2025	help
2026	  On some architectures (EBSA110 and CATS), there is currently no way
2027	  for the boot loader to pass arguments to the kernel. For these
2028	  architectures, you should supply some command-line options at build
2029	  time by entering them here. As a minimum, you should specify the
2030	  memory size and the root device (e.g., mem=64M root=/dev/nfs).
2031
2032choice
2033	prompt "Kernel command line type" if CMDLINE != ""
2034	default CMDLINE_FROM_BOOTLOADER
2035	depends on ATAGS
2036
2037config CMDLINE_FROM_BOOTLOADER
2038	bool "Use bootloader kernel arguments if available"
2039	help
2040	  Uses the command-line options passed by the boot loader. If
2041	  the boot loader doesn't provide any, the default kernel command
2042	  string provided in CMDLINE will be used.
2043
2044config CMDLINE_EXTEND
2045	bool "Extend bootloader kernel arguments"
2046	help
2047	  The command-line arguments provided by the boot loader will be
2048	  appended to the default kernel command string.
2049
2050config CMDLINE_FORCE
2051	bool "Always use the default kernel command string"
2052	help
2053	  Always use the default kernel command string, even if the boot
2054	  loader passes other arguments to the kernel.
2055	  This is useful if you cannot or don't want to change the
2056	  command-line options your boot loader passes to the kernel.
2057endchoice
2058
2059config XIP_KERNEL
2060	bool "Kernel Execute-In-Place from ROM"
2061	depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM
2062	help
2063	  Execute-In-Place allows the kernel to run from non-volatile storage
2064	  directly addressable by the CPU, such as NOR flash. This saves RAM
2065	  space since the text section of the kernel is not loaded from flash
2066	  to RAM.  Read-write sections, such as the data section and stack,
2067	  are still copied to RAM.  The XIP kernel is not compressed since
2068	  it has to run directly from flash, so it will take more space to
2069	  store it.  The flash address used to link the kernel object files,
2070	  and for storing it, is configuration dependent. Therefore, if you
2071	  say Y here, you must know the proper physical address where to
2072	  store the kernel image depending on your own flash memory usage.
2073
2074	  Also note that the make target becomes "make xipImage" rather than
2075	  "make zImage" or "make Image".  The final kernel binary to put in
2076	  ROM memory will be arch/arm/boot/xipImage.
2077
2078	  If unsure, say N.
2079
2080config XIP_PHYS_ADDR
2081	hex "XIP Kernel Physical Location"
2082	depends on XIP_KERNEL
2083	default "0x00080000"
2084	help
2085	  This is the physical address in your flash memory the kernel will
2086	  be linked for and stored to.  This address is dependent on your
2087	  own flash usage.
2088
2089config KEXEC
2090	bool "Kexec system call (EXPERIMENTAL)"
2091	depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
2092	help
2093	  kexec is a system call that implements the ability to shutdown your
2094	  current kernel, and to start another kernel.  It is like a reboot
2095	  but it is independent of the system firmware.   And like a reboot
2096	  you can start any kernel with it, not just Linux.
2097
2098	  It is an ongoing process to be certain the hardware in a machine
2099	  is properly shutdown, so do not be surprised if this code does not
2100	  initially work for you.  It may help to enable device hotplugging
2101	  support.
2102
2103config ATAGS_PROC
2104	bool "Export atags in procfs"
2105	depends on ATAGS && KEXEC
2106	default y
2107	help
2108	  Should the atags used to boot the kernel be exported in an "atags"
2109	  file in procfs. Useful with kexec.
2110
2111config CRASH_DUMP
2112	bool "Build kdump crash kernel (EXPERIMENTAL)"
2113	depends on EXPERIMENTAL
2114	help
2115	  Generate crash dump after being started by kexec. This should
2116	  be normally only set in special crash dump kernels which are
2117	  loaded in the main kernel with kexec-tools into a specially
2118	  reserved region and then later executed after a crash by
2119	  kdump/kexec. The crash dump kernel must be compiled to a
2120	  memory address not used by the main kernel
2121
2122	  For more details see Documentation/kdump/kdump.txt
2123
2124config AUTO_ZRELADDR
2125	bool "Auto calculation of the decompressed kernel image address"
2126	depends on !ZBOOT_ROM && !ARCH_U300
2127	help
2128	  ZRELADDR is the physical address where the decompressed kernel
2129	  image will be placed. If AUTO_ZRELADDR is selected, the address
2130	  will be determined at run-time by masking the current IP with
2131	  0xf8000000. This assumes the zImage being placed in the first 128MB
2132	  from start of memory.
2133
2134endmenu
2135
2136menu "CPU Power Management"
2137
2138if ARCH_HAS_CPUFREQ
2139
2140source "drivers/cpufreq/Kconfig"
2141
2142config CPU_FREQ_IMX
2143	tristate "CPUfreq driver for i.MX CPUs"
2144	depends on ARCH_MXC && CPU_FREQ
2145	select CPU_FREQ_TABLE
2146	help
2147	  This enables the CPUfreq driver for i.MX CPUs.
2148
2149config CPU_FREQ_SA1100
2150	bool
2151
2152config CPU_FREQ_SA1110
2153	bool
2154
2155config CPU_FREQ_INTEGRATOR
2156	tristate "CPUfreq driver for ARM Integrator CPUs"
2157	depends on ARCH_INTEGRATOR && CPU_FREQ
2158	default y
2159	help
2160	  This enables the CPUfreq driver for ARM Integrator CPUs.
2161
2162	  For details, take a look at <file:Documentation/cpu-freq>.
2163
2164	  If in doubt, say Y.
2165
2166config CPU_FREQ_PXA
2167	bool
2168	depends on CPU_FREQ && ARCH_PXA && PXA25x
2169	default y
2170	select CPU_FREQ_DEFAULT_GOV_USERSPACE
2171	select CPU_FREQ_TABLE
2172
2173config CPU_FREQ_S3C
2174	bool
2175	help
2176	  Internal configuration node for common cpufreq on Samsung SoC
2177
2178config CPU_FREQ_S3C24XX
2179	bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
2180	depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
2181	select CPU_FREQ_S3C
2182	help
2183	  This enables the CPUfreq driver for the Samsung S3C24XX family
2184	  of CPUs.
2185
2186	  For details, take a look at <file:Documentation/cpu-freq>.
2187
2188	  If in doubt, say N.
2189
2190config CPU_FREQ_S3C24XX_PLL
2191	bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
2192	depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
2193	help
2194	  Compile in support for changing the PLL frequency from the
2195	  S3C24XX series CPUfreq driver. The PLL takes time to settle
2196	  after a frequency change, so by default it is not enabled.
2197
2198	  This also means that the PLL tables for the selected CPU(s) will
2199	  be built which may increase the size of the kernel image.
2200
2201config CPU_FREQ_S3C24XX_DEBUG
2202	bool "Debug CPUfreq Samsung driver core"
2203	depends on CPU_FREQ_S3C24XX
2204	help
2205	  Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
2206
2207config CPU_FREQ_S3C24XX_IODEBUG
2208	bool "Debug CPUfreq Samsung driver IO timing"
2209	depends on CPU_FREQ_S3C24XX
2210	help
2211	  Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
2212
2213config CPU_FREQ_S3C24XX_DEBUGFS
2214	bool "Export debugfs for CPUFreq"
2215	depends on CPU_FREQ_S3C24XX && DEBUG_FS
2216	help
2217	  Export status information via debugfs.
2218
2219endif
2220
2221source "drivers/cpuidle/Kconfig"
2222
2223endmenu
2224
2225menu "Floating point emulation"
2226
2227comment "At least one emulation must be selected"
2228
2229config FPE_NWFPE
2230	bool "NWFPE math emulation"
2231	depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
2232	---help---
2233	  Say Y to include the NWFPE floating point emulator in the kernel.
2234	  This is necessary to run most binaries. Linux does not currently
2235	  support floating point hardware so you need to say Y here even if
2236	  your machine has an FPA or floating point co-processor podule.
2237
2238	  You may say N here if you are going to load the Acorn FPEmulator
2239	  early in the bootup.
2240
2241config FPE_NWFPE_XP
2242	bool "Support extended precision"
2243	depends on FPE_NWFPE
2244	help
2245	  Say Y to include 80-bit support in the kernel floating-point
2246	  emulator.  Otherwise, only 32 and 64-bit support is compiled in.
2247	  Note that gcc does not generate 80-bit operations by default,
2248	  so in most cases this option only enlarges the size of the
2249	  floating point emulator without any good reason.
2250
2251	  You almost surely want to say N here.
2252
2253config FPE_FASTFPE
2254	bool "FastFPE math emulation (EXPERIMENTAL)"
2255	depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
2256	---help---
2257	  Say Y here to include the FAST floating point emulator in the kernel.
2258	  This is an experimental much faster emulator which now also has full
2259	  precision for the mantissa.  It does not support any exceptions.
2260	  It is very simple, and approximately 3-6 times faster than NWFPE.
2261
2262	  It should be sufficient for most programs.  It may be not suitable
2263	  for scientific calculations, but you have to check this for yourself.
2264	  If you do not feel you need a faster FP emulation you should better
2265	  choose NWFPE.
2266
2267config VFP
2268	bool "VFP-format floating point maths"
2269	depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
2270	help
2271	  Say Y to include VFP support code in the kernel. This is needed
2272	  if your hardware includes a VFP unit.
2273
2274	  Please see <file:Documentation/arm/VFP/release-notes.txt> for
2275	  release notes and additional status information.
2276
2277	  Say N if your target does not have VFP hardware.
2278
2279config VFPv3
2280	bool
2281	depends on VFP
2282	default y if CPU_V7
2283
2284config NEON
2285	bool "Advanced SIMD (NEON) Extension support"
2286	depends on VFPv3 && CPU_V7
2287	help
2288	  Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2289	  Extension.
2290
2291endmenu
2292
2293menu "Userspace binary formats"
2294
2295source "fs/Kconfig.binfmt"
2296
2297config ARTHUR
2298	tristate "RISC OS personality"
2299	depends on !AEABI
2300	help
2301	  Say Y here to include the kernel code necessary if you want to run
2302	  Acorn RISC OS/Arthur binaries under Linux. This code is still very
2303	  experimental; if this sounds frightening, say N and sleep in peace.
2304	  You can also say M here to compile this support as a module (which
2305	  will be called arthur).
2306
2307endmenu
2308
2309menu "Power management options"
2310
2311source "kernel/power/Kconfig"
2312
2313config ARCH_SUSPEND_POSSIBLE
2314	depends on !ARCH_S5PC100
2315	depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
2316		CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
2317	def_bool y
2318
2319config ARM_CPU_SUSPEND
2320	def_bool PM_SLEEP
2321
2322endmenu
2323
2324source "net/Kconfig"
2325
2326source "drivers/Kconfig"
2327
2328source "fs/Kconfig"
2329
2330source "arch/arm/Kconfig.debug"
2331
2332source "security/Kconfig"
2333
2334source "crypto/Kconfig"
2335
2336source "lib/Kconfig"
2337
2338source "arch/arm/kvm/Kconfig"
2339