1/* 2 * ARC CPU startup Code 3 * 4 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Vineetg: Dec 2007 11 * -Check if we are running on Simulator or on real hardware 12 * to skip certain things during boot on simulator 13 */ 14 15#include <asm/asm-offsets.h> 16#include <asm/entry.h> 17#include <linux/linkage.h> 18#include <asm/arcregs.h> 19 20 .cpu A7 21 22 .section .init.text, "ax",@progbits 23 .type stext, @function 24 .globl stext 25stext: 26 ;------------------------------------------------------------------- 27 ; Don't clobber r0-r2 yet. It might have bootloader provided info 28 ;------------------------------------------------------------------- 29 30 sr @_int_vec_base_lds, [AUX_INTR_VEC_BASE] 31 32#ifdef CONFIG_SMP 33 ; Ensure Boot (Master) proceeds. Others wait in platform dependent way 34 ; IDENTITY Reg [ 3 2 1 0 ] 35 ; (cpu-id) ^^^ => Zero for UP ARC700 36 ; => #Core-ID if SMP (Master 0) 37 ; Note that non-boot CPUs might not land here if halt-on-reset and 38 ; instead breath life from @first_lines_of_secondary, but we still 39 ; need to make sure only boot cpu takes this path. 40 GET_CPU_ID r5 41 cmp r5, 0 42 mov.ne r0, r5 43 jne arc_platform_smp_wait_to_boot 44#endif 45 ; Clear BSS before updating any globals 46 ; XXX: use ZOL here 47 mov r5, __bss_start 48 mov r6, __bss_stop 491: 50 st.ab 0, [r5,4] 51 brlt r5, r6, 1b 52 53 ; Uboot - kernel ABI 54 ; r0 = [0] No uboot interaction, [1] cmdline in r2, [2] DTB in r2 55 ; r1 = magic number (board identity, unused as of now 56 ; r2 = pointer to uboot provided cmdline or external DTB in mem 57 ; These are handled later in setup_arch() 58 st r0, [@uboot_tag] 59 st r2, [@uboot_arg] 60 61 ; Identify if running on ISS vs Silicon 62 ; IDENTITY Reg [ 3 2 1 0 ] 63 ; (chip-id) ^^^^^ ==> 0xffff for ISS 64 lr r0, [identity] 65 lsr r3, r0, 16 66 cmp r3, 0xffff 67 mov.z r4, 0 68 mov.nz r4, 1 69 st r4, [@running_on_hw] 70 71 ; setup "current" tsk and optionally cache it in dedicated r25 72 mov r9, @init_task 73 SET_CURR_TASK_ON_CPU r9, r0 ; r9 = tsk, r0 = scratch 74 75 ; setup stack (fp, sp) 76 mov fp, 0 77 78 ; tsk->thread_info is really a PAGE, whose bottom hoists stack 79 GET_TSK_STACK_BASE r9, sp ; r9 = tsk, sp = stack base(output) 80 81 j start_kernel ; "C" entry point 82 83#ifdef CONFIG_SMP 84;---------------------------------------------------------------- 85; First lines of code run by secondary before jumping to 'C' 86;---------------------------------------------------------------- 87 .section .text, "ax",@progbits 88 .type first_lines_of_secondary, @function 89 .globl first_lines_of_secondary 90 91first_lines_of_secondary: 92 93 sr @_int_vec_base_lds, [AUX_INTR_VEC_BASE] 94 95 ; setup per-cpu idle task as "current" on this CPU 96 ld r0, [@secondary_idle_tsk] 97 SET_CURR_TASK_ON_CPU r0, r1 98 99 ; setup stack (fp, sp) 100 mov fp, 0 101 102 ; set it's stack base to tsk->thread_info bottom 103 GET_TSK_STACK_BASE r0, sp 104 105 j start_kernel_secondary 106 107#endif 108