1# SPDX-License-Identifier: (GPL-2.0 OR MIT)
2# Copyright 2019 Linaro Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: QCOM SoC Temperature Sensor (TSENS)
9
10maintainers:
11  - Amit Kucheria <amitk@kernel.org>
12
13description: |
14  QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15  three distinct major versions of the IP that is supported by a single driver.
16  The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17  everything before v1 when there was no versioning information.
18
19properties:
20  compatible:
21    oneOf:
22      - description: msm8960 TSENS based
23        items:
24          - enum:
25              - qcom,ipq8064-tsens
26              - qcom,msm8960-tsens
27
28      - description: v0.1 of TSENS
29        items:
30          - enum:
31              - qcom,mdm9607-tsens
32              - qcom,msm8916-tsens
33              - qcom,msm8939-tsens
34              - qcom,msm8974-tsens
35          - const: qcom,tsens-v0_1
36
37      - description: v1 of TSENS
38        items:
39          - enum:
40              - qcom,msm8976-tsens
41              - qcom,qcs404-tsens
42          - const: qcom,tsens-v1
43
44      - description: v2 of TSENS
45        items:
46          - enum:
47              - qcom,msm8953-tsens
48              - qcom,msm8996-tsens
49              - qcom,msm8998-tsens
50              - qcom,sc7180-tsens
51              - qcom,sc7280-tsens
52              - qcom,sc8180x-tsens
53              - qcom,sc8280xp-tsens
54              - qcom,sdm630-tsens
55              - qcom,sdm845-tsens
56              - qcom,sm6350-tsens
57              - qcom,sm8150-tsens
58              - qcom,sm8250-tsens
59              - qcom,sm8350-tsens
60              - qcom,sm8450-tsens
61          - const: qcom,tsens-v2
62
63      - description: v2 of TSENS with combined interrupt
64        enum:
65          - qcom,ipq8074-tsens
66
67  reg:
68    items:
69      - description: TM registers
70      - description: SROT registers
71
72  interrupts:
73    minItems: 1
74    maxItems: 2
75
76  interrupt-names:
77    minItems: 1
78    maxItems: 2
79
80  nvmem-cells:
81    minItems: 1
82    maxItems: 2
83    description:
84      Reference to an nvmem node for the calibration data
85
86  nvmem-cell-names:
87    minItems: 1
88    items:
89      - const: calib
90      - enum:
91          - calib_backup
92          - calib_sel
93
94  "#qcom,sensors":
95    description:
96      Number of sensors enabled on this platform
97    $ref: /schemas/types.yaml#/definitions/uint32
98    minimum: 1
99    maximum: 16
100
101  "#thermal-sensor-cells":
102    const: 1
103    description:
104      Number of cells required to uniquely identify the thermal sensors. Since
105      we have multiple sensors this is set to 1
106
107required:
108  - compatible
109  - interrupts
110  - interrupt-names
111  - "#thermal-sensor-cells"
112  - "#qcom,sensors"
113
114allOf:
115  - if:
116      properties:
117        compatible:
118          contains:
119            enum:
120              - qcom,ipq8064-tsens
121              - qcom,mdm9607-tsens
122              - qcom,msm8916-tsens
123              - qcom,msm8960-tsens
124              - qcom,msm8974-tsens
125              - qcom,msm8976-tsens
126              - qcom,qcs404-tsens
127              - qcom,tsens-v0_1
128              - qcom,tsens-v1
129    then:
130      properties:
131        interrupts:
132          items:
133            - description: Combined interrupt if upper or lower threshold crossed
134        interrupt-names:
135          items:
136            - const: uplow
137
138  - if:
139      properties:
140        compatible:
141          contains:
142            enum:
143              - qcom,msm8953-tsens
144              - qcom,msm8996-tsens
145              - qcom,msm8998-tsens
146              - qcom,sc7180-tsens
147              - qcom,sc7280-tsens
148              - qcom,sc8180x-tsens
149              - qcom,sdm630-tsens
150              - qcom,sdm845-tsens
151              - qcom,sm8150-tsens
152              - qcom,sm8250-tsens
153              - qcom,sm8350-tsens
154              - qcom,tsens-v2
155    then:
156      properties:
157        interrupts:
158          items:
159            - description: Combined interrupt if upper or lower threshold crossed
160            - description: Interrupt if critical threshold crossed
161        interrupt-names:
162          items:
163            - const: uplow
164            - const: critical
165
166  - if:
167      properties:
168        compatible:
169          contains:
170            enum:
171              - qcom,ipq8074-tsens
172    then:
173      properties:
174        interrupts:
175          items:
176            - description: Combined interrupt if upper, lower or critical thresholds crossed
177        interrupt-names:
178          items:
179            - const: combined
180
181  - if:
182      properties:
183        compatible:
184          contains:
185            enum:
186              - qcom,ipq8074-tsens
187              - qcom,tsens-v0_1
188              - qcom,tsens-v1
189              - qcom,tsens-v2
190
191    then:
192      required:
193        - reg
194
195additionalProperties: false
196
197examples:
198  - |
199    #include <dt-bindings/interrupt-controller/arm-gic.h>
200    // Example msm9860 based SoC (ipq8064):
201    gcc: clock-controller {
202
203           /* ... */
204
205           tsens: thermal-sensor {
206                compatible = "qcom,ipq8064-tsens";
207
208                 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
209                 nvmem-cell-names = "calib", "calib_backup";
210                 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
211                 interrupt-names = "uplow";
212
213                 #qcom,sensors = <11>;
214                 #thermal-sensor-cells = <1>;
215          };
216    };
217
218  - |
219    #include <dt-bindings/interrupt-controller/arm-gic.h>
220    // Example 1 (legacy: for pre v1 IP):
221    tsens1: thermal-sensor@900000 {
222           compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
223           reg = <0x4a9000 0x1000>, /* TM */
224                 <0x4a8000 0x1000>; /* SROT */
225
226           nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
227           nvmem-cell-names = "calib", "calib_sel";
228
229           interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
230           interrupt-names = "uplow";
231
232           #qcom,sensors = <5>;
233           #thermal-sensor-cells = <1>;
234    };
235
236  - |
237    #include <dt-bindings/interrupt-controller/arm-gic.h>
238    // Example 2 (for any platform containing v1 of the TSENS IP):
239    tsens2: thermal-sensor@4a9000 {
240          compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
241          reg = <0x004a9000 0x1000>, /* TM */
242                <0x004a8000 0x1000>; /* SROT */
243
244          nvmem-cells = <&tsens_caldata>;
245          nvmem-cell-names = "calib";
246
247          interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
248          interrupt-names = "uplow";
249
250          #qcom,sensors = <10>;
251          #thermal-sensor-cells = <1>;
252    };
253
254  - |
255    #include <dt-bindings/interrupt-controller/arm-gic.h>
256    // Example 3 (for any platform containing v2 of the TSENS IP):
257    tsens3: thermal-sensor@c263000 {
258           compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
259           reg = <0xc263000 0x1ff>,
260                 <0xc222000 0x1ff>;
261
262           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
263                        <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
264           interrupt-names = "uplow", "critical";
265
266           #qcom,sensors = <13>;
267           #thermal-sensor-cells = <1>;
268    };
269
270  - |
271    #include <dt-bindings/interrupt-controller/arm-gic.h>
272    // Example 4 (for any IPQ8074 based SoC-s):
273    tsens4: thermal-sensor@4a9000 {
274           compatible = "qcom,ipq8074-tsens";
275           reg = <0x4a9000 0x1000>,
276                 <0x4a8000 0x1000>;
277
278           interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
279           interrupt-names = "combined";
280
281           #qcom,sensors = <16>;
282           #thermal-sensor-cells = <1>;
283    };
284...
285