1# SPDX-License-Identifier: (GPL-2.0 OR MIT) 2# Copyright 2019 Linaro Ltd. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: QCOM SoC Temperature Sensor (TSENS) 9 10maintainers: 11 - Amit Kucheria <amitk@kernel.org> 12 13description: | 14 QCOM SoCs have TSENS IP to allow temperature measurement. There are currently 15 three distinct major versions of the IP that is supported by a single driver. 16 The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures 17 everything before v1 when there was no versioning information. 18 19properties: 20 compatible: 21 oneOf: 22 - description: msm8960 TSENS based 23 items: 24 - enum: 25 - qcom,ipq8064-tsens 26 - qcom,msm8960-tsens 27 28 - description: v0.1 of TSENS 29 items: 30 - enum: 31 - qcom,mdm9607-tsens 32 - qcom,msm8916-tsens 33 - qcom,msm8939-tsens 34 - qcom,msm8974-tsens 35 - const: qcom,tsens-v0_1 36 37 - description: v1 of TSENS 38 items: 39 - enum: 40 - qcom,msm8956-tsens 41 - qcom,msm8976-tsens 42 - qcom,qcs404-tsens 43 - const: qcom,tsens-v1 44 45 - description: v2 of TSENS 46 items: 47 - enum: 48 - qcom,msm8953-tsens 49 - qcom,msm8996-tsens 50 - qcom,msm8998-tsens 51 - qcom,sc7180-tsens 52 - qcom,sc7280-tsens 53 - qcom,sc8180x-tsens 54 - qcom,sc8280xp-tsens 55 - qcom,sdm630-tsens 56 - qcom,sdm845-tsens 57 - qcom,sm6115-tsens 58 - qcom,sm6350-tsens 59 - qcom,sm8150-tsens 60 - qcom,sm8250-tsens 61 - qcom,sm8350-tsens 62 - qcom,sm8450-tsens 63 - qcom,sm8550-tsens 64 - const: qcom,tsens-v2 65 66 - description: v2 of TSENS with combined interrupt 67 enum: 68 - qcom,ipq8074-tsens 69 70 reg: 71 items: 72 - description: TM registers 73 - description: SROT registers 74 75 interrupts: 76 minItems: 1 77 maxItems: 2 78 79 interrupt-names: 80 minItems: 1 81 maxItems: 2 82 83 nvmem-cells: 84 minItems: 1 85 maxItems: 2 86 description: 87 Reference to an nvmem node for the calibration data 88 89 nvmem-cell-names: 90 minItems: 1 91 items: 92 - const: calib 93 - enum: 94 - calib_backup 95 - calib_sel 96 97 "#qcom,sensors": 98 description: 99 Number of sensors enabled on this platform 100 $ref: /schemas/types.yaml#/definitions/uint32 101 minimum: 1 102 maximum: 16 103 104 "#thermal-sensor-cells": 105 const: 1 106 description: 107 Number of cells required to uniquely identify the thermal sensors. Since 108 we have multiple sensors this is set to 1 109 110required: 111 - compatible 112 - interrupts 113 - interrupt-names 114 - "#thermal-sensor-cells" 115 - "#qcom,sensors" 116 117allOf: 118 - if: 119 properties: 120 compatible: 121 contains: 122 enum: 123 - qcom,ipq8064-tsens 124 - qcom,mdm9607-tsens 125 - qcom,msm8916-tsens 126 - qcom,msm8960-tsens 127 - qcom,msm8974-tsens 128 - qcom,msm8976-tsens 129 - qcom,qcs404-tsens 130 - qcom,tsens-v0_1 131 - qcom,tsens-v1 132 then: 133 properties: 134 interrupts: 135 items: 136 - description: Combined interrupt if upper or lower threshold crossed 137 interrupt-names: 138 items: 139 - const: uplow 140 141 - if: 142 properties: 143 compatible: 144 contains: 145 enum: 146 - qcom,msm8953-tsens 147 - qcom,msm8996-tsens 148 - qcom,msm8998-tsens 149 - qcom,sc7180-tsens 150 - qcom,sc7280-tsens 151 - qcom,sc8180x-tsens 152 - qcom,sc8280xp-tsens 153 - qcom,sdm630-tsens 154 - qcom,sdm845-tsens 155 - qcom,sm6350-tsens 156 - qcom,sm8150-tsens 157 - qcom,sm8250-tsens 158 - qcom,sm8350-tsens 159 - qcom,sm8450-tsens 160 - qcom,tsens-v2 161 then: 162 properties: 163 interrupts: 164 items: 165 - description: Combined interrupt if upper or lower threshold crossed 166 - description: Interrupt if critical threshold crossed 167 interrupt-names: 168 items: 169 - const: uplow 170 - const: critical 171 172 - if: 173 properties: 174 compatible: 175 contains: 176 enum: 177 - qcom,ipq8074-tsens 178 then: 179 properties: 180 interrupts: 181 items: 182 - description: Combined interrupt if upper, lower or critical thresholds crossed 183 interrupt-names: 184 items: 185 - const: combined 186 187 - if: 188 properties: 189 compatible: 190 contains: 191 enum: 192 - qcom,ipq8074-tsens 193 - qcom,tsens-v0_1 194 - qcom,tsens-v1 195 - qcom,tsens-v2 196 197 then: 198 required: 199 - reg 200 201additionalProperties: false 202 203examples: 204 - | 205 #include <dt-bindings/interrupt-controller/arm-gic.h> 206 // Example msm9860 based SoC (ipq8064): 207 gcc: clock-controller { 208 209 /* ... */ 210 211 tsens: thermal-sensor { 212 compatible = "qcom,ipq8064-tsens"; 213 214 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>; 215 nvmem-cell-names = "calib", "calib_backup"; 216 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 217 interrupt-names = "uplow"; 218 219 #qcom,sensors = <11>; 220 #thermal-sensor-cells = <1>; 221 }; 222 }; 223 224 - | 225 #include <dt-bindings/interrupt-controller/arm-gic.h> 226 // Example 1 (legacy: for pre v1 IP): 227 tsens1: thermal-sensor@900000 { 228 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; 229 reg = <0x4a9000 0x1000>, /* TM */ 230 <0x4a8000 0x1000>; /* SROT */ 231 232 nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; 233 nvmem-cell-names = "calib", "calib_sel"; 234 235 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 236 interrupt-names = "uplow"; 237 238 #qcom,sensors = <5>; 239 #thermal-sensor-cells = <1>; 240 }; 241 242 - | 243 #include <dt-bindings/interrupt-controller/arm-gic.h> 244 // Example 2 (for any platform containing v1 of the TSENS IP): 245 tsens2: thermal-sensor@4a9000 { 246 compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; 247 reg = <0x004a9000 0x1000>, /* TM */ 248 <0x004a8000 0x1000>; /* SROT */ 249 250 nvmem-cells = <&tsens_caldata>; 251 nvmem-cell-names = "calib"; 252 253 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>; 254 interrupt-names = "uplow"; 255 256 #qcom,sensors = <10>; 257 #thermal-sensor-cells = <1>; 258 }; 259 260 - | 261 #include <dt-bindings/interrupt-controller/arm-gic.h> 262 // Example 3 (for any platform containing v2 of the TSENS IP): 263 tsens3: thermal-sensor@c263000 { 264 compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; 265 reg = <0xc263000 0x1ff>, 266 <0xc222000 0x1ff>; 267 268 interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 269 <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 270 interrupt-names = "uplow", "critical"; 271 272 #qcom,sensors = <13>; 273 #thermal-sensor-cells = <1>; 274 }; 275 276 - | 277 #include <dt-bindings/interrupt-controller/arm-gic.h> 278 // Example 4 (for any IPQ8074 based SoC-s): 279 tsens4: thermal-sensor@4a9000 { 280 compatible = "qcom,ipq8074-tsens"; 281 reg = <0x4a9000 0x1000>, 282 <0x4a8000 0x1000>; 283 284 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 285 interrupt-names = "combined"; 286 287 #qcom,sensors = <16>; 288 #thermal-sensor-cells = <1>; 289 }; 290... 291