1# SPDX-License-Identifier: (GPL-2.0 OR MIT)
2# Copyright 2019 Linaro Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: QCOM SoC Temperature Sensor (TSENS)
9
10maintainers:
11  - Amit Kucheria <amitk@kernel.org>
12
13description: |
14  QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15  three distinct major versions of the IP that is supported by a single driver.
16  The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17  everything before v1 when there was no versioning information.
18
19properties:
20  compatible:
21    oneOf:
22      - description: msm9860 TSENS based
23        items:
24          - enum:
25              - qcom,ipq8064-tsens
26
27      - description: v0.1 of TSENS
28        items:
29          - enum:
30              - qcom,mdm9607-tsens
31              - qcom,msm8916-tsens
32              - qcom,msm8939-tsens
33              - qcom,msm8974-tsens
34          - const: qcom,tsens-v0_1
35
36      - description: v1 of TSENS
37        items:
38          - enum:
39              - qcom,msm8976-tsens
40              - qcom,qcs404-tsens
41          - const: qcom,tsens-v1
42
43      - description: v2 of TSENS
44        items:
45          - enum:
46              - qcom,msm8953-tsens
47              - qcom,msm8996-tsens
48              - qcom,msm8998-tsens
49              - qcom,sc7180-tsens
50              - qcom,sc7280-tsens
51              - qcom,sc8180x-tsens
52              - qcom,sdm630-tsens
53              - qcom,sdm845-tsens
54              - qcom,sm6350-tsens
55              - qcom,sm8150-tsens
56              - qcom,sm8250-tsens
57              - qcom,sm8350-tsens
58          - const: qcom,tsens-v2
59
60  reg:
61    items:
62      - description: TM registers
63      - description: SROT registers
64
65  interrupts:
66    minItems: 1
67    items:
68      - description: Combined interrupt if upper or lower threshold crossed
69      - description: Interrupt if critical threshold crossed
70
71  interrupt-names:
72    minItems: 1
73    items:
74      - const: uplow
75      - const: critical
76
77  nvmem-cells:
78    minItems: 1
79    maxItems: 2
80    description:
81      Reference to an nvmem node for the calibration data
82
83  nvmem-cell-names:
84    minItems: 1
85    items:
86      - const: calib
87      - enum:
88          - calib_backup
89          - calib_sel
90
91  "#qcom,sensors":
92    description:
93      Number of sensors enabled on this platform
94    $ref: /schemas/types.yaml#/definitions/uint32
95    minimum: 1
96    maximum: 16
97
98  "#thermal-sensor-cells":
99    const: 1
100    description:
101      Number of cells required to uniquely identify the thermal sensors. Since
102      we have multiple sensors this is set to 1
103
104required:
105  - compatible
106  - interrupts
107  - interrupt-names
108  - "#thermal-sensor-cells"
109  - "#qcom,sensors"
110
111allOf:
112  - if:
113      properties:
114        compatible:
115          contains:
116            enum:
117              - qcom,ipq8064-tsens
118              - qcom,mdm9607-tsens
119              - qcom,msm8916-tsens
120              - qcom,msm8974-tsens
121              - qcom,msm8976-tsens
122              - qcom,qcs404-tsens
123              - qcom,tsens-v0_1
124              - qcom,tsens-v1
125    then:
126      properties:
127        interrupts:
128          maxItems: 1
129        interrupt-names:
130          maxItems: 1
131
132    else:
133      properties:
134        interrupts:
135          minItems: 2
136        interrupt-names:
137          minItems: 2
138
139  - if:
140      properties:
141        compatible:
142          contains:
143            enum:
144              - qcom,tsens-v0_1
145              - qcom,tsens-v1
146              - qcom,tsens-v2
147
148    then:
149      required:
150        - reg
151
152additionalProperties: false
153
154examples:
155  - |
156    #include <dt-bindings/interrupt-controller/arm-gic.h>
157    // Example msm9860 based SoC (ipq8064):
158    gcc: clock-controller {
159
160           /* ... */
161
162           tsens: thermal-sensor {
163                compatible = "qcom,ipq8064-tsens";
164
165                 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
166                 nvmem-cell-names = "calib", "calib_backup";
167                 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
168                 interrupt-names = "uplow";
169
170                 #qcom,sensors = <11>;
171                 #thermal-sensor-cells = <1>;
172          };
173    };
174
175  - |
176    #include <dt-bindings/interrupt-controller/arm-gic.h>
177    // Example 1 (legacy: for pre v1 IP):
178    tsens1: thermal-sensor@900000 {
179           compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
180           reg = <0x4a9000 0x1000>, /* TM */
181                 <0x4a8000 0x1000>; /* SROT */
182
183           nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
184           nvmem-cell-names = "calib", "calib_sel";
185
186           interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
187           interrupt-names = "uplow";
188
189           #qcom,sensors = <5>;
190           #thermal-sensor-cells = <1>;
191    };
192
193  - |
194    #include <dt-bindings/interrupt-controller/arm-gic.h>
195    // Example 2 (for any platform containing v1 of the TSENS IP):
196    tsens2: thermal-sensor@4a9000 {
197          compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
198          reg = <0x004a9000 0x1000>, /* TM */
199                <0x004a8000 0x1000>; /* SROT */
200
201          nvmem-cells = <&tsens_caldata>;
202          nvmem-cell-names = "calib";
203
204          interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
205          interrupt-names = "uplow";
206
207          #qcom,sensors = <10>;
208          #thermal-sensor-cells = <1>;
209    };
210
211  - |
212    #include <dt-bindings/interrupt-controller/arm-gic.h>
213    // Example 3 (for any platform containing v2 of the TSENS IP):
214    tsens3: thermal-sensor@c263000 {
215           compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
216           reg = <0xc263000 0x1ff>,
217                 <0xc222000 0x1ff>;
218
219           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
220                        <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
221           interrupt-names = "uplow", "critical";
222
223           #qcom,sensors = <13>;
224           #thermal-sensor-cells = <1>;
225    };
226...
227