1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pinctrl/apple,pinctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Apple GPIO controller 8 9maintainers: 10 - Mark Kettenis <kettenis@openbsd.org> 11 12description: | 13 The Apple GPIO controller is a simple combined pin and GPIO 14 controller present on Apple ARM SoC platforms, including various 15 iPhone and iPad devices and the "Apple Silicon" Macs. 16 17properties: 18 compatible: 19 items: 20 - enum: 21 - apple,t8103-pinctrl 22 - apple,t8112-pinctrl 23 - apple,t6000-pinctrl 24 - const: apple,pinctrl 25 26 reg: 27 maxItems: 1 28 29 clocks: 30 maxItems: 1 31 32 gpio-controller: true 33 34 '#gpio-cells': 35 const: 2 36 37 gpio-ranges: 38 maxItems: 1 39 40 apple,npins: 41 $ref: /schemas/types.yaml#/definitions/uint32 42 description: The number of pins in this GPIO controller. 43 44 interrupts: 45 description: One interrupt for each of the (up to 7) interrupt 46 groups supported by the controller sorted by interrupt group 47 number in ascending order. 48 minItems: 1 49 maxItems: 7 50 51 interrupt-controller: true 52 53 '#interrupt-cells': 54 const: 2 55 56 power-domains: 57 maxItems: 1 58 59patternProperties: 60 '-pins$': 61 type: object 62 $ref: pinmux-node.yaml# 63 64 properties: 65 pinmux: 66 description: 67 Values are constructed from pin number and alternate function 68 configuration number using the APPLE_PINMUX() helper macro 69 defined in include/dt-bindings/pinctrl/apple.h. 70 71 required: 72 - pinmux 73 74 additionalProperties: false 75 76allOf: 77 - $ref: pinctrl.yaml# 78 79required: 80 - compatible 81 - reg 82 - gpio-controller 83 - '#gpio-cells' 84 - gpio-ranges 85 - apple,npins 86 87additionalProperties: false 88 89examples: 90 - | 91 #include <dt-bindings/interrupt-controller/apple-aic.h> 92 #include <dt-bindings/pinctrl/apple.h> 93 94 soc { 95 #address-cells = <2>; 96 #size-cells = <2>; 97 98 pinctrl: pinctrl@23c100000 { 99 compatible = "apple,t8103-pinctrl", "apple,pinctrl"; 100 reg = <0x2 0x3c100000 0x0 0x100000>; 101 clocks = <&gpio_clk>; 102 103 gpio-controller; 104 #gpio-cells = <2>; 105 gpio-ranges = <&pinctrl 0 0 212>; 106 apple,npins = <212>; 107 108 interrupt-controller; 109 #interrupt-cells = <2>; 110 interrupt-parent = <&aic>; 111 interrupts = <AIC_IRQ 16 IRQ_TYPE_LEVEL_HIGH>, 112 <AIC_IRQ 17 IRQ_TYPE_LEVEL_HIGH>, 113 <AIC_IRQ 18 IRQ_TYPE_LEVEL_HIGH>, 114 <AIC_IRQ 19 IRQ_TYPE_LEVEL_HIGH>, 115 <AIC_IRQ 20 IRQ_TYPE_LEVEL_HIGH>, 116 <AIC_IRQ 21 IRQ_TYPE_LEVEL_HIGH>, 117 <AIC_IRQ 22 IRQ_TYPE_LEVEL_HIGH>; 118 119 pcie_pins: pcie-pins { 120 pinmux = <APPLE_PINMUX(150, 1)>, 121 <APPLE_PINMUX(151, 1)>, 122 <APPLE_PINMUX(32, 1)>; 123 }; 124 }; 125 }; 126