1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Brcmstb PCIe Host Controller Device Tree Bindings
8
9maintainers:
10  - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
11
12properties:
13  compatible:
14    items:
15      - enum:
16          - brcm,bcm2711-pcie # The Raspberry Pi 4
17          - brcm,bcm4908-pcie
18          - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19          - brcm,bcm7278-pcie # Broadcom 7278 Arm
20          - brcm,bcm7216-pcie # Broadcom 7216 Arm
21          - brcm,bcm7445-pcie # Broadcom 7445 Arm
22          - brcm,bcm7425-pcie # Broadcom 7425 MIPs
23          - brcm,bcm7435-pcie # Broadcom 7435 MIPs
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    minItems: 1
30    items:
31      - description: PCIe host controller
32      - description: builtin MSI controller
33
34  interrupt-names:
35    minItems: 1
36    items:
37      - const: pcie
38      - const: msi
39
40  ranges:
41    minItems: 1
42    maxItems: 4
43
44  dma-ranges:
45    minItems: 1
46    maxItems: 6
47
48  clocks:
49    maxItems: 1
50
51  clock-names:
52    items:
53      - const: sw_pcie
54
55  msi-controller:
56    description: Identifies the node as an MSI controller.
57
58  msi-parent:
59    description: MSI controller the device is capable of using.
60
61  brcm,enable-ssc:
62    description: Indicates usage of spread-spectrum clocking.
63    type: boolean
64
65  aspm-no-l0s: true
66
67  brcm,scb-sizes:
68    description: u64 giving the 64bit PCIe memory
69      viewport size of a memory controller.  There may be up to
70      three controllers, and each size must be a power of two
71      with a size greater or equal to the amount of memory the
72      controller supports.  Note that each memory controller
73      may have two component regions -- base and extended -- so
74      this information cannot be deduced from the dma-ranges.
75    $ref: /schemas/types.yaml#/definitions/uint64-array
76    items:
77      minItems: 1
78      maxItems: 3
79
80required:
81  - reg
82  - ranges
83  - dma-ranges
84  - "#interrupt-cells"
85  - interrupts
86  - interrupt-names
87  - interrupt-map-mask
88  - interrupt-map
89  - msi-controller
90
91allOf:
92  - $ref: /schemas/pci/pci-bus.yaml#
93  - $ref: /schemas/interrupt-controller/msi-controller.yaml#
94  - if:
95      properties:
96        compatible:
97          contains:
98            const: brcm,bcm4908-pcie
99    then:
100      properties:
101        resets:
102          items:
103            - description: reset controller handling the PERST# signal
104
105        reset-names:
106          items:
107            - const: perst
108
109      required:
110        - resets
111        - reset-names
112  - if:
113      properties:
114        compatible:
115          contains:
116            const: brcm,bcm7216-pcie
117    then:
118      properties:
119        resets:
120          items:
121            - description: phandle pointing to the RESCAL reset controller
122
123        reset-names:
124          items:
125            - const: rescal
126
127      required:
128        - resets
129        - reset-names
130
131unevaluatedProperties: false
132
133examples:
134  - |
135    #include <dt-bindings/interrupt-controller/irq.h>
136    #include <dt-bindings/interrupt-controller/arm-gic.h>
137
138    scb {
139            #address-cells = <2>;
140            #size-cells = <1>;
141            pcie0: pcie@7d500000 {
142                    compatible = "brcm,bcm2711-pcie";
143                    reg = <0x0 0x7d500000 0x9310>;
144                    device_type = "pci";
145                    #address-cells = <3>;
146                    #size-cells = <2>;
147                    #interrupt-cells = <1>;
148                    interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
149                                 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
150                    interrupt-names = "pcie", "msi";
151                    interrupt-map-mask = <0x0 0x0 0x0 0x7>;
152                    interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
153                    msi-parent = <&pcie0>;
154                    msi-controller;
155                    ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
156                    dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,
157                                 <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>;
158                    brcm,enable-ssc;
159                    brcm,scb-sizes =  <0x0000000080000000 0x0000000080000000>;
160            };
161    };
162