10956dcb8SJim Quinlan# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 20956dcb8SJim Quinlan%YAML 1.2 30956dcb8SJim Quinlan--- 40956dcb8SJim Quinlan$id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml# 50956dcb8SJim Quinlan$schema: http://devicetree.org/meta-schemas/core.yaml# 60956dcb8SJim Quinlan 7*dd3cb467SAndrew Lunntitle: Brcmstb PCIe Host Controller 80956dcb8SJim Quinlan 90956dcb8SJim Quinlanmaintainers: 100956dcb8SJim Quinlan - Nicolas Saenz Julienne <nsaenzjulienne@suse.de> 110956dcb8SJim Quinlan 120956dcb8SJim Quinlanproperties: 130956dcb8SJim Quinlan compatible: 14e6f98b29SJim Quinlan items: 15e6f98b29SJim Quinlan - enum: 16e6f98b29SJim Quinlan - brcm,bcm2711-pcie # The Raspberry Pi 4 17f435ce7eSRafał Miłecki - brcm,bcm4908-pcie 18e6f98b29SJim Quinlan - brcm,bcm7211-pcie # Broadcom STB version of RPi4 19e6f98b29SJim Quinlan - brcm,bcm7278-pcie # Broadcom 7278 Arm 20e6f98b29SJim Quinlan - brcm,bcm7216-pcie # Broadcom 7216 Arm 21e6f98b29SJim Quinlan - brcm,bcm7445-pcie # Broadcom 7445 Arm 22145790e5SJim Quinlan - brcm,bcm7425-pcie # Broadcom 7425 MIPs 23145790e5SJim Quinlan - brcm,bcm7435-pcie # Broadcom 7435 MIPs 240956dcb8SJim Quinlan 250956dcb8SJim Quinlan reg: 260956dcb8SJim Quinlan maxItems: 1 270956dcb8SJim Quinlan 280956dcb8SJim Quinlan interrupts: 290956dcb8SJim Quinlan minItems: 1 300956dcb8SJim Quinlan items: 310956dcb8SJim Quinlan - description: PCIe host controller 320956dcb8SJim Quinlan - description: builtin MSI controller 330956dcb8SJim Quinlan 340956dcb8SJim Quinlan interrupt-names: 350956dcb8SJim Quinlan minItems: 1 360956dcb8SJim Quinlan items: 370956dcb8SJim Quinlan - const: pcie 380956dcb8SJim Quinlan - const: msi 390956dcb8SJim Quinlan 400956dcb8SJim Quinlan ranges: 41e6f98b29SJim Quinlan minItems: 1 42e6f98b29SJim Quinlan maxItems: 4 430956dcb8SJim Quinlan 440956dcb8SJim Quinlan dma-ranges: 45e6f98b29SJim Quinlan minItems: 1 46e6f98b29SJim Quinlan maxItems: 6 470956dcb8SJim Quinlan 480956dcb8SJim Quinlan clocks: 490956dcb8SJim Quinlan maxItems: 1 500956dcb8SJim Quinlan 510956dcb8SJim Quinlan clock-names: 520956dcb8SJim Quinlan items: 530956dcb8SJim Quinlan - const: sw_pcie 540956dcb8SJim Quinlan 550956dcb8SJim Quinlan msi-controller: 560956dcb8SJim Quinlan description: Identifies the node as an MSI controller. 570956dcb8SJim Quinlan 580956dcb8SJim Quinlan msi-parent: 590956dcb8SJim Quinlan description: MSI controller the device is capable of using. 600956dcb8SJim Quinlan 610956dcb8SJim Quinlan brcm,enable-ssc: 620956dcb8SJim Quinlan description: Indicates usage of spread-spectrum clocking. 630956dcb8SJim Quinlan type: boolean 640956dcb8SJim Quinlan 65420c517bSJim Quinlan aspm-no-l0s: true 66420c517bSJim Quinlan 67e6f98b29SJim Quinlan brcm,scb-sizes: 68e6f98b29SJim Quinlan description: u64 giving the 64bit PCIe memory 69e6f98b29SJim Quinlan viewport size of a memory controller. There may be up to 70e6f98b29SJim Quinlan three controllers, and each size must be a power of two 71e6f98b29SJim Quinlan with a size greater or equal to the amount of memory the 72e6f98b29SJim Quinlan controller supports. Note that each memory controller 73e6f98b29SJim Quinlan may have two component regions -- base and extended -- so 74e6f98b29SJim Quinlan this information cannot be deduced from the dma-ranges. 75e6f98b29SJim Quinlan $ref: /schemas/types.yaml#/definitions/uint64-array 76e6f98b29SJim Quinlan items: 77e6f98b29SJim Quinlan minItems: 1 78e6f98b29SJim Quinlan maxItems: 3 79e6f98b29SJim Quinlan 800956dcb8SJim Quinlanrequired: 815e8a7d26SFlorian Fainelli - compatible 820956dcb8SJim Quinlan - reg 83e6f98b29SJim Quinlan - ranges 840956dcb8SJim Quinlan - dma-ranges 850956dcb8SJim Quinlan - "#interrupt-cells" 860956dcb8SJim Quinlan - interrupts 870956dcb8SJim Quinlan - interrupt-names 880956dcb8SJim Quinlan - interrupt-map-mask 890956dcb8SJim Quinlan - interrupt-map 900956dcb8SJim Quinlan - msi-controller 910956dcb8SJim Quinlan 92e6f98b29SJim QuinlanallOf: 93e6f98b29SJim Quinlan - $ref: /schemas/pci/pci-bus.yaml# 942e8b4b6eSMark Kettenis - $ref: /schemas/interrupt-controller/msi-controller.yaml# 95e6f98b29SJim Quinlan - if: 96e6f98b29SJim Quinlan properties: 97e6f98b29SJim Quinlan compatible: 98e6f98b29SJim Quinlan contains: 99f435ce7eSRafał Miłecki const: brcm,bcm4908-pcie 100f435ce7eSRafał Miłecki then: 101f435ce7eSRafał Miłecki properties: 102f435ce7eSRafał Miłecki resets: 103f435ce7eSRafał Miłecki items: 104f435ce7eSRafał Miłecki - description: reset controller handling the PERST# signal 105f435ce7eSRafał Miłecki 106f435ce7eSRafał Miłecki reset-names: 107f435ce7eSRafał Miłecki items: 108f435ce7eSRafał Miłecki - const: perst 109f435ce7eSRafał Miłecki 110f435ce7eSRafał Miłecki required: 111f435ce7eSRafał Miłecki - resets 112f435ce7eSRafał Miłecki - reset-names 113f435ce7eSRafał Miłecki - if: 114f435ce7eSRafał Miłecki properties: 115f435ce7eSRafał Miłecki compatible: 116f435ce7eSRafał Miłecki contains: 117e6f98b29SJim Quinlan const: brcm,bcm7216-pcie 118e6f98b29SJim Quinlan then: 119f435ce7eSRafał Miłecki properties: 120f435ce7eSRafał Miłecki resets: 121f435ce7eSRafał Miłecki items: 122f435ce7eSRafał Miłecki - description: phandle pointing to the RESCAL reset controller 123f435ce7eSRafał Miłecki 124f435ce7eSRafał Miłecki reset-names: 125f435ce7eSRafał Miłecki items: 126f435ce7eSRafał Miłecki - const: rescal 127f435ce7eSRafał Miłecki 128e6f98b29SJim Quinlan required: 129e6f98b29SJim Quinlan - resets 130e6f98b29SJim Quinlan - reset-names 131e6f98b29SJim Quinlan 1320956dcb8SJim QuinlanunevaluatedProperties: false 1330956dcb8SJim Quinlan 1340956dcb8SJim Quinlanexamples: 1350956dcb8SJim Quinlan - | 1360956dcb8SJim Quinlan #include <dt-bindings/interrupt-controller/irq.h> 1370956dcb8SJim Quinlan #include <dt-bindings/interrupt-controller/arm-gic.h> 1380956dcb8SJim Quinlan 1390956dcb8SJim Quinlan scb { 1400956dcb8SJim Quinlan #address-cells = <2>; 1410956dcb8SJim Quinlan #size-cells = <1>; 1420956dcb8SJim Quinlan pcie0: pcie@7d500000 { 1430956dcb8SJim Quinlan compatible = "brcm,bcm2711-pcie"; 1440956dcb8SJim Quinlan reg = <0x0 0x7d500000 0x9310>; 1450956dcb8SJim Quinlan device_type = "pci"; 1460956dcb8SJim Quinlan #address-cells = <3>; 1470956dcb8SJim Quinlan #size-cells = <2>; 1480956dcb8SJim Quinlan #interrupt-cells = <1>; 149504253e4SJim Quinlan interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 1500956dcb8SJim Quinlan <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1510956dcb8SJim Quinlan interrupt-names = "pcie", "msi"; 1520956dcb8SJim Quinlan interrupt-map-mask = <0x0 0x0 0x0 0x7>; 153504253e4SJim Quinlan interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH 154504253e4SJim Quinlan 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH 155504253e4SJim Quinlan 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH 156504253e4SJim Quinlan 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 157504253e4SJim Quinlan 1580956dcb8SJim Quinlan msi-parent = <&pcie0>; 1590956dcb8SJim Quinlan msi-controller; 1600956dcb8SJim Quinlan ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>; 161e6f98b29SJim Quinlan dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>, 162e6f98b29SJim Quinlan <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>; 1630956dcb8SJim Quinlan brcm,enable-ssc; 164e6f98b29SJim Quinlan brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>; 165ea372f45SJim Quinlan 166ea372f45SJim Quinlan /* PCIe bridge, Root Port */ 167ea372f45SJim Quinlan pci@0,0 { 168ea372f45SJim Quinlan #address-cells = <3>; 169ea372f45SJim Quinlan #size-cells = <2>; 170ea372f45SJim Quinlan reg = <0x0 0x0 0x0 0x0 0x0>; 171ea372f45SJim Quinlan compatible = "pciclass,0604"; 172ea372f45SJim Quinlan device_type = "pci"; 173ea372f45SJim Quinlan vpcie3v3-supply = <&vreg7>; 174ea372f45SJim Quinlan ranges; 175ea372f45SJim Quinlan 176ea372f45SJim Quinlan /* PCIe endpoint */ 177ea372f45SJim Quinlan pci-ep@0,0 { 178ea372f45SJim Quinlan assigned-addresses = 179ea372f45SJim Quinlan <0x82010000 0x0 0xf8000000 0x6 0x00000000 0x0 0x2000>; 180ea372f45SJim Quinlan reg = <0x0 0x0 0x0 0x0 0x0>; 181ea372f45SJim Quinlan compatible = "pci14e4,1688"; 182ea372f45SJim Quinlan }; 183ea372f45SJim Quinlan }; 1840956dcb8SJim Quinlan }; 1850956dcb8SJim Quinlan }; 186