1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Reduced Pin Count Interface (RPC-IF)
8
9maintainers:
10  - Sergei Shtylyov <sergei.shtylyov@gmail.com>
11
12description: |
13  Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
14  be accessed via the external address space read mode or the manual mode.
15
16  The flash chip itself should be represented by a subnode of the RPC-IF node.
17  The flash interface is selected based on the "compatible" property of this
18  subnode:
19  - if it contains "jedec,spi-nor", then SPI is used;
20  - if it contains "cfi-flash", then HyperFlash is used.
21
22allOf:
23  - $ref: "/schemas/spi/spi-controller.yaml#"
24
25properties:
26  compatible:
27    items:
28      - enum:
29          - renesas,r8a774a1-rpc-if       # RZ/G2M
30          - renesas,r8a774b1-rpc-if       # RZ/G2N
31          - renesas,r8a774c0-rpc-if       # RZ/G2E
32          - renesas,r8a774e1-rpc-if       # RZ/G2H
33          - renesas,r8a77970-rpc-if       # R-Car V3M
34          - renesas,r8a77980-rpc-if       # R-Car V3H
35          - renesas,r8a77995-rpc-if       # R-Car D3
36      - const: renesas,rcar-gen3-rpc-if   # a generic R-Car gen3 or RZ/G2 device
37
38  reg:
39    items:
40      - description: RPC-IF registers
41      - description: direct mapping read mode area
42      - description: write buffer area
43
44  reg-names:
45    items:
46      - const: regs
47      - const: dirmap
48      - const: wbuf
49
50  clocks:
51    maxItems: 1
52
53  power-domains:
54    maxItems: 1
55
56  resets:
57    maxItems: 1
58
59patternProperties:
60  "flash@[0-9a-f]+$":
61    type: object
62    properties:
63      compatible:
64        enum:
65          - cfi-flash
66          - jedec,spi-nor
67
68unevaluatedProperties: false
69
70examples:
71  - |
72    #include <dt-bindings/clock/renesas-cpg-mssr.h>
73    #include <dt-bindings/power/r8a77995-sysc.h>
74
75    spi@ee200000 {
76      compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
77      reg = <0xee200000 0x200>,
78            <0x08000000 0x4000000>,
79            <0xee208000 0x100>;
80      reg-names = "regs", "dirmap", "wbuf";
81      clocks = <&cpg CPG_MOD 917>;
82      power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
83      resets = <&cpg 917>;
84      #address-cells = <1>;
85      #size-cells = <0>;
86
87      flash@0 {
88        compatible = "jedec,spi-nor";
89        reg = <0>;
90        spi-max-frequency = <40000000>;
91        spi-tx-bus-width = <1>;
92        spi-rx-bus-width = <1>;
93      };
94    };
95