1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas Reduced Pin Count Interface (RPC-IF) 8 9maintainers: 10 - Sergei Shtylyov <sergei.shtylyov@gmail.com> 11 12description: | 13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to 14 be accessed via the external address space read mode or the manual mode. 15 16 The flash chip itself should be represented by a subnode of the RPC-IF node. 17 The flash interface is selected based on the "compatible" property of this 18 subnode: 19 - if it contains "jedec,spi-nor", then SPI is used; 20 - if it contains "cfi-flash", then HyperFlash is used. 21 22allOf: 23 - $ref: /schemas/spi/spi-controller.yaml# 24 25properties: 26 compatible: 27 oneOf: 28 - items: 29 - enum: 30 - renesas,r8a774a1-rpc-if # RZ/G2M 31 - renesas,r8a774b1-rpc-if # RZ/G2N 32 - renesas,r8a774c0-rpc-if # RZ/G2E 33 - renesas,r8a774e1-rpc-if # RZ/G2H 34 - renesas,r8a7795-rpc-if # R-Car H3 35 - renesas,r8a7796-rpc-if # R-Car M3-W 36 - renesas,r8a77961-rpc-if # R-Car M3-W+ 37 - renesas,r8a77965-rpc-if # R-Car M3-N 38 - renesas,r8a77970-rpc-if # R-Car V3M 39 - renesas,r8a77980-rpc-if # R-Car V3H 40 - renesas,r8a77990-rpc-if # R-Car E3 41 - renesas,r8a77995-rpc-if # R-Car D3 42 - renesas,r8a779a0-rpc-if # R-Car V3U 43 - const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 or RZ/G2{E,H,M,N} device 44 45 - items: 46 - enum: 47 - renesas,r8a779g0-rpc-if # R-Car V4H 48 - const: renesas,rcar-gen4-rpc-if # a generic R-Car gen4 device 49 50 - items: 51 - enum: 52 - renesas,r9a07g043-rpc-if # RZ/G2UL 53 - renesas,r9a07g044-rpc-if # RZ/G2{L,LC} 54 - renesas,r9a07g054-rpc-if # RZ/V2L 55 - const: renesas,rzg2l-rpc-if 56 57 reg: 58 items: 59 - description: RPC-IF registers 60 - description: direct mapping read mode area 61 - description: write buffer area 62 63 reg-names: 64 items: 65 - const: regs 66 - const: dirmap 67 - const: wbuf 68 69 clocks: true 70 71 interrupts: 72 maxItems: 1 73 74 power-domains: 75 maxItems: 1 76 77 resets: 78 maxItems: 1 79 80patternProperties: 81 "flash@[0-9a-f]+$": 82 type: object 83 properties: 84 compatible: 85 contains: 86 enum: 87 - cfi-flash 88 - jedec,spi-nor 89 90required: 91 - compatible 92 - reg 93 - reg-names 94 - clocks 95 - power-domains 96 - resets 97 - '#address-cells' 98 - '#size-cells' 99 100if: 101 properties: 102 compatible: 103 contains: 104 enum: 105 - renesas,rzg2l-rpc-if 106then: 107 properties: 108 clocks: 109 items: 110 - description: SPI Multi IO Register access clock (SPI_CLK2) 111 - description: SPI Multi IO Main clock (SPI_CLK). 112 113else: 114 properties: 115 clocks: 116 maxItems: 1 117 118unevaluatedProperties: false 119 120examples: 121 - | 122 #include <dt-bindings/clock/renesas-cpg-mssr.h> 123 #include <dt-bindings/power/r8a77995-sysc.h> 124 125 spi@ee200000 { 126 compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if"; 127 reg = <0xee200000 0x200>, 128 <0x08000000 0x4000000>, 129 <0xee208000 0x100>; 130 reg-names = "regs", "dirmap", "wbuf"; 131 clocks = <&cpg CPG_MOD 917>; 132 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 133 resets = <&cpg 917>; 134 #address-cells = <1>; 135 #size-cells = <0>; 136 137 flash@0 { 138 compatible = "jedec,spi-nor"; 139 reg = <0>; 140 spi-max-frequency = <40000000>; 141 spi-tx-bus-width = <1>; 142 spi-rx-bus-width = <1>; 143 }; 144 }; 145