1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Reduced Pin Count Interface (RPC-IF)
8
9maintainers:
10  - Sergei Shtylyov <sergei.shtylyov@gmail.com>
11
12description: |
13  Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
14  be accessed via the external address space read mode or the manual mode.
15
16  The flash chip itself should be represented by a subnode of the RPC-IF node.
17  The flash interface is selected based on the "compatible" property of this
18  subnode:
19  - if it contains "jedec,spi-nor", then SPI is used;
20  - if it contains "cfi-flash", then HyperFlash is used.
21
22allOf:
23  - $ref: "/schemas/spi/spi-controller.yaml#"
24
25properties:
26  compatible:
27    oneOf:
28      - items:
29          - enum:
30              - renesas,r8a774a1-rpc-if       # RZ/G2M
31              - renesas,r8a774b1-rpc-if       # RZ/G2N
32              - renesas,r8a774c0-rpc-if       # RZ/G2E
33              - renesas,r8a774e1-rpc-if       # RZ/G2H
34              - renesas,r8a7795-rpc-if        # R-Car H3
35              - renesas,r8a7796-rpc-if        # R-Car M3-W
36              - renesas,r8a77961-rpc-if       # R-Car M3-W+
37              - renesas,r8a77965-rpc-if       # R-Car M3-N
38              - renesas,r8a77970-rpc-if       # R-Car V3M
39              - renesas,r8a77980-rpc-if       # R-Car V3H
40              - renesas,r8a77990-rpc-if       # R-Car E3
41              - renesas,r8a77995-rpc-if       # R-Car D3
42              - renesas,r8a779a0-rpc-if       # R-Car V3U
43          - const: renesas,rcar-gen3-rpc-if   # a generic R-Car gen3 or RZ/G2{E,H,M,N} device
44
45      - items:
46          - enum:
47              - renesas,r9a07g044-rpc-if      # RZ/G2{L,LC}
48              - renesas,r9a07g054-rpc-if      # RZ/V2L
49          - const: renesas,rzg2l-rpc-if
50
51  reg:
52    items:
53      - description: RPC-IF registers
54      - description: direct mapping read mode area
55      - description: write buffer area
56
57  reg-names:
58    items:
59      - const: regs
60      - const: dirmap
61      - const: wbuf
62
63  clocks: true
64
65  interrupts:
66    maxItems: 1
67
68  power-domains:
69    maxItems: 1
70
71  resets:
72    maxItems: 1
73
74patternProperties:
75  "flash@[0-9a-f]+$":
76    type: object
77    properties:
78      compatible:
79        contains:
80          enum:
81            - cfi-flash
82            - jedec,spi-nor
83
84required:
85  - compatible
86  - reg
87  - reg-names
88  - clocks
89  - power-domains
90  - resets
91  - '#address-cells'
92  - '#size-cells'
93
94if:
95  properties:
96    compatible:
97      contains:
98        enum:
99          - renesas,rzg2l-rpc-if
100then:
101  properties:
102    clocks:
103      items:
104        - description: SPI Multi IO Register access clock (SPI_CLK2)
105        - description: SPI Multi IO Main clock (SPI_CLK).
106
107else:
108  properties:
109    clocks:
110      maxItems: 1
111
112unevaluatedProperties: false
113
114examples:
115  - |
116    #include <dt-bindings/clock/renesas-cpg-mssr.h>
117    #include <dt-bindings/power/r8a77995-sysc.h>
118
119    spi@ee200000 {
120      compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
121      reg = <0xee200000 0x200>,
122            <0x08000000 0x4000000>,
123            <0xee208000 0x100>;
124      reg-names = "regs", "dirmap", "wbuf";
125      clocks = <&cpg CPG_MOD 917>;
126      power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
127      resets = <&cpg 917>;
128      #address-cells = <1>;
129      #size-cells = <0>;
130
131      flash@0 {
132        compatible = "jedec,spi-nor";
133        reg = <0>;
134        spi-max-frequency = <40000000>;
135        spi-tx-bus-width = <1>;
136        spi-rx-bus-width = <1>;
137      };
138    };
139