1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Reduced Pin Count Interface (RPC-IF)
8
9maintainers:
10  - Sergei Shtylyov <sergei.shtylyov@gmail.com>
11
12description: |
13  Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
14  be accessed via the external address space read mode or the manual mode.
15
16  The flash chip itself should be represented by a subnode of the RPC-IF node.
17  The flash interface is selected based on the "compatible" property of this
18  subnode:
19  - if it contains "jedec,spi-nor", then SPI is used;
20  - if it contains "cfi-flash", then HyperFlash is used.
21
22allOf:
23  - $ref: "/schemas/spi/spi-controller.yaml#"
24
25properties:
26  compatible:
27    oneOf:
28      - items:
29          - enum:
30              - renesas,r8a774a1-rpc-if       # RZ/G2M
31              - renesas,r8a774b1-rpc-if       # RZ/G2N
32              - renesas,r8a774c0-rpc-if       # RZ/G2E
33              - renesas,r8a774e1-rpc-if       # RZ/G2H
34              - renesas,r8a77970-rpc-if       # R-Car V3M
35              - renesas,r8a77980-rpc-if       # R-Car V3H
36              - renesas,r8a77995-rpc-if       # R-Car D3
37              - renesas,r8a779a0-rpc-if       # R-Car V3U
38          - const: renesas,rcar-gen3-rpc-if   # a generic R-Car gen3 or RZ/G2{E,H,M,N} device
39
40      - items:
41          - enum:
42              - renesas,r9a07g043-rpc-if      # RZ/G2UL
43              - renesas,r9a07g044-rpc-if      # RZ/G2{L,LC}
44              - renesas,r9a07g054-rpc-if      # RZ/V2L
45          - const: renesas,rzg2l-rpc-if
46
47  reg:
48    items:
49      - description: RPC-IF registers
50      - description: direct mapping read mode area
51      - description: write buffer area
52
53  reg-names:
54    items:
55      - const: regs
56      - const: dirmap
57      - const: wbuf
58
59  clocks: true
60
61  interrupts:
62    maxItems: 1
63
64  power-domains:
65    maxItems: 1
66
67  resets:
68    maxItems: 1
69
70patternProperties:
71  "flash@[0-9a-f]+$":
72    type: object
73    properties:
74      compatible:
75        contains:
76          enum:
77            - cfi-flash
78            - jedec,spi-nor
79
80required:
81  - compatible
82  - reg
83  - reg-names
84  - clocks
85  - power-domains
86  - resets
87  - '#address-cells'
88  - '#size-cells'
89
90if:
91  properties:
92    compatible:
93      contains:
94        enum:
95          - renesas,rzg2l-rpc-if
96then:
97  properties:
98    clocks:
99      items:
100        - description: SPI Multi IO Register access clock (SPI_CLK2)
101        - description: SPI Multi IO Main clock (SPI_CLK).
102
103else:
104  properties:
105    clocks:
106      maxItems: 1
107
108unevaluatedProperties: false
109
110examples:
111  - |
112    #include <dt-bindings/clock/renesas-cpg-mssr.h>
113    #include <dt-bindings/power/r8a77995-sysc.h>
114
115    spi@ee200000 {
116      compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
117      reg = <0xee200000 0x200>,
118            <0x08000000 0x4000000>,
119            <0xee208000 0x100>;
120      reg-names = "regs", "dirmap", "wbuf";
121      clocks = <&cpg CPG_MOD 917>;
122      power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
123      resets = <&cpg 917>;
124      #address-cells = <1>;
125      #size-cells = <0>;
126
127      flash@0 {
128        compatible = "jedec,spi-nor";
129        reg = <0>;
130        spi-max-frequency = <40000000>;
131        spi-tx-bus-width = <1>;
132        spi-rx-bus-width = <1>;
133      };
134    };
135