160f9e37aSTsahee Zidenberg======================================================== 260f9e37aSTsahee ZidenbergSecondary CPU enable-method "al,alpine-smp" binding 360f9e37aSTsahee Zidenberg======================================================== 460f9e37aSTsahee Zidenberg 560f9e37aSTsahee ZidenbergThis document describes the "al,alpine-smp" method for 660f9e37aSTsahee Zidenbergenabling secondary CPUs. To apply to all CPUs, a single 760f9e37aSTsahee Zidenberg"al,alpine-smp" enable method should be defined in the 860f9e37aSTsahee Zidenberg"cpus" node. 960f9e37aSTsahee Zidenberg 1060f9e37aSTsahee ZidenbergEnable method name: "al,alpine-smp" 1160f9e37aSTsahee ZidenbergCompatible machines: "al,alpine" 1260f9e37aSTsahee ZidenbergCompatible CPUs: "arm,cortex-a15" 1360f9e37aSTsahee ZidenbergRelated properties: (none) 1460f9e37aSTsahee Zidenberg 1560f9e37aSTsahee ZidenbergNote: 1660f9e37aSTsahee ZidenbergThis enable method requires valid nodes compatible with 1760f9e37aSTsahee Zidenberg"al,alpine-cpu-resume" and "al,alpine-nb-service"[1]. 1860f9e37aSTsahee Zidenberg 1960f9e37aSTsahee ZidenbergExample: 2060f9e37aSTsahee Zidenberg 2160f9e37aSTsahee Zidenbergcpus { 2260f9e37aSTsahee Zidenberg #address-cells = <1>; 2360f9e37aSTsahee Zidenberg #size-cells = <0>; 2460f9e37aSTsahee Zidenberg enable-method = "al,alpine-smp"; 2560f9e37aSTsahee Zidenberg 2660f9e37aSTsahee Zidenberg cpu@0 { 2760f9e37aSTsahee Zidenberg compatible = "arm,cortex-a15"; 2860f9e37aSTsahee Zidenberg device_type = "cpu"; 2960f9e37aSTsahee Zidenberg reg = <0>; 3060f9e37aSTsahee Zidenberg }; 3160f9e37aSTsahee Zidenberg 3260f9e37aSTsahee Zidenberg cpu@1 { 3360f9e37aSTsahee Zidenberg compatible = "arm,cortex-a15"; 3460f9e37aSTsahee Zidenberg device_type = "cpu"; 3560f9e37aSTsahee Zidenberg reg = <1>; 3660f9e37aSTsahee Zidenberg }; 3760f9e37aSTsahee Zidenberg 3860f9e37aSTsahee Zidenberg cpu@2 { 3960f9e37aSTsahee Zidenberg compatible = "arm,cortex-a15"; 4060f9e37aSTsahee Zidenberg device_type = "cpu"; 4160f9e37aSTsahee Zidenberg reg = <2>; 4260f9e37aSTsahee Zidenberg }; 4360f9e37aSTsahee Zidenberg 4460f9e37aSTsahee Zidenberg cpu@3 { 4560f9e37aSTsahee Zidenberg compatible = "arm,cortex-a15"; 4660f9e37aSTsahee Zidenberg device_type = "cpu"; 4760f9e37aSTsahee Zidenberg reg = <3>; 4860f9e37aSTsahee Zidenberg }; 4960f9e37aSTsahee Zidenberg}; 5060f9e37aSTsahee Zidenberg 5160f9e37aSTsahee Zidenberg-- 5260f9e37aSTsahee Zidenberg[1] arm/al,alpine.txt 53