xref: /openbmc/linux/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp (revision 3eb66e91a25497065c5322b1268cbc3953642227)
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2 Secondary CPU enable-method "al,alpine-smp" binding
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4 
5 This document describes the "al,alpine-smp" method for
6 enabling secondary CPUs. To apply to all CPUs, a single
7 "al,alpine-smp" enable method should be defined in the
8 "cpus" node.
9 
10 Enable method name:	"al,alpine-smp"
11 Compatible machines:	"al,alpine"
12 Compatible CPUs:	"arm,cortex-a15"
13 Related properties:	(none)
14 
15 Note:
16 This enable method requires valid nodes compatible with
17 "al,alpine-cpu-resume" and "al,alpine-nb-service".
18 
19 
20 * Alpine CPU resume registers
21 
22 The CPU resume register are used to define required resume address after
23 reset.
24 
25 Properties:
26 - compatible : Should contain "al,alpine-cpu-resume".
27 - reg : Offset and length of the register set for the device
28 
29 
30 * Alpine System-Fabric Service Registers
31 
32 The System-Fabric Service Registers allow various operation on CPU and
33 system fabric, like powering CPUs off.
34 
35 Properties:
36 - compatible : Should contain "al,alpine-sysfabric-service" and "syscon".
37 - reg : Offset and length of the register set for the device
38 
39 
40 Example:
41 
42 cpus {
43 	#address-cells = <1>;
44 	#size-cells = <0>;
45 	enable-method = "al,alpine-smp";
46 
47 	cpu@0 {
48 		compatible = "arm,cortex-a15";
49 		device_type = "cpu";
50 		reg = <0>;
51 	};
52 
53 	cpu@1 {
54 		compatible = "arm,cortex-a15";
55 		device_type = "cpu";
56 		reg = <1>;
57 	};
58 
59 	cpu@2 {
60 		compatible = "arm,cortex-a15";
61 		device_type = "cpu";
62 		reg = <2>;
63 	};
64 
65 	cpu@3 {
66 		compatible = "arm,cortex-a15";
67 		device_type = "cpu";
68 		reg = <3>;
69 	};
70 };
71 
72 cpu_resume {
73 	compatible = "al,alpine-cpu-resume";
74 	reg = <0xfbff5ed0 0x30>;
75 };
76 
77 nb_service {
78         compatible = "al,alpine-sysfabric-service", "syscon";
79         reg = <0xfb070000 0x10000>;
80 };
81