12ceb3fb0SAlex ChiangWhat: /sys/devices/system/cpu/ 22ceb3fb0SAlex ChiangDate: pre-git history 32ceb3fb0SAlex ChiangContact: Linux kernel mailing list <linux-kernel@vger.kernel.org> 42ceb3fb0SAlex ChiangDescription: 52ceb3fb0SAlex Chiang A collection of both global and individual CPU attributes 62ceb3fb0SAlex Chiang 72ceb3fb0SAlex Chiang Individual CPU attributes are contained in subdirectories 82ceb3fb0SAlex Chiang named by the kernel's logical CPU number, e.g.: 92ceb3fb0SAlex Chiang 102ceb3fb0SAlex Chiang /sys/devices/system/cpu/cpu#/ 112ceb3fb0SAlex Chiang 12d93fc863SAlex ChiangWhat: /sys/devices/system/cpu/kernel_max 13d93fc863SAlex Chiang /sys/devices/system/cpu/offline 14d93fc863SAlex Chiang /sys/devices/system/cpu/online 15d93fc863SAlex Chiang /sys/devices/system/cpu/possible 16d93fc863SAlex Chiang /sys/devices/system/cpu/present 17d93fc863SAlex ChiangDate: December 2008 18d93fc863SAlex ChiangContact: Linux kernel mailing list <linux-kernel@vger.kernel.org> 19d93fc863SAlex ChiangDescription: CPU topology files that describe kernel limits related to 20d93fc863SAlex Chiang hotplug. Briefly: 21d93fc863SAlex Chiang 22d93fc863SAlex Chiang kernel_max: the maximum cpu index allowed by the kernel 23d93fc863SAlex Chiang configuration. 24d93fc863SAlex Chiang 25d93fc863SAlex Chiang offline: cpus that are not online because they have been 26d93fc863SAlex Chiang HOTPLUGGED off or exceed the limit of cpus allowed by the 27d93fc863SAlex Chiang kernel configuration (kernel_max above). 28d93fc863SAlex Chiang 29d93fc863SAlex Chiang online: cpus that are online and being scheduled. 30d93fc863SAlex Chiang 31d93fc863SAlex Chiang possible: cpus that have been allocated resources and can be 32d93fc863SAlex Chiang brought online if they are present. 33d93fc863SAlex Chiang 34d93fc863SAlex Chiang present: cpus that have been identified as being present in 35d93fc863SAlex Chiang the system. 36d93fc863SAlex Chiang 37d93fc863SAlex Chiang See Documentation/cputopology.txt for more information. 38d93fc863SAlex Chiang 39d93fc863SAlex Chiang 4012633e80SNathan FontenotWhat: /sys/devices/system/cpu/probe 4112633e80SNathan Fontenot /sys/devices/system/cpu/release 4212633e80SNathan FontenotDate: November 2009 4312633e80SNathan FontenotContact: Linux kernel mailing list <linux-kernel@vger.kernel.org> 4412633e80SNathan FontenotDescription: Dynamic addition and removal of CPU's. This is not hotplug 4512633e80SNathan Fontenot removal, this is meant complete removal/addition of the CPU 4612633e80SNathan Fontenot from the system. 4712633e80SNathan Fontenot 4812633e80SNathan Fontenot probe: writes to this file will dynamically add a CPU to the 4912633e80SNathan Fontenot system. Information written to the file to add CPU's is 5012633e80SNathan Fontenot architecture specific. 5112633e80SNathan Fontenot 5212633e80SNathan Fontenot release: writes to this file dynamically remove a CPU from 5312633e80SNathan Fontenot the system. Information writtento the file to remove CPU's 5412633e80SNathan Fontenot is architecture specific. 55657348a0SAlex Chiang 56657348a0SAlex ChiangWhat: /sys/devices/system/cpu/cpu#/node 57657348a0SAlex ChiangDate: October 2009 58657348a0SAlex ChiangContact: Linux memory management mailing list <linux-mm@kvack.org> 59657348a0SAlex ChiangDescription: Discover NUMA node a CPU belongs to 60657348a0SAlex Chiang 61657348a0SAlex Chiang When CONFIG_NUMA is enabled, a symbolic link that points 62657348a0SAlex Chiang to the corresponding NUMA node directory. 63657348a0SAlex Chiang 64657348a0SAlex Chiang For example, the following symlink is created for cpu42 65657348a0SAlex Chiang in NUMA node 2: 66657348a0SAlex Chiang 67657348a0SAlex Chiang /sys/devices/system/cpu/cpu42/node2 -> ../../node/node2 68657348a0SAlex Chiang 69657348a0SAlex Chiang 70663fb2fcSAlex ChiangWhat: /sys/devices/system/cpu/cpu#/topology/core_id 71663fb2fcSAlex Chiang /sys/devices/system/cpu/cpu#/topology/core_siblings 72663fb2fcSAlex Chiang /sys/devices/system/cpu/cpu#/topology/core_siblings_list 73663fb2fcSAlex Chiang /sys/devices/system/cpu/cpu#/topology/physical_package_id 74663fb2fcSAlex Chiang /sys/devices/system/cpu/cpu#/topology/thread_siblings 75663fb2fcSAlex Chiang /sys/devices/system/cpu/cpu#/topology/thread_siblings_list 76663fb2fcSAlex ChiangDate: December 2008 77663fb2fcSAlex ChiangContact: Linux kernel mailing list <linux-kernel@vger.kernel.org> 78663fb2fcSAlex ChiangDescription: CPU topology files that describe a logical CPU's relationship 79663fb2fcSAlex Chiang to other cores and threads in the same physical package. 80663fb2fcSAlex Chiang 81663fb2fcSAlex Chiang One cpu# directory is created per logical CPU in the system, 82663fb2fcSAlex Chiang e.g. /sys/devices/system/cpu/cpu42/. 83663fb2fcSAlex Chiang 84663fb2fcSAlex Chiang Briefly, the files above are: 85663fb2fcSAlex Chiang 86663fb2fcSAlex Chiang core_id: the CPU core ID of cpu#. Typically it is the 87663fb2fcSAlex Chiang hardware platform's identifier (rather than the kernel's). 88663fb2fcSAlex Chiang The actual value is architecture and platform dependent. 89663fb2fcSAlex Chiang 90663fb2fcSAlex Chiang core_siblings: internal kernel map of cpu#'s hardware threads 91663fb2fcSAlex Chiang within the same physical_package_id. 92663fb2fcSAlex Chiang 93663fb2fcSAlex Chiang core_siblings_list: human-readable list of the logical CPU 94663fb2fcSAlex Chiang numbers within the same physical_package_id as cpu#. 95663fb2fcSAlex Chiang 96663fb2fcSAlex Chiang physical_package_id: physical package id of cpu#. Typically 97663fb2fcSAlex Chiang corresponds to a physical socket number, but the actual value 98663fb2fcSAlex Chiang is architecture and platform dependent. 99663fb2fcSAlex Chiang 100663fb2fcSAlex Chiang thread_siblings: internel kernel map of cpu#'s hardware 101663fb2fcSAlex Chiang threads within the same core as cpu# 102663fb2fcSAlex Chiang 103663fb2fcSAlex Chiang thread_siblings_list: human-readable list of cpu#'s hardware 104663fb2fcSAlex Chiang threads within the same core as cpu# 105663fb2fcSAlex Chiang 106663fb2fcSAlex Chiang See Documentation/cputopology.txt for more information. 107663fb2fcSAlex Chiang 108663fb2fcSAlex Chiang 109c1fb5c47SAlex ChiangWhat: /sys/devices/system/cpu/cpuidle/current_driver 110c1fb5c47SAlex Chiang /sys/devices/system/cpu/cpuidle/current_governer_ro 111c1fb5c47SAlex ChiangDate: September 2007 112c1fb5c47SAlex ChiangContact: Linux kernel mailing list <linux-kernel@vger.kernel.org> 113c1fb5c47SAlex ChiangDescription: Discover cpuidle policy and mechanism 114c1fb5c47SAlex Chiang 115c1fb5c47SAlex Chiang Various CPUs today support multiple idle levels that are 116c1fb5c47SAlex Chiang differentiated by varying exit latencies and power 117c1fb5c47SAlex Chiang consumption during idle. 118c1fb5c47SAlex Chiang 119c1fb5c47SAlex Chiang Idle policy (governor) is differentiated from idle mechanism 120c1fb5c47SAlex Chiang (driver) 121c1fb5c47SAlex Chiang 122c1fb5c47SAlex Chiang current_driver: displays current idle mechanism 123c1fb5c47SAlex Chiang 124c1fb5c47SAlex Chiang current_governor_ro: displays current idle policy 125c1fb5c47SAlex Chiang 126c1fb5c47SAlex Chiang See files in Documentation/cpuidle/ for more information. 127c1fb5c47SAlex Chiang 128c1fb5c47SAlex Chiang 1290cda8b91SAlex ChiangWhat: /sys/devices/system/cpu/cpu#/cpufreq/* 1300cda8b91SAlex ChiangDate: pre-git history 131dec102aaSViresh KumarContact: linux-pm@vger.kernel.org 1320cda8b91SAlex ChiangDescription: Discover and change clock speed of CPUs 1330cda8b91SAlex Chiang 1340cda8b91SAlex Chiang Clock scaling allows you to change the clock speed of the 1350cda8b91SAlex Chiang CPUs on the fly. This is a nice method to save battery 1360cda8b91SAlex Chiang power, because the lower the clock speed, the less power 1370cda8b91SAlex Chiang the CPU consumes. 1380cda8b91SAlex Chiang 1390cda8b91SAlex Chiang There are many knobs to tweak in this directory. 1400cda8b91SAlex Chiang 1410cda8b91SAlex Chiang See files in Documentation/cpu-freq/ for more information. 1420cda8b91SAlex Chiang 1430cda8b91SAlex Chiang In particular, read Documentation/cpu-freq/user-guide.txt 1440cda8b91SAlex Chiang to learn how to control the knobs. 1450cda8b91SAlex Chiang 1460cda8b91SAlex Chiang 147f4fd3797SLan TianyuWhat: /sys/devices/system/cpu/cpu#/cpufreq/freqdomain_cpus 148f4fd3797SLan TianyuDate: June 2013 149dec102aaSViresh KumarContact: linux-pm@vger.kernel.org 150f4fd3797SLan TianyuDescription: Discover CPUs in the same CPU frequency coordination domain 151f4fd3797SLan Tianyu 152f4fd3797SLan Tianyu freqdomain_cpus is the list of CPUs (online+offline) that share 153f4fd3797SLan Tianyu the same clock/freq domain (possibly at the hardware level). 154f4fd3797SLan Tianyu That information may be hidden from the cpufreq core and the 155f4fd3797SLan Tianyu value of related_cpus may be different from freqdomain_cpus. This 156f4fd3797SLan Tianyu attribute is useful for user space DVFS controllers to get better 157f4fd3797SLan Tianyu power/performance results for platforms using acpi-cpufreq. 158f4fd3797SLan Tianyu 159f4fd3797SLan Tianyu This file is only present if the acpi-cpufreq driver is in use. 160f4fd3797SLan Tianyu 161f4fd3797SLan Tianyu 162eecaaba5SBorislav PetkovWhat: /sys/devices/system/cpu/cpu*/cache/index3/cache_disable_{0,1} 163468727abSAlex ChiangDate: August 2008 164468727abSAlex ChiangKernelVersion: 2.6.27 165eecaaba5SBorislav PetkovContact: discuss@x86-64.org 166eecaaba5SBorislav PetkovDescription: Disable L3 cache indices 167468727abSAlex Chiang 168eecaaba5SBorislav Petkov These files exist in every CPU's cache/index3 directory. Each 169eecaaba5SBorislav Petkov cache_disable_{0,1} file corresponds to one disable slot which 170eecaaba5SBorislav Petkov can be used to disable a cache index. Reading from these files 171eecaaba5SBorislav Petkov on a processor with this functionality will return the currently 172eecaaba5SBorislav Petkov disabled index for that node. There is one L3 structure per 173eecaaba5SBorislav Petkov node, or per internal node on MCM machines. Writing a valid 174eecaaba5SBorislav Petkov index to one of these files will cause the specificed cache 175eecaaba5SBorislav Petkov index to be disabled. 176eecaaba5SBorislav Petkov 177eecaaba5SBorislav Petkov All AMD processors with L3 caches provide this functionality. 178eecaaba5SBorislav Petkov For details, see BKDGs at 179eecaaba5SBorislav Petkov http://developer.amd.com/documentation/guides/Pages/default.aspx 180615b7300SAndre Przywara 181615b7300SAndre Przywara 182615b7300SAndre PrzywaraWhat: /sys/devices/system/cpu/cpufreq/boost 183615b7300SAndre PrzywaraDate: August 2012 184615b7300SAndre PrzywaraContact: Linux kernel mailing list <linux-kernel@vger.kernel.org> 185615b7300SAndre PrzywaraDescription: Processor frequency boosting control 186615b7300SAndre Przywara 187615b7300SAndre Przywara This switch controls the boost setting for the whole system. 188615b7300SAndre Przywara Boosting allows the CPU and the firmware to run at a frequency 189615b7300SAndre Przywara beyound it's nominal limit. 190615b7300SAndre Przywara More details can be found in Documentation/cpu-freq/boost.txt 191c4fd675fSZhang Yanfei 192c4fd675fSZhang Yanfei 193c4fd675fSZhang YanfeiWhat: /sys/devices/system/cpu/cpu#/crash_notes 194c4fd675fSZhang Yanfei /sys/devices/system/cpu/cpu#/crash_notes_size 195c4fd675fSZhang YanfeiDate: April 2013 196c4fd675fSZhang YanfeiContact: kexec@lists.infradead.org 197c4fd675fSZhang YanfeiDescription: address and size of the percpu note. 198c4fd675fSZhang Yanfei 199c4fd675fSZhang Yanfei crash_notes: the physical address of the memory that holds the 200c4fd675fSZhang Yanfei note of cpu#. 201c4fd675fSZhang Yanfei 202c4fd675fSZhang Yanfei crash_notes_size: size of the note of cpu#. 203fbe299e0SRamkumar Ramachandra 204fbe299e0SRamkumar Ramachandra 205fbe299e0SRamkumar RamachandraWhat: /sys/devices/system/cpu/intel_pstate/max_perf_pct 206fbe299e0SRamkumar Ramachandra /sys/devices/system/cpu/intel_pstate/min_perf_pct 207fbe299e0SRamkumar Ramachandra /sys/devices/system/cpu/intel_pstate/no_turbo 208fbe299e0SRamkumar RamachandraDate: February 2013 209fbe299e0SRamkumar RamachandraContact: linux-pm@vger.kernel.org 210fbe299e0SRamkumar RamachandraDescription: Parameters for the Intel P-state driver 211fbe299e0SRamkumar Ramachandra 212fbe299e0SRamkumar Ramachandra Logic for selecting the current P-state in Intel 213fbe299e0SRamkumar Ramachandra Sandybridge+ processors. The three knobs control 214fbe299e0SRamkumar Ramachandra limits for the P-state that will be requested by the 215fbe299e0SRamkumar Ramachandra driver. 216fbe299e0SRamkumar Ramachandra 217fbe299e0SRamkumar Ramachandra max_perf_pct: limits the maximum P state that will be requested by 218fbe299e0SRamkumar Ramachandra the driver stated as a percentage of the available performance. 219fbe299e0SRamkumar Ramachandra 220fbe299e0SRamkumar Ramachandra min_perf_pct: limits the minimum P state that will be requested by 221fbe299e0SRamkumar Ramachandra the driver stated as a percentage of the available performance. 222fbe299e0SRamkumar Ramachandra 223fbe299e0SRamkumar Ramachandra no_turbo: limits the driver to selecting P states below the turbo 224fbe299e0SRamkumar Ramachandra frequency range. 225fbe299e0SRamkumar Ramachandra 226fbe299e0SRamkumar Ramachandra More details can be found in Documentation/cpu-freq/intel-pstate.txt 227246246cbSSudeep Holla 228246246cbSSudeep HollaWhat: /sys/devices/system/cpu/cpu*/cache/index*/<set_of_attributes_mentioned_below> 229246246cbSSudeep HollaDate: July 2014(documented, existed before August 2008) 230246246cbSSudeep HollaContact: Sudeep Holla <sudeep.holla@arm.com> 231246246cbSSudeep Holla Linux kernel mailing list <linux-kernel@vger.kernel.org> 232246246cbSSudeep HollaDescription: Parameters for the CPU cache attributes 233246246cbSSudeep Holla 234246246cbSSudeep Holla allocation_policy: 235246246cbSSudeep Holla - WriteAllocate: allocate a memory location to a cache line 236246246cbSSudeep Holla on a cache miss because of a write 237246246cbSSudeep Holla - ReadAllocate: allocate a memory location to a cache line 238246246cbSSudeep Holla on a cache miss because of a read 239246246cbSSudeep Holla - ReadWriteAllocate: both writeallocate and readallocate 240246246cbSSudeep Holla 241246246cbSSudeep Holla attributes: LEGACY used only on IA64 and is same as write_policy 242246246cbSSudeep Holla 243246246cbSSudeep Holla coherency_line_size: the minimum amount of data in bytes that gets 244246246cbSSudeep Holla transferred from memory to cache 245246246cbSSudeep Holla 2462539b258SWill Deacon level: the cache hierarchy in the multi-level cache configuration 247246246cbSSudeep Holla 248246246cbSSudeep Holla number_of_sets: total number of sets in the cache, a set is a 249246246cbSSudeep Holla collection of cache lines with the same cache index 250246246cbSSudeep Holla 251246246cbSSudeep Holla physical_line_partition: number of physical cache line per cache tag 252246246cbSSudeep Holla 253246246cbSSudeep Holla shared_cpu_list: the list of logical cpus sharing the cache 254246246cbSSudeep Holla 255246246cbSSudeep Holla shared_cpu_map: logical cpu mask containing the list of cpus sharing 256246246cbSSudeep Holla the cache 257246246cbSSudeep Holla 258246246cbSSudeep Holla size: the total cache size in kB 259246246cbSSudeep Holla 260246246cbSSudeep Holla type: 261246246cbSSudeep Holla - Instruction: cache that only holds instructions 262246246cbSSudeep Holla - Data: cache that only caches data 263246246cbSSudeep Holla - Unified: cache that holds both data and instructions 264246246cbSSudeep Holla 265246246cbSSudeep Holla ways_of_associativity: degree of freedom in placing a particular block 266246246cbSSudeep Holla of memory in the cache 267246246cbSSudeep Holla 268246246cbSSudeep Holla write_policy: 269246246cbSSudeep Holla - WriteThrough: data is written to both the cache line 270246246cbSSudeep Holla and to the block in the lower-level memory 271246246cbSSudeep Holla - WriteBack: data is written only to the cache line and 272246246cbSSudeep Holla the modified cache line is written to main 273246246cbSSudeep Holla memory only when it is replaced 274