1 /** 2 * Describes available sections to the CPER parser. 3 * 4 * Author: Lawrence.Tang@arm.com 5 **/ 6 #include "../edk/Cper.h" 7 #include "cper-section.h" 8 #include "cper-section-arm.h" 9 #include "cper-section-generic.h" 10 #include "cper-section-ia32x64.h" 11 #include "cper-section-ipf.h" 12 #include "cper-section-memory.h" 13 #include "cper-section-pcie.h" 14 #include "cper-section-firmware.h" 15 #include "cper-section-pci-bus.h" 16 #include "cper-section-pci-dev.h" 17 #include "cper-section-dmar-generic.h" 18 #include "cper-section-dmar-vtd.h" 19 #include "cper-section-dmar-iommu.h" 20 #include "cper-section-ccix-per.h" 21 #include "cper-section-cxl-protocol.h" 22 #include "cper-section-cxl-component.h" 23 24 //Definitions of all sections available to the CPER parser. 25 CPER_SECTION_DEFINITION section_definitions[] = { 26 { &gEfiProcessorGenericErrorSectionGuid, "Processor Generic", 27 cper_section_generic_to_ir, ir_section_generic_to_cper }, 28 { &gEfiIa32X64ProcessorErrorSectionGuid, "IA32/X64", 29 cper_section_ia32x64_to_ir, ir_section_ia32x64_to_cper }, 30 { &gEfiIpfProcessorErrorSectionGuid, "IPF", NULL, NULL }, 31 { &gEfiArmProcessorErrorSectionGuid, "ARM", cper_section_arm_to_ir, 32 ir_section_arm_to_cper }, 33 { &gEfiPlatformMemoryErrorSectionGuid, "Platform Memory", 34 cper_section_platform_memory_to_ir, ir_section_memory_to_cper }, 35 { &gEfiPlatformMemoryError2SectionGuid, "Platform Memory 2", 36 cper_section_platform_memory2_to_ir, ir_section_memory2_to_cper }, 37 { &gEfiPcieErrorSectionGuid, "PCIe", cper_section_pcie_to_ir, 38 ir_section_pcie_to_cper }, 39 { &gEfiFirmwareErrorSectionGuid, "Firmware Error Record Reference", 40 cper_section_firmware_to_ir, ir_section_firmware_to_cper }, 41 { &gEfiPciBusErrorSectionGuid, "PCI/PCI-X Bus", 42 cper_section_pci_bus_to_ir, ir_section_pci_bus_to_cper }, 43 { &gEfiPciDevErrorSectionGuid, "PCI Component/Device", 44 cper_section_pci_dev_to_ir, ir_section_pci_dev_to_cper }, 45 { &gEfiDMArGenericErrorSectionGuid, "DMAr Generic", 46 cper_section_dmar_generic_to_ir, ir_section_dmar_generic_to_cper }, 47 { &gEfiDirectedIoDMArErrorSectionGuid, 48 "Intel VT for Directed I/O Specific DMAr", 49 cper_section_dmar_vtd_to_ir, ir_section_dmar_vtd_to_cper }, 50 { &gEfiIommuDMArErrorSectionGuid, "IOMMU Specific DMAr", 51 cper_section_dmar_iommu_to_ir, ir_section_dmar_iommu_to_cper }, 52 { &gEfiCcixPerLogErrorSectionGuid, "CCIX PER Log Error", 53 cper_section_ccix_per_to_ir, ir_section_ccix_per_to_cper }, 54 { &gEfiCxlProtocolErrorSectionGuid, "CXL Protocol Error", 55 cper_section_cxl_protocol_to_ir, ir_section_cxl_protocol_to_cper }, 56 { &gEfiCxlGeneralMediaErrorSectionGuid, 57 "CXL General Media Component Error", cper_section_cxl_component_to_ir, 58 ir_section_cxl_component_to_cper }, 59 { &gEfiCxlDramEventErrorSectionGuid, "CXL DRAM Component Error", 60 cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper }, 61 { &gEfiCxlMemoryModuleErrorSectionGuid, 62 "CXL Memory Module Component Error", cper_section_cxl_component_to_ir, 63 ir_section_cxl_component_to_cper }, 64 { &gEfiCxlPhysicalSwitchErrorSectionGuid, 65 "CXL Physical Switch Component Error", 66 cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper }, 67 { &gEfiCxlVirtualSwitchErrorSectionGuid, 68 "CXL Virtual Switch Component Error", 69 cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper }, 70 { &gEfiCxlMldPortErrorSectionGuid, "CXL MLD Port Component Error", 71 cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper }, 72 }; 73 const size_t section_definitions_len = 74 sizeof(section_definitions) / sizeof(CPER_SECTION_DEFINITION); 75