1*580423feSLawrence Tang /** 2*580423feSLawrence Tang * Describes available sections to the CPER parser. 3*580423feSLawrence Tang * 4*580423feSLawrence Tang * Author: Lawrence.Tang@arm.com 5*580423feSLawrence Tang **/ 6*580423feSLawrence Tang #include "../edk/Cper.h" 7*580423feSLawrence Tang #include "cper-section.h" 8*580423feSLawrence Tang #include "cper-section-arm.h" 9*580423feSLawrence Tang #include "cper-section-generic.h" 10*580423feSLawrence Tang #include "cper-section-ia32x64.h" 11*580423feSLawrence Tang #include "cper-section-ipf.h" 12*580423feSLawrence Tang #include "cper-section-memory.h" 13*580423feSLawrence Tang #include "cper-section-pcie.h" 14*580423feSLawrence Tang #include "cper-section-firmware.h" 15*580423feSLawrence Tang #include "cper-section-pci-bus.h" 16*580423feSLawrence Tang #include "cper-section-pci-dev.h" 17*580423feSLawrence Tang #include "cper-section-dmar-generic.h" 18*580423feSLawrence Tang #include "cper-section-dmar-vtd.h" 19*580423feSLawrence Tang #include "cper-section-dmar-iommu.h" 20*580423feSLawrence Tang #include "cper-section-ccix-per.h" 21*580423feSLawrence Tang #include "cper-section-cxl-protocol.h" 22*580423feSLawrence Tang #include "cper-section-cxl-component.h" 23*580423feSLawrence Tang 24*580423feSLawrence Tang //Definitions of all sections available to the CPER parser. 25*580423feSLawrence Tang CPER_SECTION_DEFINITION section_definitions[] = { 26*580423feSLawrence Tang {&gEfiProcessorGenericErrorSectionGuid, "Processor Generic", cper_section_generic_to_ir, ir_section_generic_to_cper}, 27*580423feSLawrence Tang {&gEfiIa32X64ProcessorErrorSectionGuid, "IA32/X64", cper_section_ia32x64_to_ir, ir_section_ia32x64_to_cper}, 28*580423feSLawrence Tang {&gEfiIpfProcessorErrorSectionGuid, "IPF", NULL, NULL}, 29*580423feSLawrence Tang {&gEfiArmProcessorErrorSectionGuid, "ARM", cper_section_arm_to_ir, ir_section_arm_to_cper}, 30*580423feSLawrence Tang {&gEfiPlatformMemoryErrorSectionGuid, "Platform Memory", cper_section_platform_memory_to_ir, ir_section_memory_to_cper}, 31*580423feSLawrence Tang {&gEfiPlatformMemoryError2SectionGuid, "Platform Memory 2", cper_section_platform_memory2_to_ir, ir_section_memory2_to_cper}, 32*580423feSLawrence Tang {&gEfiPcieErrorSectionGuid, "PCIe", cper_section_pcie_to_ir, ir_section_pcie_to_cper}, 33*580423feSLawrence Tang {&gEfiFirmwareErrorSectionGuid, "Firmware Error Record Reference", cper_section_firmware_to_ir, ir_section_firmware_to_cper}, 34*580423feSLawrence Tang {&gEfiPciBusErrorSectionGuid, "PCI/PCI-X Bus", cper_section_pci_bus_to_ir, ir_section_pci_bus_to_cper}, 35*580423feSLawrence Tang {&gEfiPciDevErrorSectionGuid, "PCI Component/Device", cper_section_pci_dev_to_ir, ir_section_pci_dev_to_cper}, 36*580423feSLawrence Tang {&gEfiDMArGenericErrorSectionGuid, "DMAr Generic", cper_section_dmar_generic_to_ir, ir_section_dmar_generic_to_cper}, 37*580423feSLawrence Tang {&gEfiDirectedIoDMArErrorSectionGuid, "Intel VT for Directed I/O Specific DMAr", cper_section_dmar_vtd_to_ir, ir_section_dmar_vtd_to_cper}, 38*580423feSLawrence Tang {&gEfiIommuDMArErrorSectionGuid, "IOMMU Specific DMAr", cper_section_dmar_iommu_to_ir, ir_section_dmar_iommu_to_cper}, 39*580423feSLawrence Tang {&gEfiCcixPerLogErrorSectionGuid, "CCIX PER Log Error", cper_section_ccix_per_to_ir, ir_section_ccix_per_to_cper}, 40*580423feSLawrence Tang {&gEfiCxlProtocolErrorSectionGuid, "CXL Protocol Error", cper_section_cxl_protocol_to_ir, ir_section_cxl_protocol_to_cper}, 41*580423feSLawrence Tang {&gEfiCxlGeneralMediaErrorSectionGuid, "CXL General Media Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper}, 42*580423feSLawrence Tang {&gEfiCxlDramEventErrorSectionGuid, "CXL DRAM Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper}, 43*580423feSLawrence Tang {&gEfiCxlMemoryModuleErrorSectionGuid, "CXL Memory Module Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper}, 44*580423feSLawrence Tang {&gEfiCxlPhysicalSwitchErrorSectionGuid, "CXL Physical Switch Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper}, 45*580423feSLawrence Tang {&gEfiCxlVirtualSwitchErrorSectionGuid, "CXL Virtual Switch Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper}, 46*580423feSLawrence Tang {&gEfiCxlMldPortErrorSectionGuid, "CXL MLD Port Component Error", cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper}, 47*580423feSLawrence Tang }; 48*580423feSLawrence Tang const size_t section_definitions_len = sizeof(section_definitions) / sizeof(CPER_SECTION_DEFINITION);