1580423feSLawrence Tang /** 2580423feSLawrence Tang * Describes available sections to the CPER parser. 3580423feSLawrence Tang * 4580423feSLawrence Tang * Author: Lawrence.Tang@arm.com 5580423feSLawrence Tang **/ 6580423feSLawrence Tang #include "../edk/Cper.h" 7580423feSLawrence Tang #include "cper-section.h" 8580423feSLawrence Tang #include "cper-section-arm.h" 9580423feSLawrence Tang #include "cper-section-generic.h" 10580423feSLawrence Tang #include "cper-section-ia32x64.h" 11580423feSLawrence Tang #include "cper-section-ipf.h" 12580423feSLawrence Tang #include "cper-section-memory.h" 13580423feSLawrence Tang #include "cper-section-pcie.h" 14580423feSLawrence Tang #include "cper-section-firmware.h" 15580423feSLawrence Tang #include "cper-section-pci-bus.h" 16580423feSLawrence Tang #include "cper-section-pci-dev.h" 17580423feSLawrence Tang #include "cper-section-dmar-generic.h" 18580423feSLawrence Tang #include "cper-section-dmar-vtd.h" 19580423feSLawrence Tang #include "cper-section-dmar-iommu.h" 20580423feSLawrence Tang #include "cper-section-ccix-per.h" 21580423feSLawrence Tang #include "cper-section-cxl-protocol.h" 22580423feSLawrence Tang #include "cper-section-cxl-component.h" 23*683e0550SKarthik Rajagopalan #include "cper-section-nvidia.h" 24580423feSLawrence Tang 25580423feSLawrence Tang //Definitions of all sections available to the CPER parser. 26580423feSLawrence Tang CPER_SECTION_DEFINITION section_definitions[] = { 27f8fc7052SJohn Chung { &gEfiProcessorGenericErrorSectionGuid, "Processor Generic", 28f8fc7052SJohn Chung cper_section_generic_to_ir, ir_section_generic_to_cper }, 29f8fc7052SJohn Chung { &gEfiIa32X64ProcessorErrorSectionGuid, "IA32/X64", 30f8fc7052SJohn Chung cper_section_ia32x64_to_ir, ir_section_ia32x64_to_cper }, 31580423feSLawrence Tang { &gEfiIpfProcessorErrorSectionGuid, "IPF", NULL, NULL }, 32f8fc7052SJohn Chung { &gEfiArmProcessorErrorSectionGuid, "ARM", cper_section_arm_to_ir, 33f8fc7052SJohn Chung ir_section_arm_to_cper }, 34f8fc7052SJohn Chung { &gEfiPlatformMemoryErrorSectionGuid, "Platform Memory", 35f8fc7052SJohn Chung cper_section_platform_memory_to_ir, ir_section_memory_to_cper }, 36f8fc7052SJohn Chung { &gEfiPlatformMemoryError2SectionGuid, "Platform Memory 2", 37f8fc7052SJohn Chung cper_section_platform_memory2_to_ir, ir_section_memory2_to_cper }, 38f8fc7052SJohn Chung { &gEfiPcieErrorSectionGuid, "PCIe", cper_section_pcie_to_ir, 39f8fc7052SJohn Chung ir_section_pcie_to_cper }, 40f8fc7052SJohn Chung { &gEfiFirmwareErrorSectionGuid, "Firmware Error Record Reference", 41f8fc7052SJohn Chung cper_section_firmware_to_ir, ir_section_firmware_to_cper }, 42f8fc7052SJohn Chung { &gEfiPciBusErrorSectionGuid, "PCI/PCI-X Bus", 43f8fc7052SJohn Chung cper_section_pci_bus_to_ir, ir_section_pci_bus_to_cper }, 44f8fc7052SJohn Chung { &gEfiPciDevErrorSectionGuid, "PCI Component/Device", 45f8fc7052SJohn Chung cper_section_pci_dev_to_ir, ir_section_pci_dev_to_cper }, 46f8fc7052SJohn Chung { &gEfiDMArGenericErrorSectionGuid, "DMAr Generic", 47f8fc7052SJohn Chung cper_section_dmar_generic_to_ir, ir_section_dmar_generic_to_cper }, 48f8fc7052SJohn Chung { &gEfiDirectedIoDMArErrorSectionGuid, 49f8fc7052SJohn Chung "Intel VT for Directed I/O Specific DMAr", 50f8fc7052SJohn Chung cper_section_dmar_vtd_to_ir, ir_section_dmar_vtd_to_cper }, 51f8fc7052SJohn Chung { &gEfiIommuDMArErrorSectionGuid, "IOMMU Specific DMAr", 52f8fc7052SJohn Chung cper_section_dmar_iommu_to_ir, ir_section_dmar_iommu_to_cper }, 53f8fc7052SJohn Chung { &gEfiCcixPerLogErrorSectionGuid, "CCIX PER Log Error", 54f8fc7052SJohn Chung cper_section_ccix_per_to_ir, ir_section_ccix_per_to_cper }, 55f8fc7052SJohn Chung { &gEfiCxlProtocolErrorSectionGuid, "CXL Protocol Error", 56f8fc7052SJohn Chung cper_section_cxl_protocol_to_ir, ir_section_cxl_protocol_to_cper }, 57f8fc7052SJohn Chung { &gEfiCxlGeneralMediaErrorSectionGuid, 58f8fc7052SJohn Chung "CXL General Media Component Error", cper_section_cxl_component_to_ir, 59f8fc7052SJohn Chung ir_section_cxl_component_to_cper }, 60f8fc7052SJohn Chung { &gEfiCxlDramEventErrorSectionGuid, "CXL DRAM Component Error", 61f8fc7052SJohn Chung cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper }, 62f8fc7052SJohn Chung { &gEfiCxlMemoryModuleErrorSectionGuid, 63f8fc7052SJohn Chung "CXL Memory Module Component Error", cper_section_cxl_component_to_ir, 64f8fc7052SJohn Chung ir_section_cxl_component_to_cper }, 65f8fc7052SJohn Chung { &gEfiCxlPhysicalSwitchErrorSectionGuid, 66f8fc7052SJohn Chung "CXL Physical Switch Component Error", 67f8fc7052SJohn Chung cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper }, 68f8fc7052SJohn Chung { &gEfiCxlVirtualSwitchErrorSectionGuid, 69f8fc7052SJohn Chung "CXL Virtual Switch Component Error", 70f8fc7052SJohn Chung cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper }, 71f8fc7052SJohn Chung { &gEfiCxlMldPortErrorSectionGuid, "CXL MLD Port Component Error", 72f8fc7052SJohn Chung cper_section_cxl_component_to_ir, ir_section_cxl_component_to_cper }, 73*683e0550SKarthik Rajagopalan { &gEfiNvidiaErrorSectionGuid, "NVIDIA", cper_section_nvidia_to_ir, 74*683e0550SKarthik Rajagopalan ir_section_nvidia_to_cper }, 75580423feSLawrence Tang }; 76f8fc7052SJohn Chung const size_t section_definitions_len = 77f8fc7052SJohn Chung sizeof(section_definitions) / sizeof(CPER_SECTION_DEFINITION); 78