1 // SPDX-License-Identifier: Apache-2.0
2 // Copyright (C) 2018 IBM Corp.
3
4 #include <assert.h>
5 #include <sys/mman.h>
6
7 #include "mboxd.h"
8 #include "mtd/backend.h"
9 #include "transport_mbox.h"
10
11 #include "test/mbox.h"
12 #include "test/system.h"
13
14 static const uint8_t get_info[] = {
15 0x02, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
16 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
17 };
18
19 static const uint8_t create_write_window[] = {
20 0x06, 0x01, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
21 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
22 };
23
24 static const uint8_t mark_write_dirty_middle[] = {
25 0x07, 0x02, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
26 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
27 };
28
29 static const uint8_t write_flush[] = {
30 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
31 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
32 };
33
34 static const uint8_t response[] = {
35 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
36 0x00, 0x00, 0x00, 0x00, 0x00, 0x01
37 };
38
39 static const uint8_t mark_write_dirty_left[] = {
40 0x07, 0x04, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
41 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
42 };
43
44 static const uint8_t mark_write_dirty_right[] = {
45 0x07, 0x05, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00,
46 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
47 };
48
49 static const uint8_t mark_write_dirty_all[] = {
50 0x07, 0x06, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
51 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
52 };
53
54 const uint8_t start_data[] = { 0xaa, 0x55, 0xaa };
55 const uint8_t flush_middle_data[] = { 0xaa, 0x00, 0xaa };
56 const uint8_t flush_ends_data[] = { 0x55, 0x00, 0x55 };
57 const uint8_t flush_all_data[] = { 0x01, 0x02, 0x03 };
58
59 #define MEM_SIZE sizeof(start_data)
60 #define ERASE_SIZE 1
61 #define N_WINDOWS 1
62 #define WINDOW_SIZE sizeof(start_data)
63
main(void)64 int main(void)
65 {
66 struct mbox_context *ctx;
67 uint8_t *map;
68 int rc;
69
70 system_set_reserved_size(MEM_SIZE);
71 system_set_mtd_sizes(MEM_SIZE, ERASE_SIZE);
72
73 ctx = mbox_create_test_context(N_WINDOWS, WINDOW_SIZE);
74 rc = mbox_set_mtd_data(ctx, start_data, sizeof(start_data));
75 assert(rc == 0);
76
77 rc = mbox_command_dispatch(ctx, get_info, sizeof(get_info));
78 assert(rc == 1);
79
80 rc = mbox_command_dispatch(ctx, create_write_window,
81 sizeof(create_write_window));
82 assert(rc == 1);
83
84 /* { clean, dirty, clean } */
85
86 ((uint8_t *)ctx->mem)[1] = 0x00;
87
88 rc = mbox_command_dispatch(ctx, mark_write_dirty_middle,
89 sizeof(mark_write_dirty_middle));
90 assert(rc == 1);
91
92 rc = mbox_command_dispatch(ctx, write_flush, sizeof(write_flush));
93 assert(rc == 1);
94
95 rc = mbox_cmp(ctx, response, sizeof(response));
96 assert(rc == 0);
97
98 map = mmap(NULL, MEM_SIZE, PROT_READ, MAP_PRIVATE,
99 ((struct mtd_data *)ctx->backend.priv)->fd, 0);
100 assert(map != MAP_FAILED);
101
102 rc = memcmp(flush_middle_data, map, sizeof(flush_middle_data));
103 assert(rc == 0);
104
105 /* { dirty, clean, dirty } */
106
107 ((uint8_t *)ctx->mem)[0] = 0x55;
108
109 rc = mbox_command_dispatch(ctx, mark_write_dirty_left,
110 sizeof(mark_write_dirty_left));
111 assert(rc == 1);
112
113 ((uint8_t *)ctx->mem)[2] = 0x55;
114
115 rc = mbox_command_dispatch(ctx, mark_write_dirty_right,
116 sizeof(mark_write_dirty_right));
117 assert(rc == 1);
118
119 rc = mbox_command_dispatch(ctx, write_flush, sizeof(write_flush));
120 assert(rc == 1);
121
122 rc = mbox_cmp(ctx, response, sizeof(response));
123 assert(rc == 0);
124
125 rc = memcmp(flush_ends_data, map, sizeof(flush_ends_data));
126 assert(rc == 0);
127
128 /* { dirty, dirty, dirty } */
129
130 memcpy(ctx->mem, flush_all_data, sizeof(flush_all_data));
131
132 rc = mbox_command_dispatch(ctx, mark_write_dirty_all,
133 sizeof(mark_write_dirty_all));
134 assert(rc == 1);
135
136 rc = mbox_command_dispatch(ctx, write_flush, sizeof(write_flush));
137 assert(rc == 1);
138
139 rc = mbox_cmp(ctx, response, sizeof(response));
140 assert(rc == 0);
141
142 rc = memcmp(flush_all_data, map, sizeof(flush_all_data));
143 assert(rc == 0);
144
145 return rc;
146 }
147