11f045217Swdenk /* 21f045217Swdenk * (C) Copyright 2001 31f045217Swdenk * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. 41f045217Swdenk * 51f045217Swdenk * See file CREDITS for list of people who contributed to this 61f045217Swdenk * project. 71f045217Swdenk * 81f045217Swdenk * This program is free software; you can redistribute it and/or 91f045217Swdenk * modify it under the terms of the GNU General Public License as 101f045217Swdenk * published by the Free Software Foundation; either version 2 of 111f045217Swdenk * the License, or (at your option) any later version. 121f045217Swdenk * 131f045217Swdenk * This program is distributed in the hope that it will be useful, 141f045217Swdenk * but WITHOUT ANY WARRANTY; without even the implied warranty of 151f045217Swdenk * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 161f045217Swdenk * GNU General Public License for more details. 171f045217Swdenk * 181f045217Swdenk * You should have received a copy of the GNU General Public License 191f045217Swdenk * along with this program; if not, write to the Free Software 201f045217Swdenk * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 211f045217Swdenk * MA 02111-1307 USA 221f045217Swdenk * 231f045217Swdenk * The original I2C interface was 241f045217Swdenk * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) 251f045217Swdenk * AIRVENT SAM s.p.a - RIMINI(ITALY) 261f045217Swdenk * but has been changed substantially. 271f045217Swdenk */ 281f045217Swdenk 291f045217Swdenk #ifndef _I2C_H_ 301f045217Swdenk #define _I2C_H_ 311f045217Swdenk 321f045217Swdenk /* 331f045217Swdenk * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 341f045217Swdenk * 351f045217Swdenk * The implementation MUST NOT use static or global variables if the 361f045217Swdenk * I2C routines are used to read SDRAM configuration information 371f045217Swdenk * because this is done before the memories are initialized. Limited 381f045217Swdenk * use of stack-based variables are OK (the initial stack size is 391f045217Swdenk * limited). 401f045217Swdenk * 411f045217Swdenk * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING 421f045217Swdenk */ 431f045217Swdenk 441f045217Swdenk /* 451f045217Swdenk * Configuration items. 461f045217Swdenk */ 471f045217Swdenk #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ 481f045217Swdenk 4979b2d0bbSStefan Roese #if defined(CONFIG_I2C_MULTI_BUS) 506d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_I2C_BUS 2 5179b2d0bbSStefan Roese #define I2C_GET_BUS() i2c_get_bus_num() 5279b2d0bbSStefan Roese #define I2C_SET_BUS(a) i2c_set_bus_num(a) 5379b2d0bbSStefan Roese #else 546d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_I2C_BUS 1 5579b2d0bbSStefan Roese #define I2C_GET_BUS() 0 5679b2d0bbSStefan Roese #define I2C_SET_BUS(a) 5779b2d0bbSStefan Roese #endif 5879b2d0bbSStefan Roese 598c12045aSStefan Roese /* define the I2C bus number for RTC and DTT if not already done */ 606d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if !defined(CONFIG_SYS_RTC_BUS_NUM) 616d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_RTC_BUS_NUM 0 628c12045aSStefan Roese #endif 636d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if !defined(CONFIG_SYS_DTT_BUS_NUM) 646d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DTT_BUS_NUM 0 658c12045aSStefan Roese #endif 666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if !defined(CONFIG_SYS_SPD_BUS_NUM) 676d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPD_BUS_NUM 0 68d8a8ea5cSMatthias Fuchs #endif 698c12045aSStefan Roese 7098aed379SHeiko Schocher #ifndef I2C_SOFT_DECLARATIONS 7198aed379SHeiko Schocher # if defined(CONFIG_MPC8260) 726d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); 7398aed379SHeiko Schocher # elif defined(CONFIG_8xx) 746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; 7598aed379SHeiko Schocher # else 7698aed379SHeiko Schocher # define I2C_SOFT_DECLARATIONS 7798aed379SHeiko Schocher # endif 7898aed379SHeiko Schocher #endif 79*ecf5f077STimur Tabi 80*ecf5f077STimur Tabi #ifdef CONFIG_8xx 81*ecf5f077STimur Tabi /* Set default values for the I2C bus speed and slave address on 8xx. In the 82*ecf5f077STimur Tabi * future, we'll define these in all 8xx board config files. 83*ecf5f077STimur Tabi */ 84*ecf5f077STimur Tabi #ifndef CONFIG_SYS_I2C_SPEED 85*ecf5f077STimur Tabi #define CONFIG_SYS_I2C_SPEED 50000 86*ecf5f077STimur Tabi #endif 87*ecf5f077STimur Tabi 88*ecf5f077STimur Tabi #ifndef CONFIG_SYS_I2C_SLAVE 89*ecf5f077STimur Tabi #define CONFIG_SYS_I2C_SLAVE 0xFE 90*ecf5f077STimur Tabi #endif 91*ecf5f077STimur Tabi #endif 92*ecf5f077STimur Tabi 931f045217Swdenk /* 941f045217Swdenk * Initialization, must be called once on start up, may be called 951f045217Swdenk * repeatedly to change the speed and slave addresses. 961f045217Swdenk */ 971f045217Swdenk void i2c_init(int speed, int slaveaddr); 986d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_I2C_INIT_BOARD 9906d01dbeSwdenk void i2c_init_board(void); 10006d01dbeSwdenk #endif 1011f045217Swdenk 10267b23a32SHeiko Schocher #if defined(CONFIG_I2C_MUX) 10367b23a32SHeiko Schocher 10467b23a32SHeiko Schocher typedef struct _mux { 10567b23a32SHeiko Schocher uchar chip; 10667b23a32SHeiko Schocher uchar channel; 10767b23a32SHeiko Schocher char *name; 10867b23a32SHeiko Schocher struct _mux *next; 10967b23a32SHeiko Schocher } I2C_MUX; 11067b23a32SHeiko Schocher 11167b23a32SHeiko Schocher typedef struct _mux_device { 11267b23a32SHeiko Schocher int busid; 11367b23a32SHeiko Schocher I2C_MUX *mux; /* List of muxes, to reach the device */ 11467b23a32SHeiko Schocher struct _mux_device *next; 11567b23a32SHeiko Schocher } I2C_MUX_DEVICE; 11667b23a32SHeiko Schocher 11767b23a32SHeiko Schocher int i2c_mux_add_device(I2C_MUX_DEVICE *dev); 11867b23a32SHeiko Schocher 11967b23a32SHeiko Schocher I2C_MUX_DEVICE *i2c_mux_search_device(int id); 12067b23a32SHeiko Schocher I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf); 12167b23a32SHeiko Schocher int i2x_mux_select_mux(int bus); 12267b23a32SHeiko Schocher int i2c_mux_ident_muxstring_f (uchar *buf); 12367b23a32SHeiko Schocher #endif 12467b23a32SHeiko Schocher 1251f045217Swdenk /* 1261f045217Swdenk * Probe the given I2C chip address. Returns 0 if a chip responded, 1271f045217Swdenk * not 0 on failure. 1281f045217Swdenk */ 1291f045217Swdenk int i2c_probe(uchar chip); 1301f045217Swdenk 1311f045217Swdenk /* 1321f045217Swdenk * Read/Write interface: 1331f045217Swdenk * chip: I2C chip address, range 0..127 1341f045217Swdenk * addr: Memory (register) address within the chip 1351f045217Swdenk * alen: Number of bytes to use for addr (typically 1, 2 for larger 1361f045217Swdenk * memories, 0 for register type devices with only one 1371f045217Swdenk * register) 1381f045217Swdenk * buffer: Where to read/write the data 1391f045217Swdenk * len: How many bytes to read/write 1401f045217Swdenk * 1411f045217Swdenk * Returns: 0 on success, not 0 on failure 1421f045217Swdenk */ 1431f045217Swdenk int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); 1441f045217Swdenk int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); 1451f045217Swdenk 1461f045217Swdenk /* 1471f045217Swdenk * Utility routines to read/write registers. 1481f045217Swdenk */ 149*ecf5f077STimur Tabi static inline u8 i2c_reg_read(u8 addr, u8 reg) 150*ecf5f077STimur Tabi { 151*ecf5f077STimur Tabi u8 buf; 152*ecf5f077STimur Tabi 153*ecf5f077STimur Tabi #ifdef CONFIG_8xx 154*ecf5f077STimur Tabi /* MPC8xx needs this. Maybe one day we can get rid of it. */ 155*ecf5f077STimur Tabi i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 156*ecf5f077STimur Tabi #endif 157*ecf5f077STimur Tabi 158*ecf5f077STimur Tabi #ifdef DEBUG 159*ecf5f077STimur Tabi printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); 160*ecf5f077STimur Tabi #endif 161*ecf5f077STimur Tabi 162*ecf5f077STimur Tabi #ifdef CONFIG_BLACKFIN 163*ecf5f077STimur Tabi /* This ifdef will become unneccessary in a future version of the 164*ecf5f077STimur Tabi * blackfin I2C driver. 165*ecf5f077STimur Tabi */ 166*ecf5f077STimur Tabi i2c_read(addr, reg, 0, &buf, 1); 167*ecf5f077STimur Tabi #else 168*ecf5f077STimur Tabi i2c_read(addr, reg, 1, &buf, 1); 169*ecf5f077STimur Tabi #endif 170*ecf5f077STimur Tabi 171*ecf5f077STimur Tabi return buf; 172*ecf5f077STimur Tabi } 173*ecf5f077STimur Tabi 174*ecf5f077STimur Tabi static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) 175*ecf5f077STimur Tabi { 176*ecf5f077STimur Tabi #ifdef CONFIG_8xx 177*ecf5f077STimur Tabi /* MPC8xx needs this. Maybe one day we can get rid of it. */ 178*ecf5f077STimur Tabi i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); 179*ecf5f077STimur Tabi #endif 180*ecf5f077STimur Tabi 181*ecf5f077STimur Tabi #ifdef DEBUG 182*ecf5f077STimur Tabi printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", 183*ecf5f077STimur Tabi __func__, addr, reg, val); 184*ecf5f077STimur Tabi #endif 185*ecf5f077STimur Tabi 186*ecf5f077STimur Tabi #ifdef CONFIG_BLACKFIN 187*ecf5f077STimur Tabi /* This ifdef will become unneccessary in a future version of the 188*ecf5f077STimur Tabi * blackfin I2C driver. 189*ecf5f077STimur Tabi */ 190*ecf5f077STimur Tabi i2c_write(addr, reg, 0, &val, 1); 191*ecf5f077STimur Tabi #else 192*ecf5f077STimur Tabi i2c_write(addr, reg, 1, &val, 1); 193*ecf5f077STimur Tabi #endif 194*ecf5f077STimur Tabi } 1951f045217Swdenk 196bb99ad6dSBen Warren /* 197bb99ad6dSBen Warren * Functions for setting the current I2C bus and its speed 198bb99ad6dSBen Warren */ 199bb99ad6dSBen Warren 200bb99ad6dSBen Warren /* 201bb99ad6dSBen Warren * i2c_set_bus_num: 202bb99ad6dSBen Warren * 203bb99ad6dSBen Warren * Change the active I2C bus. Subsequent read/write calls will 204bb99ad6dSBen Warren * go to this one. 205bb99ad6dSBen Warren * 206bb99ad6dSBen Warren * bus - bus index, zero based 207bb99ad6dSBen Warren * 208bb99ad6dSBen Warren * Returns: 0 on success, not 0 on failure 209bb99ad6dSBen Warren * 210bb99ad6dSBen Warren */ 2119ca880a2STimur Tabi int i2c_set_bus_num(unsigned int bus); 212bb99ad6dSBen Warren 213bb99ad6dSBen Warren /* 214bb99ad6dSBen Warren * i2c_get_bus_num: 215bb99ad6dSBen Warren * 216bb99ad6dSBen Warren * Returns index of currently active I2C bus. Zero-based. 217bb99ad6dSBen Warren */ 218bb99ad6dSBen Warren 2199ca880a2STimur Tabi unsigned int i2c_get_bus_num(void); 220bb99ad6dSBen Warren 221bb99ad6dSBen Warren /* 222bb99ad6dSBen Warren * i2c_set_bus_speed: 223bb99ad6dSBen Warren * 224bb99ad6dSBen Warren * Change the speed of the active I2C bus 225bb99ad6dSBen Warren * 226bb99ad6dSBen Warren * speed - bus speed in Hz 227bb99ad6dSBen Warren * 228bb99ad6dSBen Warren * Returns: 0 on success, not 0 on failure 229bb99ad6dSBen Warren * 230bb99ad6dSBen Warren */ 2319ca880a2STimur Tabi int i2c_set_bus_speed(unsigned int); 232bb99ad6dSBen Warren 233bb99ad6dSBen Warren /* 234bb99ad6dSBen Warren * i2c_get_bus_speed: 235bb99ad6dSBen Warren * 236bb99ad6dSBen Warren * Returns speed of currently active I2C bus in Hz 237bb99ad6dSBen Warren */ 238bb99ad6dSBen Warren 2399ca880a2STimur Tabi unsigned int i2c_get_bus_speed(void); 240bb99ad6dSBen Warren 2411f045217Swdenk #endif /* _I2C_H_ */ 242