xref: /openbmc/u-boot/include/i2c.h (revision 0cf0b93161beb3f3ed5e37e6112aedf15da17e8a)
11f045217Swdenk /*
21f045217Swdenk  * (C) Copyright 2001
31f045217Swdenk  * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
41f045217Swdenk  *
51f045217Swdenk  * See file CREDITS for list of people who contributed to this
61f045217Swdenk  * project.
71f045217Swdenk  *
81f045217Swdenk  * This program is free software; you can redistribute it and/or
91f045217Swdenk  * modify it under the terms of the GNU General Public License as
101f045217Swdenk  * published by the Free Software Foundation; either version 2 of
111f045217Swdenk  * the License, or (at your option) any later version.
121f045217Swdenk  *
131f045217Swdenk  * This program is distributed in the hope that it will be useful,
141f045217Swdenk  * but WITHOUT ANY WARRANTY; without even the implied warranty of
151f045217Swdenk  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
161f045217Swdenk  * GNU General Public License for more details.
171f045217Swdenk  *
181f045217Swdenk  * You should have received a copy of the GNU General Public License
191f045217Swdenk  * along with this program; if not, write to the Free Software
201f045217Swdenk  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
211f045217Swdenk  * MA 02111-1307 USA
221f045217Swdenk  *
231f045217Swdenk  * The original I2C interface was
241f045217Swdenk  *   (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
251f045217Swdenk  *   AIRVENT SAM s.p.a - RIMINI(ITALY)
261f045217Swdenk  * but has been changed substantially.
271f045217Swdenk  */
281f045217Swdenk 
291f045217Swdenk #ifndef _I2C_H_
301f045217Swdenk #define _I2C_H_
311f045217Swdenk 
321f045217Swdenk /*
331f045217Swdenk  * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
341f045217Swdenk  *
351f045217Swdenk  * The implementation MUST NOT use static or global variables if the
361f045217Swdenk  * I2C routines are used to read SDRAM configuration information
371f045217Swdenk  * because this is done before the memories are initialized. Limited
381f045217Swdenk  * use of stack-based variables are OK (the initial stack size is
391f045217Swdenk  * limited).
401f045217Swdenk  *
411f045217Swdenk  * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
421f045217Swdenk  */
431f045217Swdenk 
441f045217Swdenk /*
451f045217Swdenk  * Configuration items.
461f045217Swdenk  */
471f045217Swdenk #define I2C_RXTX_LEN	128	/* maximum tx/rx buffer length */
481f045217Swdenk 
4979b2d0bbSStefan Roese #if defined(CONFIG_I2C_MULTI_BUS)
50dc71b248SHeiko Schocher #if !defined(CONFIG_SYS_MAX_I2C_BUS)
516d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_I2C_BUS		2
52dc71b248SHeiko Schocher #endif
5379b2d0bbSStefan Roese #define I2C_GET_BUS()		i2c_get_bus_num()
5479b2d0bbSStefan Roese #define I2C_SET_BUS(a)		i2c_set_bus_num(a)
5579b2d0bbSStefan Roese #else
566d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_MAX_I2C_BUS		1
5779b2d0bbSStefan Roese #define I2C_GET_BUS()		0
5879b2d0bbSStefan Roese #define I2C_SET_BUS(a)
5979b2d0bbSStefan Roese #endif
6079b2d0bbSStefan Roese 
618c12045aSStefan Roese /* define the I2C bus number for RTC and DTT if not already done */
626d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if !defined(CONFIG_SYS_RTC_BUS_NUM)
636d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_RTC_BUS_NUM		0
648c12045aSStefan Roese #endif
656d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if !defined(CONFIG_SYS_DTT_BUS_NUM)
666d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_DTT_BUS_NUM		0
678c12045aSStefan Roese #endif
686d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #if !defined(CONFIG_SYS_SPD_BUS_NUM)
696d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define CONFIG_SYS_SPD_BUS_NUM		0
70d8a8ea5cSMatthias Fuchs #endif
718c12045aSStefan Roese 
7298aed379SHeiko Schocher #ifndef I2C_SOFT_DECLARATIONS
7398aed379SHeiko Schocher # if defined(CONFIG_MPC8260)
746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #  define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
7598aed379SHeiko Schocher # elif defined(CONFIG_8xx)
766d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #  define I2C_SOFT_DECLARATIONS	volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
77*0cf0b931SJens Scharsig 
78*0cf0b931SJens Scharsig # elif (defined(CONFIG_AT91RM9200) || \
79*0cf0b931SJens Scharsig 	defined(CONFIG_AT91SAM9260) ||  defined(CONFIG_AT91SAM9261) || \
80*0cf0b931SJens Scharsig 	defined(CONFIG_AT91SAM9263)) && !defined(CONFIG_AT91_LEGACY)
81*0cf0b931SJens Scharsig #  define I2C_SOFT_DECLARATIONS	at91_pio_t *pio	= (at91_pio_t *) AT91_PIO_BASE;
8298aed379SHeiko Schocher # else
8398aed379SHeiko Schocher #  define I2C_SOFT_DECLARATIONS
8498aed379SHeiko Schocher # endif
8598aed379SHeiko Schocher #endif
86ecf5f077STimur Tabi 
87ecf5f077STimur Tabi #ifdef CONFIG_8xx
889c90a2c8SPeter Tyser /* Set default value for the I2C bus speed on 8xx. In the
89ecf5f077STimur Tabi  * future, we'll define these in all 8xx board config files.
90ecf5f077STimur Tabi  */
91ecf5f077STimur Tabi #ifndef	CONFIG_SYS_I2C_SPEED
92ecf5f077STimur Tabi #define	CONFIG_SYS_I2C_SPEED	50000
93ecf5f077STimur Tabi #endif
94ecf5f077STimur Tabi #endif
959c90a2c8SPeter Tyser 
969c90a2c8SPeter Tyser /*
979c90a2c8SPeter Tyser  * Many boards/controllers/drivers don't support an I2C slave interface so
989c90a2c8SPeter Tyser  * provide a default slave address for them for use in common code.  A real
999c90a2c8SPeter Tyser  * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
1009c90a2c8SPeter Tyser  * support a slave interface.
1019c90a2c8SPeter Tyser  */
1029c90a2c8SPeter Tyser #ifndef	CONFIG_SYS_I2C_SLAVE
1039c90a2c8SPeter Tyser #define	CONFIG_SYS_I2C_SLAVE	0xfe
104ecf5f077STimur Tabi #endif
105ecf5f077STimur Tabi 
1061f045217Swdenk /*
1071f045217Swdenk  * Initialization, must be called once on start up, may be called
1081f045217Swdenk  * repeatedly to change the speed and slave addresses.
1091f045217Swdenk  */
1101f045217Swdenk void i2c_init(int speed, int slaveaddr);
1116d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifdef CONFIG_SYS_I2C_INIT_BOARD
11206d01dbeSwdenk void i2c_init_board(void);
11306d01dbeSwdenk #endif
1141f045217Swdenk 
11567b23a32SHeiko Schocher #if defined(CONFIG_I2C_MUX)
11667b23a32SHeiko Schocher 
11767b23a32SHeiko Schocher typedef struct _mux {
11867b23a32SHeiko Schocher 	uchar	chip;
11967b23a32SHeiko Schocher 	uchar	channel;
12067b23a32SHeiko Schocher 	char	*name;
12167b23a32SHeiko Schocher 	struct _mux	*next;
12267b23a32SHeiko Schocher } I2C_MUX;
12367b23a32SHeiko Schocher 
12467b23a32SHeiko Schocher typedef struct _mux_device {
12567b23a32SHeiko Schocher 	int	busid;
12667b23a32SHeiko Schocher 	I2C_MUX	*mux;	/* List of muxes, to reach the device */
12767b23a32SHeiko Schocher 	struct _mux_device	*next;
12867b23a32SHeiko Schocher } I2C_MUX_DEVICE;
12967b23a32SHeiko Schocher 
13067b23a32SHeiko Schocher int	i2c_mux_add_device(I2C_MUX_DEVICE *dev);
13167b23a32SHeiko Schocher 
13267b23a32SHeiko Schocher I2C_MUX_DEVICE	*i2c_mux_search_device(int id);
13367b23a32SHeiko Schocher I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf);
13467b23a32SHeiko Schocher int i2x_mux_select_mux(int bus);
13567b23a32SHeiko Schocher int i2c_mux_ident_muxstring_f (uchar *buf);
13667b23a32SHeiko Schocher #endif
13767b23a32SHeiko Schocher 
1381f045217Swdenk /*
1391f045217Swdenk  * Probe the given I2C chip address.  Returns 0 if a chip responded,
1401f045217Swdenk  * not 0 on failure.
1411f045217Swdenk  */
1421f045217Swdenk int i2c_probe(uchar chip);
1431f045217Swdenk 
1441f045217Swdenk /*
1451f045217Swdenk  * Read/Write interface:
1461f045217Swdenk  *   chip:    I2C chip address, range 0..127
1471f045217Swdenk  *   addr:    Memory (register) address within the chip
1481f045217Swdenk  *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
1491f045217Swdenk  *              memories, 0 for register type devices with only one
1501f045217Swdenk  *              register)
1511f045217Swdenk  *   buffer:  Where to read/write the data
1521f045217Swdenk  *   len:     How many bytes to read/write
1531f045217Swdenk  *
1541f045217Swdenk  *   Returns: 0 on success, not 0 on failure
1551f045217Swdenk  */
1561f045217Swdenk int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
1571f045217Swdenk int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
1581f045217Swdenk 
1591f045217Swdenk /*
1601f045217Swdenk  * Utility routines to read/write registers.
1611f045217Swdenk  */
162ecf5f077STimur Tabi static inline u8 i2c_reg_read(u8 addr, u8 reg)
163ecf5f077STimur Tabi {
164ecf5f077STimur Tabi 	u8 buf;
165ecf5f077STimur Tabi 
166ecf5f077STimur Tabi #ifdef CONFIG_8xx
167ecf5f077STimur Tabi 	/* MPC8xx needs this.  Maybe one day we can get rid of it. */
168ecf5f077STimur Tabi 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
169ecf5f077STimur Tabi #endif
170ecf5f077STimur Tabi 
171ecf5f077STimur Tabi #ifdef DEBUG
172ecf5f077STimur Tabi 	printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
173ecf5f077STimur Tabi #endif
174ecf5f077STimur Tabi 
175ecf5f077STimur Tabi 	i2c_read(addr, reg, 1, &buf, 1);
176ecf5f077STimur Tabi 
177ecf5f077STimur Tabi 	return buf;
178ecf5f077STimur Tabi }
179ecf5f077STimur Tabi 
180ecf5f077STimur Tabi static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
181ecf5f077STimur Tabi {
182ecf5f077STimur Tabi #ifdef CONFIG_8xx
183ecf5f077STimur Tabi 	/* MPC8xx needs this.  Maybe one day we can get rid of it. */
184ecf5f077STimur Tabi 	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
185ecf5f077STimur Tabi #endif
186ecf5f077STimur Tabi 
187ecf5f077STimur Tabi #ifdef DEBUG
188ecf5f077STimur Tabi 	printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
189ecf5f077STimur Tabi 	       __func__, addr, reg, val);
190ecf5f077STimur Tabi #endif
191ecf5f077STimur Tabi 
192ecf5f077STimur Tabi 	i2c_write(addr, reg, 1, &val, 1);
193ecf5f077STimur Tabi }
1941f045217Swdenk 
195bb99ad6dSBen Warren /*
196bb99ad6dSBen Warren  * Functions for setting the current I2C bus and its speed
197bb99ad6dSBen Warren  */
198bb99ad6dSBen Warren 
199bb99ad6dSBen Warren /*
200bb99ad6dSBen Warren  * i2c_set_bus_num:
201bb99ad6dSBen Warren  *
202bb99ad6dSBen Warren  *  Change the active I2C bus.  Subsequent read/write calls will
203bb99ad6dSBen Warren  *  go to this one.
204bb99ad6dSBen Warren  *
205bb99ad6dSBen Warren  *	bus - bus index, zero based
206bb99ad6dSBen Warren  *
207bb99ad6dSBen Warren  *	Returns: 0 on success, not 0 on failure
208bb99ad6dSBen Warren  *
209bb99ad6dSBen Warren  */
2109ca880a2STimur Tabi int i2c_set_bus_num(unsigned int bus);
211bb99ad6dSBen Warren 
212bb99ad6dSBen Warren /*
213bb99ad6dSBen Warren  * i2c_get_bus_num:
214bb99ad6dSBen Warren  *
215bb99ad6dSBen Warren  *  Returns index of currently active I2C bus.  Zero-based.
216bb99ad6dSBen Warren  */
217bb99ad6dSBen Warren 
2189ca880a2STimur Tabi unsigned int i2c_get_bus_num(void);
219bb99ad6dSBen Warren 
220bb99ad6dSBen Warren /*
221bb99ad6dSBen Warren  * i2c_set_bus_speed:
222bb99ad6dSBen Warren  *
223bb99ad6dSBen Warren  *  Change the speed of the active I2C bus
224bb99ad6dSBen Warren  *
225bb99ad6dSBen Warren  *	speed - bus speed in Hz
226bb99ad6dSBen Warren  *
227bb99ad6dSBen Warren  *	Returns: 0 on success, not 0 on failure
228bb99ad6dSBen Warren  *
229bb99ad6dSBen Warren  */
2309ca880a2STimur Tabi int i2c_set_bus_speed(unsigned int);
231bb99ad6dSBen Warren 
232bb99ad6dSBen Warren /*
233bb99ad6dSBen Warren  * i2c_get_bus_speed:
234bb99ad6dSBen Warren  *
235bb99ad6dSBen Warren  *  Returns speed of currently active I2C bus in Hz
236bb99ad6dSBen Warren  */
237bb99ad6dSBen Warren 
2389ca880a2STimur Tabi unsigned int i2c_get_bus_speed(void);
239bb99ad6dSBen Warren 
2401f045217Swdenk #endif	/* _I2C_H_ */
241