1dd84058dSMasahiro Yamadamenu "x86 architecture" 2dd84058dSMasahiro Yamada depends on X86 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "x86" 6dd84058dSMasahiro Yamada 7dd84058dSMasahiro Yamadachoice 865c4ac0aSBin Meng prompt "Mainboard vendor" 999a309f3SBin Meng default VENDOR_EMULATION 10dd84058dSMasahiro Yamada 1182ceba2cSStefan Roeseconfig VENDOR_CONGATEC 1282ceba2cSStefan Roese bool "congatec" 1382ceba2cSStefan Roese 1465c4ac0aSBin Mengconfig VENDOR_COREBOOT 1565c4ac0aSBin Meng bool "coreboot" 168ef07571SSimon Glass 173dcdd17bSBen Stoltzconfig VENDOR_EFI 183dcdd17bSBen Stoltz bool "efi" 193dcdd17bSBen Stoltz 20a65b25d1SBin Mengconfig VENDOR_EMULATION 21a65b25d1SBin Meng bool "emulation" 22a65b25d1SBin Meng 2365c4ac0aSBin Mengconfig VENDOR_GOOGLE 2465c4ac0aSBin Meng bool "Google" 25dd84058dSMasahiro Yamada 2665c4ac0aSBin Mengconfig VENDOR_INTEL 2765c4ac0aSBin Meng bool "Intel" 28ef46bea0SBin Meng 29dd84058dSMasahiro Yamadaendchoice 30dd84058dSMasahiro Yamada 3165c4ac0aSBin Meng# board-specific options below 3282ceba2cSStefan Roesesource "board/congatec/Kconfig" 3365c4ac0aSBin Mengsource "board/coreboot/Kconfig" 343e9aa320SBen Stoltzsource "board/efi/Kconfig" 35a65b25d1SBin Mengsource "board/emulation/Kconfig" 3665c4ac0aSBin Mengsource "board/google/Kconfig" 3765c4ac0aSBin Mengsource "board/intel/Kconfig" 3865c4ac0aSBin Meng 39029194a3SBin Meng# platform-specific options below 40029194a3SBin Mengsource "arch/x86/cpu/baytrail/Kconfig" 412f3f477bSSimon Glasssource "arch/x86/cpu/broadwell/Kconfig" 42029194a3SBin Mengsource "arch/x86/cpu/coreboot/Kconfig" 43029194a3SBin Mengsource "arch/x86/cpu/ivybridge/Kconfig" 44a65b25d1SBin Mengsource "arch/x86/cpu/qemu/Kconfig" 45029194a3SBin Mengsource "arch/x86/cpu/quark/Kconfig" 46029194a3SBin Mengsource "arch/x86/cpu/queensbay/Kconfig" 47029194a3SBin Meng 48029194a3SBin Meng# architecture-specific options below 49029194a3SBin Meng 50a219639dSSimon Glassconfig AHCI 51a219639dSSimon Glass default y 52a219639dSSimon Glass 53b724bd7dSSimon Glassconfig SYS_MALLOC_F_LEN 54b724bd7dSSimon Glass default 0x800 55b724bd7dSSimon Glass 5670a09c6cSSimon Glassconfig RAMBASE 5770a09c6cSSimon Glass hex 5870a09c6cSSimon Glass default 0x100000 5970a09c6cSSimon Glass 6070a09c6cSSimon Glassconfig XIP_ROM_SIZE 6170a09c6cSSimon Glass hex 627698d36aSBin Meng depends on X86_RESET_VECTOR 63bbd43d65SSimon Glass default ROM_SIZE 6470a09c6cSSimon Glass 6570a09c6cSSimon Glassconfig CPU_ADDR_BITS 6670a09c6cSSimon Glass int 6770a09c6cSSimon Glass default 36 6870a09c6cSSimon Glass 6965dd74a6SSimon Glassconfig HPET_ADDRESS 7065dd74a6SSimon Glass hex 7165dd74a6SSimon Glass default 0xfed00000 if !HPET_ADDRESS_OVERRIDE 7265dd74a6SSimon Glass 7365dd74a6SSimon Glassconfig SMM_TSEG 7465dd74a6SSimon Glass bool 7565dd74a6SSimon Glass default n 7665dd74a6SSimon Glass 7765dd74a6SSimon Glassconfig SMM_TSEG_SIZE 7865dd74a6SSimon Glass hex 7965dd74a6SSimon Glass 808cb20cccSBin Mengconfig X86_RESET_VECTOR 818cb20cccSBin Meng bool 828cb20cccSBin Meng default n 838cb20cccSBin Meng 84343fb990SBin Mengconfig RESET_SEG_START 85343fb990SBin Meng hex 86343fb990SBin Meng depends on X86_RESET_VECTOR 87343fb990SBin Meng default 0xffff0000 88343fb990SBin Meng 89343fb990SBin Mengconfig RESET_SEG_SIZE 90343fb990SBin Meng hex 91343fb990SBin Meng depends on X86_RESET_VECTOR 92343fb990SBin Meng default 0x10000 93343fb990SBin Meng 94343fb990SBin Mengconfig RESET_VEC_LOC 95343fb990SBin Meng hex 96343fb990SBin Meng depends on X86_RESET_VECTOR 97343fb990SBin Meng default 0xfffffff0 98343fb990SBin Meng 998cb20cccSBin Mengconfig SYS_X86_START16 1008cb20cccSBin Meng hex 1018cb20cccSBin Meng depends on X86_RESET_VECTOR 1028cb20cccSBin Meng default 0xfffff800 1038cb20cccSBin Meng 10464542f46SBin Mengconfig BOARD_ROMSIZE_KB_512 10564542f46SBin Meng bool 10664542f46SBin Mengconfig BOARD_ROMSIZE_KB_1024 10764542f46SBin Meng bool 10864542f46SBin Mengconfig BOARD_ROMSIZE_KB_2048 10964542f46SBin Meng bool 11064542f46SBin Mengconfig BOARD_ROMSIZE_KB_4096 11164542f46SBin Meng bool 11264542f46SBin Mengconfig BOARD_ROMSIZE_KB_8192 11364542f46SBin Meng bool 11464542f46SBin Mengconfig BOARD_ROMSIZE_KB_16384 11564542f46SBin Meng bool 11664542f46SBin Meng 11764542f46SBin Mengchoice 11864542f46SBin Meng prompt "ROM chip size" 1197698d36aSBin Meng depends on X86_RESET_VECTOR 12064542f46SBin Meng default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512 12164542f46SBin Meng default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024 12264542f46SBin Meng default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048 12364542f46SBin Meng default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096 12464542f46SBin Meng default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192 12564542f46SBin Meng default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384 12664542f46SBin Meng help 12764542f46SBin Meng Select the size of the ROM chip you intend to flash U-Boot on. 12864542f46SBin Meng 12964542f46SBin Meng The build system will take care of creating a u-boot.rom file 13064542f46SBin Meng of the matching size. 13164542f46SBin Meng 13264542f46SBin Mengconfig UBOOT_ROMSIZE_KB_512 13364542f46SBin Meng bool "512 KB" 13464542f46SBin Meng help 13564542f46SBin Meng Choose this option if you have a 512 KB ROM chip. 13664542f46SBin Meng 13764542f46SBin Mengconfig UBOOT_ROMSIZE_KB_1024 13864542f46SBin Meng bool "1024 KB (1 MB)" 13964542f46SBin Meng help 14064542f46SBin Meng Choose this option if you have a 1024 KB (1 MB) ROM chip. 14164542f46SBin Meng 14264542f46SBin Mengconfig UBOOT_ROMSIZE_KB_2048 14364542f46SBin Meng bool "2048 KB (2 MB)" 14464542f46SBin Meng help 14564542f46SBin Meng Choose this option if you have a 2048 KB (2 MB) ROM chip. 14664542f46SBin Meng 14764542f46SBin Mengconfig UBOOT_ROMSIZE_KB_4096 14864542f46SBin Meng bool "4096 KB (4 MB)" 14964542f46SBin Meng help 15064542f46SBin Meng Choose this option if you have a 4096 KB (4 MB) ROM chip. 15164542f46SBin Meng 15264542f46SBin Mengconfig UBOOT_ROMSIZE_KB_8192 15364542f46SBin Meng bool "8192 KB (8 MB)" 15464542f46SBin Meng help 15564542f46SBin Meng Choose this option if you have a 8192 KB (8 MB) ROM chip. 15664542f46SBin Meng 15764542f46SBin Mengconfig UBOOT_ROMSIZE_KB_16384 15864542f46SBin Meng bool "16384 KB (16 MB)" 15964542f46SBin Meng help 16064542f46SBin Meng Choose this option if you have a 16384 KB (16 MB) ROM chip. 16164542f46SBin Meng 16264542f46SBin Mengendchoice 16364542f46SBin Meng 16464542f46SBin Meng# Map the config names to an integer (KB). 16564542f46SBin Mengconfig UBOOT_ROMSIZE_KB 16664542f46SBin Meng int 16764542f46SBin Meng default 512 if UBOOT_ROMSIZE_KB_512 16864542f46SBin Meng default 1024 if UBOOT_ROMSIZE_KB_1024 16964542f46SBin Meng default 2048 if UBOOT_ROMSIZE_KB_2048 17064542f46SBin Meng default 4096 if UBOOT_ROMSIZE_KB_4096 17164542f46SBin Meng default 8192 if UBOOT_ROMSIZE_KB_8192 17264542f46SBin Meng default 16384 if UBOOT_ROMSIZE_KB_16384 17364542f46SBin Meng 17464542f46SBin Meng# Map the config names to a hex value (bytes). 175fce7b276SSimon Glassconfig ROM_SIZE 176fce7b276SSimon Glass hex 17764542f46SBin Meng default 0x80000 if UBOOT_ROMSIZE_KB_512 17864542f46SBin Meng default 0x100000 if UBOOT_ROMSIZE_KB_1024 17964542f46SBin Meng default 0x200000 if UBOOT_ROMSIZE_KB_2048 18064542f46SBin Meng default 0x400000 if UBOOT_ROMSIZE_KB_4096 18164542f46SBin Meng default 0x800000 if UBOOT_ROMSIZE_KB_8192 18264542f46SBin Meng default 0xc00000 if UBOOT_ROMSIZE_KB_12288 18364542f46SBin Meng default 0x1000000 if UBOOT_ROMSIZE_KB_16384 184fce7b276SSimon Glass 185fce7b276SSimon Glassconfig HAVE_INTEL_ME 186fce7b276SSimon Glass bool "Platform requires Intel Management Engine" 187fce7b276SSimon Glass help 188fce7b276SSimon Glass Newer higher-end devices have an Intel Management Engine (ME) 189fce7b276SSimon Glass which is a very large binary blob (typically 1.5MB) which is 190fce7b276SSimon Glass required for the platform to work. This enforces a particular 191fce7b276SSimon Glass SPI flash format. You will need to supply the me.bin file in 192fce7b276SSimon Glass your board directory. 193fce7b276SSimon Glass 19465dd74a6SSimon Glassconfig X86_RAMTEST 19565dd74a6SSimon Glass bool "Perform a simple RAM test after SDRAM initialisation" 19665dd74a6SSimon Glass help 19765dd74a6SSimon Glass If there is something wrong with SDRAM then the platform will 19865dd74a6SSimon Glass often crash within U-Boot or the kernel. This option enables a 19965dd74a6SSimon Glass very simple RAM test that quickly checks whether the SDRAM seems 20065dd74a6SSimon Glass to work correctly. It is not exhaustive but can save time by 20165dd74a6SSimon Glass detecting obvious failures. 20265dd74a6SSimon Glass 2038ce24cd9SSimon Glassconfig HAVE_FSP 2048ce24cd9SSimon Glass bool "Add an Firmware Support Package binary" 205e49cceacSSimon Glass depends on !EFI 2068ce24cd9SSimon Glass help 2078ce24cd9SSimon Glass Select this option to add an Firmware Support Package binary to 2088ce24cd9SSimon Glass the resulting U-Boot image. It is a binary blob which U-Boot uses 2098ce24cd9SSimon Glass to set up SDRAM and other chipset specific initialization. 2108ce24cd9SSimon Glass 2118ce24cd9SSimon Glass Note: Without this binary U-Boot will not be able to set up its 2128ce24cd9SSimon Glass SDRAM so will not boot. 2138ce24cd9SSimon Glass 2148ce24cd9SSimon Glassconfig FSP_FILE 2158ce24cd9SSimon Glass string "Firmware Support Package binary filename" 2168ce24cd9SSimon Glass depends on HAVE_FSP 2178ce24cd9SSimon Glass default "fsp.bin" 2188ce24cd9SSimon Glass help 2198ce24cd9SSimon Glass The filename of the file to use as Firmware Support Package binary 2208ce24cd9SSimon Glass in the board directory. 2218ce24cd9SSimon Glass 2228ce24cd9SSimon Glassconfig FSP_ADDR 2238ce24cd9SSimon Glass hex "Firmware Support Package binary location" 2248ce24cd9SSimon Glass depends on HAVE_FSP 2258ce24cd9SSimon Glass default 0xfffc0000 2268ce24cd9SSimon Glass help 2278ce24cd9SSimon Glass FSP is not Position Independent Code (PIC) and the whole FSP has to 2288ce24cd9SSimon Glass be rebased if it is placed at a location which is different from the 2298ce24cd9SSimon Glass perferred base address specified during the FSP build. Use Intel's 2308ce24cd9SSimon Glass Binary Configuration Tool (BCT) to do the rebase. 2318ce24cd9SSimon Glass 2328ce24cd9SSimon Glass The default base address of 0xfffc0000 indicates that the binary must 2338ce24cd9SSimon Glass be located at offset 0xc0000 from the beginning of a 1MB flash device. 2348ce24cd9SSimon Glass 2358ce24cd9SSimon Glassconfig FSP_TEMP_RAM_ADDR 2368ce24cd9SSimon Glass hex 237d04e30b8SBin Meng depends on HAVE_FSP 2388ce24cd9SSimon Glass default 0x2000000 2398ce24cd9SSimon Glass help 24048aa6c26SBin Meng Stack top address which is used in fsp_init() after DRAM is ready and 2418ce24cd9SSimon Glass CAR is disabled. 2428ce24cd9SSimon Glass 24357b10f59SBin Mengconfig FSP_SYS_MALLOC_F_LEN 24457b10f59SBin Meng hex 24557b10f59SBin Meng depends on HAVE_FSP 24657b10f59SBin Meng default 0x100000 24757b10f59SBin Meng help 24857b10f59SBin Meng Additional size of malloc() pool before relocation. 24957b10f59SBin Meng 2503340f2ccSBin Mengconfig FSP_USE_UPD 2513340f2ccSBin Meng bool 2523340f2ccSBin Meng depends on HAVE_FSP 2533340f2ccSBin Meng default y 2543340f2ccSBin Meng help 2553340f2ccSBin Meng Most FSPs use UPD data region for some FSP customization. But there 2563340f2ccSBin Meng are still some FSPs that might not even have UPD. For such FSPs, 2573340f2ccSBin Meng override this to n in their platform Kconfig files. 2583340f2ccSBin Meng 259dc5be508SBin Mengconfig FSP_BROKEN_HOB 260dc5be508SBin Meng bool 261dc5be508SBin Meng depends on HAVE_FSP 262dc5be508SBin Meng help 263dc5be508SBin Meng Indicate some buggy FSPs that does not report memory used by FSP 264dc5be508SBin Meng itself as reserved in the resource descriptor HOB. Select this to 265dc5be508SBin Meng tell U-Boot to do some additional work to ensure U-Boot relocation 266dc5be508SBin Meng do not overwrite the important boot service data which is used by 267dc5be508SBin Meng FSP, otherwise the subsequent call to fsp_notify() will fail. 268dc5be508SBin Meng 269e2d76e95SBin Mengconfig ENABLE_MRC_CACHE 270e2d76e95SBin Meng bool "Enable MRC cache" 271e2d76e95SBin Meng depends on !EFI && !SYS_COREBOOT 272e2d76e95SBin Meng help 273e2d76e95SBin Meng Enable this feature to cause MRC data to be cached in NV storage 274e2d76e95SBin Meng to be used for speeding up boot time on future reboots and/or 275e2d76e95SBin Meng power cycles. 276e2d76e95SBin Meng 277f7d35bc1SSimon Glassconfig HAVE_MRC 278f7d35bc1SSimon Glass bool "Add a System Agent binary" 279f7d35bc1SSimon Glass depends on !HAVE_FSP 280f7d35bc1SSimon Glass help 281f7d35bc1SSimon Glass Select this option to add a System Agent binary to 282f7d35bc1SSimon Glass the resulting U-Boot image. MRC stands for Memory Reference Code. 283f7d35bc1SSimon Glass It is a binary blob which U-Boot uses to set up SDRAM. 284f7d35bc1SSimon Glass 285f7d35bc1SSimon Glass Note: Without this binary U-Boot will not be able to set up its 286f7d35bc1SSimon Glass SDRAM so will not boot. 287f7d35bc1SSimon Glass 288f7d35bc1SSimon Glassconfig CACHE_MRC_BIN 289f7d35bc1SSimon Glass bool 290f7d35bc1SSimon Glass depends on HAVE_MRC 291f7d35bc1SSimon Glass default n 292f7d35bc1SSimon Glass help 293f7d35bc1SSimon Glass Enable caching for the memory reference code binary. This uses an 294f7d35bc1SSimon Glass MTRR (memory type range register) to turn on caching for the section 295f7d35bc1SSimon Glass of SPI flash that contains the memory reference code. This makes 296f7d35bc1SSimon Glass SDRAM init run faster. 297f7d35bc1SSimon Glass 298f7d35bc1SSimon Glassconfig CACHE_MRC_SIZE_KB 299f7d35bc1SSimon Glass int 300f7d35bc1SSimon Glass depends on HAVE_MRC 301f7d35bc1SSimon Glass default 512 302f7d35bc1SSimon Glass help 303f7d35bc1SSimon Glass Sets the size of the cached area for the memory reference code. 304f7d35bc1SSimon Glass This ends at the end of SPI flash (address 0xffffffff) and is 305f7d35bc1SSimon Glass measured in KB. Typically this is set to 512, providing for 0.5MB 306f7d35bc1SSimon Glass of cached space. 307f7d35bc1SSimon Glass 308f7d35bc1SSimon Glassconfig DCACHE_RAM_BASE 309f7d35bc1SSimon Glass hex 310f7d35bc1SSimon Glass depends on HAVE_MRC 311f7d35bc1SSimon Glass help 312f7d35bc1SSimon Glass Sets the base of the data cache area in memory space. This is the 313f7d35bc1SSimon Glass start address of the cache-as-RAM (CAR) area and the address varies 314f7d35bc1SSimon Glass depending on the CPU. Once CAR is set up, read/write memory becomes 315f7d35bc1SSimon Glass available at this address and can be used temporarily until SDRAM 316f7d35bc1SSimon Glass is working. 317f7d35bc1SSimon Glass 318f7d35bc1SSimon Glassconfig DCACHE_RAM_SIZE 319f7d35bc1SSimon Glass hex 320f7d35bc1SSimon Glass depends on HAVE_MRC 321f7d35bc1SSimon Glass default 0x40000 322f7d35bc1SSimon Glass help 323f7d35bc1SSimon Glass Sets the total size of the data cache area in memory space. This 324f7d35bc1SSimon Glass sets the size of the cache-as-RAM (CAR) area. Note that much of the 325f7d35bc1SSimon Glass CAR space is required by the MRC. The CAR space available to U-Boot 326f7d35bc1SSimon Glass is normally at the start and typically extends to 1/4 or 1/2 of the 327f7d35bc1SSimon Glass available size. 328f7d35bc1SSimon Glass 329f7d35bc1SSimon Glassconfig DCACHE_RAM_MRC_VAR_SIZE 330f7d35bc1SSimon Glass hex 331f7d35bc1SSimon Glass depends on HAVE_MRC 332f7d35bc1SSimon Glass help 333f7d35bc1SSimon Glass This is the amount of CAR (Cache as RAM) reserved for use by the 334f7d35bc1SSimon Glass memory reference code. This depends on the implementation of the 335f7d35bc1SSimon Glass memory reference code and must be set correctly or the board will 336f7d35bc1SSimon Glass not boot. 337f7d35bc1SSimon Glass 3380adf8d35SSimon Glassconfig HAVE_REFCODE 3390adf8d35SSimon Glass bool "Add a Reference Code binary" 3400adf8d35SSimon Glass help 3410adf8d35SSimon Glass Select this option to add a Reference Code binary to the resulting 3420adf8d35SSimon Glass U-Boot image. This is an Intel binary blob that handles system 3430adf8d35SSimon Glass initialisation, in this case the PCH and System Agent. 3440adf8d35SSimon Glass 3450adf8d35SSimon Glass Note: Without this binary (on platforms that need it such as 3460adf8d35SSimon Glass broadwell) U-Boot will be missing some critical setup steps. 3470adf8d35SSimon Glass Various peripherals may fail to work. 3480adf8d35SSimon Glass 3494c71322bSBin Mengconfig SMP 3504c71322bSBin Meng bool "Enable Symmetric Multiprocessing" 3514c71322bSBin Meng default n 3524c71322bSBin Meng help 3534c71322bSBin Meng Enable use of more than one CPU in U-Boot and the Operating System 3544c71322bSBin Meng when loaded. Each CPU will be started up and information can be 3554c71322bSBin Meng obtained using the 'cpu' command. If this option is disabled, then 3564c71322bSBin Meng only one CPU will be enabled regardless of the number of CPUs 3574c71322bSBin Meng available. 3584c71322bSBin Meng 35945b5a378SSimon Glassconfig MAX_CPUS 36045b5a378SSimon Glass int "Maximum number of CPUs permitted" 361063374d2SBin Meng depends on SMP 36245b5a378SSimon Glass default 4 36345b5a378SSimon Glass help 36445b5a378SSimon Glass When using multi-CPU chips it is possible for U-Boot to start up 36545b5a378SSimon Glass more than one CPU. The stack memory used by all of these CPUs is 36645b5a378SSimon Glass pre-allocated so at present U-Boot wants to know the maximum 36745b5a378SSimon Glass number of CPUs that may be present. Set this to at least as high 36845b5a378SSimon Glass as the number of CPUs in your system (it uses about 4KB of RAM for 36945b5a378SSimon Glass each CPU). 37045b5a378SSimon Glass 37145b5a378SSimon Glassconfig AP_STACK_SIZE 37245b5a378SSimon Glass hex 373063374d2SBin Meng depends on SMP 37445b5a378SSimon Glass default 0x1000 37545b5a378SSimon Glass help 37645b5a378SSimon Glass Each additional CPU started by U-Boot requires its own stack. This 37745b5a378SSimon Glass option sets the stack size used by each CPU and directly affects 37845b5a378SSimon Glass the memory used by this initialisation process. Typically 4KB is 37945b5a378SSimon Glass enough space. 38045b5a378SSimon Glass 381786a08e0SBin Mengconfig HAVE_VGA_BIOS 382786a08e0SBin Meng bool "Add a VGA BIOS image" 383786a08e0SBin Meng help 384786a08e0SBin Meng Select this option if you have a VGA BIOS image that you would 385786a08e0SBin Meng like to add to your ROM. 386786a08e0SBin Meng 387786a08e0SBin Mengconfig VGA_BIOS_FILE 388786a08e0SBin Meng string "VGA BIOS image filename" 389786a08e0SBin Meng depends on HAVE_VGA_BIOS 390786a08e0SBin Meng default "vga.bin" 391786a08e0SBin Meng help 392786a08e0SBin Meng The filename of the VGA BIOS image in the board directory. 393786a08e0SBin Meng 394786a08e0SBin Mengconfig VGA_BIOS_ADDR 395786a08e0SBin Meng hex "VGA BIOS image location" 396786a08e0SBin Meng depends on HAVE_VGA_BIOS 397786a08e0SBin Meng default 0xfff90000 398786a08e0SBin Meng help 399786a08e0SBin Meng The location of VGA BIOS image in the SPI flash. For example, base 400786a08e0SBin Meng address of 0xfff90000 indicates that the image will be put at offset 401786a08e0SBin Meng 0x90000 from the beginning of a 1MB flash device. 402786a08e0SBin Meng 403b5b6b019SBin Mengmenu "System tables" 4048744bef5SBin Meng depends on !EFI && !SYS_COREBOOT 405b5b6b019SBin Meng 406b5b6b019SBin Mengconfig GENERATE_PIRQ_TABLE 407b5b6b019SBin Meng bool "Generate a PIRQ table" 408b5b6b019SBin Meng default n 409b5b6b019SBin Meng help 410b5b6b019SBin Meng Generate a PIRQ routing table for this board. The PIRQ routing table 411b5b6b019SBin Meng is generated by U-Boot in the system memory from 0xf0000 to 0xfffff 412b5b6b019SBin Meng at every 16-byte boundary with a PCI IRQ routing signature ("$PIR"). 413b5b6b019SBin Meng It specifies the interrupt router information as well how all the PCI 414b5b6b019SBin Meng devices' interrupt pins are wired to PIRQs. 415b5b6b019SBin Meng 4166388e357SSimon Glassconfig GENERATE_SFI_TABLE 4176388e357SSimon Glass bool "Generate a SFI (Simple Firmware Interface) table" 4186388e357SSimon Glass help 4196388e357SSimon Glass The Simple Firmware Interface (SFI) provides a lightweight method 4206388e357SSimon Glass for platform firmware to pass information to the operating system 4216388e357SSimon Glass via static tables in memory. Kernel SFI support is required to 4226388e357SSimon Glass boot on SFI-only platforms. If you have ACPI tables then these are 4236388e357SSimon Glass used instead. 4246388e357SSimon Glass 4256388e357SSimon Glass U-Boot writes this table in write_sfi_table() just before booting 4266388e357SSimon Glass the OS. 4276388e357SSimon Glass 4286388e357SSimon Glass For more information, see http://simplefirmware.org 4296388e357SSimon Glass 43007545d86SBin Mengconfig GENERATE_MP_TABLE 43107545d86SBin Meng bool "Generate an MP (Multi-Processor) table" 43207545d86SBin Meng default n 43307545d86SBin Meng help 43407545d86SBin Meng Generate an MP (Multi-Processor) table for this board. The MP table 43507545d86SBin Meng provides a way for the operating system to support for symmetric 43607545d86SBin Meng multiprocessing as well as symmetric I/O interrupt handling with 43707545d86SBin Meng the local APIC and I/O APIC. 43807545d86SBin Meng 439867bcb63SSaket Sinhaconfig GENERATE_ACPI_TABLE 440867bcb63SSaket Sinha bool "Generate an ACPI (Advanced Configuration and Power Interface) table" 441867bcb63SSaket Sinha default n 442*fcf5c041SMiao Yan select QFW if QEMU 443867bcb63SSaket Sinha help 444867bcb63SSaket Sinha The Advanced Configuration and Power Interface (ACPI) specification 445867bcb63SSaket Sinha provides an open standard for device configuration and management 446867bcb63SSaket Sinha by the operating system. It defines platform-independent interfaces 447867bcb63SSaket Sinha for configuration and power management monitoring. 448867bcb63SSaket Sinha 449721e992aSBin Mengconfig GENERATE_SMBIOS_TABLE 450721e992aSBin Meng bool "Generate an SMBIOS (System Management BIOS) table" 451721e992aSBin Meng default y 452721e992aSBin Meng help 453721e992aSBin Meng The System Management BIOS (SMBIOS) specification addresses how 454721e992aSBin Meng motherboard and system vendors present management information about 455721e992aSBin Meng their products in a standard format by extending the BIOS interface 456721e992aSBin Meng on Intel architecture systems. 457721e992aSBin Meng 458721e992aSBin Meng Check http://www.dmtf.org/standards/smbios for details. 459721e992aSBin Meng 460b5b6b019SBin Mengendmenu 461b5b6b019SBin Meng 462b5b6b019SBin Mengconfig MAX_PIRQ_LINKS 463b5b6b019SBin Meng int 464b5b6b019SBin Meng default 8 465b5b6b019SBin Meng help 466b5b6b019SBin Meng This variable specifies the number of PIRQ interrupt links which are 467b5b6b019SBin Meng routable. On most older chipsets, this is 4, PIRQA through PIRQD. 468b5b6b019SBin Meng Some newer chipsets offer more than four links, commonly up to PIRQH. 469b5b6b019SBin Meng 470b5b6b019SBin Mengconfig IRQ_SLOT_COUNT 471b5b6b019SBin Meng int 472b5b6b019SBin Meng default 128 473b5b6b019SBin Meng help 474b5b6b019SBin Meng U-Boot can support up to 254 IRQ slot info in the PIRQ routing table 475b5b6b019SBin Meng which in turns forms a table of exact 4KiB. The default value 128 476b5b6b019SBin Meng should be enough for most boards. If this does not fit your board, 477b5b6b019SBin Meng change it according to your needs. 478b5b6b019SBin Meng 4792d934e57SSimon Glassconfig PCIE_ECAM_BASE 4802d934e57SSimon Glass hex 4812d934e57SSimon Glass default 0xe0000000 4822d934e57SSimon Glass help 4832d934e57SSimon Glass This is the memory-mapped address of PCI configuration space, which 4842d934e57SSimon Glass is only available through the Enhanced Configuration Access 4852d934e57SSimon Glass Mechanism (ECAM) with PCI Express. It can be set up almost 4862d934e57SSimon Glass anywhere. Before it is set up, it is possible to access PCI 4872d934e57SSimon Glass configuration space through I/O access, but memory access is more 4882d934e57SSimon Glass convenient. Using this, PCI can be scanned and configured. This 4892d934e57SSimon Glass should be set to a region that does not conflict with memory 4902d934e57SSimon Glass assigned to PCI devices - i.e. the memory and prefetch regions, as 4912d934e57SSimon Glass passed to pci_set_region(). 4922d934e57SSimon Glass 4931ed6648bSBin Mengconfig PCIE_ECAM_SIZE 4941ed6648bSBin Meng hex 4951ed6648bSBin Meng default 0x10000000 4961ed6648bSBin Meng help 4971ed6648bSBin Meng This is the size of memory-mapped address of PCI configuration space, 4981ed6648bSBin Meng which is only available through the Enhanced Configuration Access 4991ed6648bSBin Meng Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory, 5001ed6648bSBin Meng so a default 0x10000000 size covers all of the 256 buses which is the 5011ed6648bSBin Meng maximum number of PCI buses as defined by the PCI specification. 5021ed6648bSBin Meng 5031eb39a50SBin Mengconfig I8259_PIC 5041eb39a50SBin Meng bool 5051eb39a50SBin Meng default y 5061eb39a50SBin Meng help 5071eb39a50SBin Meng Intel 8259 ISA compatible chipset incorporates two 8259 (master and 5081eb39a50SBin Meng slave) interrupt controllers. Include this to have U-Boot set up 5091eb39a50SBin Meng the interrupt correctly. 5101eb39a50SBin Meng 5111eb39a50SBin Mengconfig I8254_TIMER 5121eb39a50SBin Meng bool 5131eb39a50SBin Meng default y 5141eb39a50SBin Meng help 5151eb39a50SBin Meng Intel 8254 timer contains three counters which have fixed uses. 5161eb39a50SBin Meng Include this to have U-Boot set up the timer correctly. 5171eb39a50SBin Meng 5186b44ae6bSSimon Glassconfig I8042_KEYB 5196b44ae6bSSimon Glass default y 5206b44ae6bSSimon Glass 5216b44ae6bSSimon Glassconfig DM_KEYBOARD 5226b44ae6bSSimon Glass default y 5236b44ae6bSSimon Glass 5243cf23719SBin Mengconfig SEABIOS 5253cf23719SBin Meng bool "Support booting SeaBIOS" 5263cf23719SBin Meng help 5273cf23719SBin Meng SeaBIOS is an open source implementation of a 16-bit X86 BIOS. 5283cf23719SBin Meng It can run in an emulator or natively on X86 hardware with the use 5293cf23719SBin Meng of coreboot/U-Boot. By turning on this option, U-Boot prepares 5303cf23719SBin Meng all the configuration tables that are necessary to boot SeaBIOS. 5313cf23719SBin Meng 5323cf23719SBin Meng Check http://www.seabios.org/SeaBIOS for details. 5333cf23719SBin Meng 534e49cceacSSimon Glasssource "arch/x86/lib/efi/Kconfig" 535e49cceacSSimon Glass 536dd84058dSMasahiro Yamadaendmenu 537