1dd84058dSMasahiro Yamadamenu "x86 architecture" 2dd84058dSMasahiro Yamada depends on X86 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "x86" 6dd84058dSMasahiro Yamada 7dd84058dSMasahiro Yamadachoice 8a66ad67fSSimon Glass prompt "Run U-Boot in 32/64-bit mode" 9a66ad67fSSimon Glass default X86_RUN_32BIT 10a66ad67fSSimon Glass help 11a66ad67fSSimon Glass U-Boot can be built as a 32-bit binary which runs in 32-bit mode 12a66ad67fSSimon Glass even on 64-bit machines. In this case SPL is not used, and U-Boot 13a66ad67fSSimon Glass runs directly from the reset vector (via 16-bit start-up). 14a66ad67fSSimon Glass 15a66ad67fSSimon Glass Alternatively it can be run as a 64-bit binary, thus requiring a 16a66ad67fSSimon Glass 64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit 17a66ad67fSSimon Glass start-up) then jumps to U-Boot in 64-bit mode. 18a66ad67fSSimon Glass 19a66ad67fSSimon Glass For now, 32-bit mode is recommended, as 64-bit is still 20a66ad67fSSimon Glass experimental and is missing a lot of features. 21a66ad67fSSimon Glass 22a66ad67fSSimon Glassconfig X86_RUN_32BIT 23a66ad67fSSimon Glass bool "32-bit" 24a66ad67fSSimon Glass help 25a66ad67fSSimon Glass Build U-Boot as a 32-bit binary with no SPL. This is the currently 26a66ad67fSSimon Glass supported normal setup. U-Boot will stay in 32-bit mode even on 27a66ad67fSSimon Glass 64-bit machines. When booting a 64-bit kernel, U-Boot will switch 28a66ad67fSSimon Glass to 64-bit just before starting the kernel. Only the bottom 4GB of 29a66ad67fSSimon Glass memory can be accessed through normal means, although 30a66ad67fSSimon Glass arch_phys_memset() can be used for basic access to other memory. 31a66ad67fSSimon Glass 32a66ad67fSSimon Glassconfig X86_RUN_64BIT 33a66ad67fSSimon Glass bool "64-bit" 34a66ad67fSSimon Glass select X86_64 35a66ad67fSSimon Glass select SUPPORT_SPL 36a66ad67fSSimon Glass select SPL 37a66ad67fSSimon Glass select SPL_SEPARATE_BSS 38a66ad67fSSimon Glass help 39a66ad67fSSimon Glass Build U-Boot as a 64-bit binary with a 32-bit SPL. This is 40a66ad67fSSimon Glass experimental and many features are missing. U-Boot SPL starts up, 41a66ad67fSSimon Glass runs through the 16-bit and 32-bit init, then switches to 64-bit 42a66ad67fSSimon Glass mode and jumps to U-Boot proper. 43a66ad67fSSimon Glass 44a66ad67fSSimon Glassendchoice 45a66ad67fSSimon Glass 46a66ad67fSSimon Glassconfig X86_64 47a66ad67fSSimon Glass bool 48a66ad67fSSimon Glass 49a66ad67fSSimon Glassconfig SPL_X86_64 50a66ad67fSSimon Glass bool 51a66ad67fSSimon Glass depends on SPL 52a66ad67fSSimon Glass 53a66ad67fSSimon Glasschoice 5465c4ac0aSBin Meng prompt "Mainboard vendor" 5599a309f3SBin Meng default VENDOR_EMULATION 56dd84058dSMasahiro Yamada 57215099a5SGeorge McCollisterconfig VENDOR_ADVANTECH 58215099a5SGeorge McCollister bool "advantech" 59215099a5SGeorge McCollister 6082ceba2cSStefan Roeseconfig VENDOR_CONGATEC 6182ceba2cSStefan Roese bool "congatec" 6282ceba2cSStefan Roese 6365c4ac0aSBin Mengconfig VENDOR_COREBOOT 6465c4ac0aSBin Meng bool "coreboot" 658ef07571SSimon Glass 66b1ad6c69SStefan Roeseconfig VENDOR_DFI 67b1ad6c69SStefan Roese bool "dfi" 68b1ad6c69SStefan Roese 693dcdd17bSBen Stoltzconfig VENDOR_EFI 703dcdd17bSBen Stoltz bool "efi" 713dcdd17bSBen Stoltz 72a65b25d1SBin Mengconfig VENDOR_EMULATION 73a65b25d1SBin Meng bool "emulation" 74a65b25d1SBin Meng 7565c4ac0aSBin Mengconfig VENDOR_GOOGLE 7665c4ac0aSBin Meng bool "Google" 77dd84058dSMasahiro Yamada 7865c4ac0aSBin Mengconfig VENDOR_INTEL 7965c4ac0aSBin Meng bool "Intel" 80ef46bea0SBin Meng 81dd84058dSMasahiro Yamadaendchoice 82dd84058dSMasahiro Yamada 837a96fd8eSAndy Shevchenko# subarchitectures-specific options below 847a96fd8eSAndy Shevchenkoconfig INTEL_MID 857a96fd8eSAndy Shevchenko bool "Intel MID platform support" 86bb416465SFelipe Balbi select REGMAP 87bb416465SFelipe Balbi select SYSCON 887a96fd8eSAndy Shevchenko help 897a96fd8eSAndy Shevchenko Select to build a U-Boot capable of supporting Intel MID 907a96fd8eSAndy Shevchenko (Mobile Internet Device) platform systems which do not have 917a96fd8eSAndy Shevchenko the PCI legacy interfaces. 927a96fd8eSAndy Shevchenko 937a96fd8eSAndy Shevchenko If you are building for a PC class system say N here. 947a96fd8eSAndy Shevchenko 957a96fd8eSAndy Shevchenko Intel MID platforms are based on an Intel processor and 967a96fd8eSAndy Shevchenko chipset which consume less power than most of the x86 977a96fd8eSAndy Shevchenko derivatives. 987a96fd8eSAndy Shevchenko 9965c4ac0aSBin Meng# board-specific options below 100215099a5SGeorge McCollistersource "board/advantech/Kconfig" 10182ceba2cSStefan Roesesource "board/congatec/Kconfig" 10265c4ac0aSBin Mengsource "board/coreboot/Kconfig" 103b1ad6c69SStefan Roesesource "board/dfi/Kconfig" 1043e9aa320SBen Stoltzsource "board/efi/Kconfig" 105a65b25d1SBin Mengsource "board/emulation/Kconfig" 10665c4ac0aSBin Mengsource "board/google/Kconfig" 10765c4ac0aSBin Mengsource "board/intel/Kconfig" 10865c4ac0aSBin Meng 109029194a3SBin Meng# platform-specific options below 110029194a3SBin Mengsource "arch/x86/cpu/baytrail/Kconfig" 1112f3f477bSSimon Glasssource "arch/x86/cpu/broadwell/Kconfig" 112029194a3SBin Mengsource "arch/x86/cpu/coreboot/Kconfig" 113029194a3SBin Mengsource "arch/x86/cpu/ivybridge/Kconfig" 114a65b25d1SBin Mengsource "arch/x86/cpu/qemu/Kconfig" 115029194a3SBin Mengsource "arch/x86/cpu/quark/Kconfig" 116029194a3SBin Mengsource "arch/x86/cpu/queensbay/Kconfig" 117*e71de54aSFelipe Balbisource "arch/x86/cpu/tangier/Kconfig" 118029194a3SBin Meng 119029194a3SBin Meng# architecture-specific options below 120029194a3SBin Meng 121a219639dSSimon Glassconfig AHCI 122a219639dSSimon Glass default y 123a219639dSSimon Glass 124b724bd7dSSimon Glassconfig SYS_MALLOC_F_LEN 125b724bd7dSSimon Glass default 0x800 126b724bd7dSSimon Glass 12770a09c6cSSimon Glassconfig RAMBASE 12870a09c6cSSimon Glass hex 12970a09c6cSSimon Glass default 0x100000 13070a09c6cSSimon Glass 13170a09c6cSSimon Glassconfig XIP_ROM_SIZE 13270a09c6cSSimon Glass hex 1337698d36aSBin Meng depends on X86_RESET_VECTOR 134bbd43d65SSimon Glass default ROM_SIZE 13570a09c6cSSimon Glass 13670a09c6cSSimon Glassconfig CPU_ADDR_BITS 13770a09c6cSSimon Glass int 13870a09c6cSSimon Glass default 36 13970a09c6cSSimon Glass 14065dd74a6SSimon Glassconfig HPET_ADDRESS 14165dd74a6SSimon Glass hex 14265dd74a6SSimon Glass default 0xfed00000 if !HPET_ADDRESS_OVERRIDE 14365dd74a6SSimon Glass 14465dd74a6SSimon Glassconfig SMM_TSEG 14565dd74a6SSimon Glass bool 14665dd74a6SSimon Glass default n 14765dd74a6SSimon Glass 14865dd74a6SSimon Glassconfig SMM_TSEG_SIZE 14965dd74a6SSimon Glass hex 15065dd74a6SSimon Glass 1518cb20cccSBin Mengconfig X86_RESET_VECTOR 1528cb20cccSBin Meng bool 1538cb20cccSBin Meng default n 1548cb20cccSBin Meng 15513f1dc64SSimon Glass# The following options control where the 16-bit and 32-bit init lies 15613f1dc64SSimon Glass# If SPL is enabled then it normally holds this init code, and U-Boot proper 15713f1dc64SSimon Glass# is normally a 64-bit build. 15813f1dc64SSimon Glass# 15913f1dc64SSimon Glass# The 16-bit init refers to the reset vector and the small amount of code to 16013f1dc64SSimon Glass# get the processor into 32-bit mode. It may be in SPL or in U-Boot proper, 16113f1dc64SSimon Glass# or missing altogether if U-Boot is started from EFI or coreboot. 16213f1dc64SSimon Glass# 16313f1dc64SSimon Glass# The 32-bit init refers to processor init, running binary blobs including 16413f1dc64SSimon Glass# FSP, setting up interrupts and anything else that needs to be done in 16513f1dc64SSimon Glass# 32-bit code. It is normally in the same place as 16-bit init if that is 16613f1dc64SSimon Glass# enabled (i.e. they are both in SPL, or both in U-Boot proper). 16713f1dc64SSimon Glassconfig X86_16BIT_INIT 16813f1dc64SSimon Glass bool 16913f1dc64SSimon Glass depends on X86_RESET_VECTOR 17013f1dc64SSimon Glass default y if X86_RESET_VECTOR && !SPL 17113f1dc64SSimon Glass help 17213f1dc64SSimon Glass This is enabled when 16-bit init is in U-Boot proper 17313f1dc64SSimon Glass 17413f1dc64SSimon Glassconfig SPL_X86_16BIT_INIT 17513f1dc64SSimon Glass bool 17613f1dc64SSimon Glass depends on X86_RESET_VECTOR 17713f1dc64SSimon Glass default y if X86_RESET_VECTOR && SPL 17813f1dc64SSimon Glass help 17913f1dc64SSimon Glass This is enabled when 16-bit init is in SPL 18013f1dc64SSimon Glass 18113f1dc64SSimon Glassconfig X86_32BIT_INIT 18213f1dc64SSimon Glass bool 18313f1dc64SSimon Glass depends on X86_RESET_VECTOR 18413f1dc64SSimon Glass default y if X86_RESET_VECTOR && !SPL 18513f1dc64SSimon Glass help 18613f1dc64SSimon Glass This is enabled when 32-bit init is in U-Boot proper 18713f1dc64SSimon Glass 18813f1dc64SSimon Glassconfig SPL_X86_32BIT_INIT 18913f1dc64SSimon Glass bool 19013f1dc64SSimon Glass depends on X86_RESET_VECTOR 19113f1dc64SSimon Glass default y if X86_RESET_VECTOR && SPL 19213f1dc64SSimon Glass help 19313f1dc64SSimon Glass This is enabled when 32-bit init is in SPL 19413f1dc64SSimon Glass 195343fb990SBin Mengconfig RESET_SEG_START 196343fb990SBin Meng hex 197343fb990SBin Meng depends on X86_RESET_VECTOR 198343fb990SBin Meng default 0xffff0000 199343fb990SBin Meng 200343fb990SBin Mengconfig RESET_SEG_SIZE 201343fb990SBin Meng hex 202343fb990SBin Meng depends on X86_RESET_VECTOR 203343fb990SBin Meng default 0x10000 204343fb990SBin Meng 205343fb990SBin Mengconfig RESET_VEC_LOC 206343fb990SBin Meng hex 207343fb990SBin Meng depends on X86_RESET_VECTOR 208343fb990SBin Meng default 0xfffffff0 209343fb990SBin Meng 2108cb20cccSBin Mengconfig SYS_X86_START16 2118cb20cccSBin Meng hex 2128cb20cccSBin Meng depends on X86_RESET_VECTOR 2138cb20cccSBin Meng default 0xfffff800 2148cb20cccSBin Meng 215446d4e04SAndy Shevchenkoconfig X86_LOAD_FROM_32_BIT 216446d4e04SAndy Shevchenko bool "Boot from a 32-bit program" 217446d4e04SAndy Shevchenko help 218446d4e04SAndy Shevchenko Define this to boot U-Boot from a 32-bit program which sets 219446d4e04SAndy Shevchenko the GDT differently. This can be used to boot directly from 220446d4e04SAndy Shevchenko any stage of coreboot, for example, bypassing the normal 221446d4e04SAndy Shevchenko payload-loading feature. 222446d4e04SAndy Shevchenko 22364542f46SBin Mengconfig BOARD_ROMSIZE_KB_512 22464542f46SBin Meng bool 22564542f46SBin Mengconfig BOARD_ROMSIZE_KB_1024 22664542f46SBin Meng bool 22764542f46SBin Mengconfig BOARD_ROMSIZE_KB_2048 22864542f46SBin Meng bool 22964542f46SBin Mengconfig BOARD_ROMSIZE_KB_4096 23064542f46SBin Meng bool 23164542f46SBin Mengconfig BOARD_ROMSIZE_KB_8192 23264542f46SBin Meng bool 23364542f46SBin Mengconfig BOARD_ROMSIZE_KB_16384 23464542f46SBin Meng bool 23564542f46SBin Meng 23664542f46SBin Mengchoice 23764542f46SBin Meng prompt "ROM chip size" 2387698d36aSBin Meng depends on X86_RESET_VECTOR 23964542f46SBin Meng default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512 24064542f46SBin Meng default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024 24164542f46SBin Meng default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048 24264542f46SBin Meng default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096 24364542f46SBin Meng default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192 24464542f46SBin Meng default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384 24564542f46SBin Meng help 24664542f46SBin Meng Select the size of the ROM chip you intend to flash U-Boot on. 24764542f46SBin Meng 24864542f46SBin Meng The build system will take care of creating a u-boot.rom file 24964542f46SBin Meng of the matching size. 25064542f46SBin Meng 25164542f46SBin Mengconfig UBOOT_ROMSIZE_KB_512 25264542f46SBin Meng bool "512 KB" 25364542f46SBin Meng help 25464542f46SBin Meng Choose this option if you have a 512 KB ROM chip. 25564542f46SBin Meng 25664542f46SBin Mengconfig UBOOT_ROMSIZE_KB_1024 25764542f46SBin Meng bool "1024 KB (1 MB)" 25864542f46SBin Meng help 25964542f46SBin Meng Choose this option if you have a 1024 KB (1 MB) ROM chip. 26064542f46SBin Meng 26164542f46SBin Mengconfig UBOOT_ROMSIZE_KB_2048 26264542f46SBin Meng bool "2048 KB (2 MB)" 26364542f46SBin Meng help 26464542f46SBin Meng Choose this option if you have a 2048 KB (2 MB) ROM chip. 26564542f46SBin Meng 26664542f46SBin Mengconfig UBOOT_ROMSIZE_KB_4096 26764542f46SBin Meng bool "4096 KB (4 MB)" 26864542f46SBin Meng help 26964542f46SBin Meng Choose this option if you have a 4096 KB (4 MB) ROM chip. 27064542f46SBin Meng 27164542f46SBin Mengconfig UBOOT_ROMSIZE_KB_8192 27264542f46SBin Meng bool "8192 KB (8 MB)" 27364542f46SBin Meng help 27464542f46SBin Meng Choose this option if you have a 8192 KB (8 MB) ROM chip. 27564542f46SBin Meng 27664542f46SBin Mengconfig UBOOT_ROMSIZE_KB_16384 27764542f46SBin Meng bool "16384 KB (16 MB)" 27864542f46SBin Meng help 27964542f46SBin Meng Choose this option if you have a 16384 KB (16 MB) ROM chip. 28064542f46SBin Meng 28164542f46SBin Mengendchoice 28264542f46SBin Meng 28364542f46SBin Meng# Map the config names to an integer (KB). 28464542f46SBin Mengconfig UBOOT_ROMSIZE_KB 28564542f46SBin Meng int 28664542f46SBin Meng default 512 if UBOOT_ROMSIZE_KB_512 28764542f46SBin Meng default 1024 if UBOOT_ROMSIZE_KB_1024 28864542f46SBin Meng default 2048 if UBOOT_ROMSIZE_KB_2048 28964542f46SBin Meng default 4096 if UBOOT_ROMSIZE_KB_4096 29064542f46SBin Meng default 8192 if UBOOT_ROMSIZE_KB_8192 29164542f46SBin Meng default 16384 if UBOOT_ROMSIZE_KB_16384 29264542f46SBin Meng 29364542f46SBin Meng# Map the config names to a hex value (bytes). 294fce7b276SSimon Glassconfig ROM_SIZE 295fce7b276SSimon Glass hex 29664542f46SBin Meng default 0x80000 if UBOOT_ROMSIZE_KB_512 29764542f46SBin Meng default 0x100000 if UBOOT_ROMSIZE_KB_1024 29864542f46SBin Meng default 0x200000 if UBOOT_ROMSIZE_KB_2048 29964542f46SBin Meng default 0x400000 if UBOOT_ROMSIZE_KB_4096 30064542f46SBin Meng default 0x800000 if UBOOT_ROMSIZE_KB_8192 30164542f46SBin Meng default 0xc00000 if UBOOT_ROMSIZE_KB_12288 30264542f46SBin Meng default 0x1000000 if UBOOT_ROMSIZE_KB_16384 303fce7b276SSimon Glass 304fce7b276SSimon Glassconfig HAVE_INTEL_ME 305fce7b276SSimon Glass bool "Platform requires Intel Management Engine" 306fce7b276SSimon Glass help 307fce7b276SSimon Glass Newer higher-end devices have an Intel Management Engine (ME) 308fce7b276SSimon Glass which is a very large binary blob (typically 1.5MB) which is 309fce7b276SSimon Glass required for the platform to work. This enforces a particular 310fce7b276SSimon Glass SPI flash format. You will need to supply the me.bin file in 311fce7b276SSimon Glass your board directory. 312fce7b276SSimon Glass 31365dd74a6SSimon Glassconfig X86_RAMTEST 31465dd74a6SSimon Glass bool "Perform a simple RAM test after SDRAM initialisation" 31565dd74a6SSimon Glass help 31665dd74a6SSimon Glass If there is something wrong with SDRAM then the platform will 31765dd74a6SSimon Glass often crash within U-Boot or the kernel. This option enables a 31865dd74a6SSimon Glass very simple RAM test that quickly checks whether the SDRAM seems 31965dd74a6SSimon Glass to work correctly. It is not exhaustive but can save time by 32065dd74a6SSimon Glass detecting obvious failures. 32165dd74a6SSimon Glass 3223dc0f844SStefan Roeseconfig FLASH_DESCRIPTOR_FILE 3233dc0f844SStefan Roese string "Flash descriptor binary filename" 3243dc0f844SStefan Roese depends on HAVE_INTEL_ME 3253dc0f844SStefan Roese default "descriptor.bin" 3263dc0f844SStefan Roese help 3273dc0f844SStefan Roese The filename of the file to use as flash descriptor in the 3283dc0f844SStefan Roese board directory. 3293dc0f844SStefan Roese 3303dc0f844SStefan Roeseconfig INTEL_ME_FILE 3313dc0f844SStefan Roese string "Intel Management Engine binary filename" 3323dc0f844SStefan Roese depends on HAVE_INTEL_ME 3333dc0f844SStefan Roese default "me.bin" 3343dc0f844SStefan Roese help 3353dc0f844SStefan Roese The filename of the file to use as Intel Management Engine in the 3363dc0f844SStefan Roese board directory. 3373dc0f844SStefan Roese 3388ce24cd9SSimon Glassconfig HAVE_FSP 3398ce24cd9SSimon Glass bool "Add an Firmware Support Package binary" 340e49cceacSSimon Glass depends on !EFI 3418ce24cd9SSimon Glass help 3428ce24cd9SSimon Glass Select this option to add an Firmware Support Package binary to 3438ce24cd9SSimon Glass the resulting U-Boot image. It is a binary blob which U-Boot uses 3448ce24cd9SSimon Glass to set up SDRAM and other chipset specific initialization. 3458ce24cd9SSimon Glass 3468ce24cd9SSimon Glass Note: Without this binary U-Boot will not be able to set up its 3478ce24cd9SSimon Glass SDRAM so will not boot. 3488ce24cd9SSimon Glass 3498ce24cd9SSimon Glassconfig FSP_FILE 3508ce24cd9SSimon Glass string "Firmware Support Package binary filename" 3518ce24cd9SSimon Glass depends on HAVE_FSP 3528ce24cd9SSimon Glass default "fsp.bin" 3538ce24cd9SSimon Glass help 3548ce24cd9SSimon Glass The filename of the file to use as Firmware Support Package binary 3558ce24cd9SSimon Glass in the board directory. 3568ce24cd9SSimon Glass 3578ce24cd9SSimon Glassconfig FSP_ADDR 3588ce24cd9SSimon Glass hex "Firmware Support Package binary location" 3598ce24cd9SSimon Glass depends on HAVE_FSP 3608ce24cd9SSimon Glass default 0xfffc0000 3618ce24cd9SSimon Glass help 3628ce24cd9SSimon Glass FSP is not Position Independent Code (PIC) and the whole FSP has to 3638ce24cd9SSimon Glass be rebased if it is placed at a location which is different from the 3648ce24cd9SSimon Glass perferred base address specified during the FSP build. Use Intel's 3658ce24cd9SSimon Glass Binary Configuration Tool (BCT) to do the rebase. 3668ce24cd9SSimon Glass 3678ce24cd9SSimon Glass The default base address of 0xfffc0000 indicates that the binary must 3688ce24cd9SSimon Glass be located at offset 0xc0000 from the beginning of a 1MB flash device. 3698ce24cd9SSimon Glass 3708ce24cd9SSimon Glassconfig FSP_TEMP_RAM_ADDR 3718ce24cd9SSimon Glass hex 372d04e30b8SBin Meng depends on HAVE_FSP 3738ce24cd9SSimon Glass default 0x2000000 3748ce24cd9SSimon Glass help 37548aa6c26SBin Meng Stack top address which is used in fsp_init() after DRAM is ready and 3768ce24cd9SSimon Glass CAR is disabled. 3778ce24cd9SSimon Glass 37857b10f59SBin Mengconfig FSP_SYS_MALLOC_F_LEN 37957b10f59SBin Meng hex 38057b10f59SBin Meng depends on HAVE_FSP 38157b10f59SBin Meng default 0x100000 38257b10f59SBin Meng help 38357b10f59SBin Meng Additional size of malloc() pool before relocation. 38457b10f59SBin Meng 3853340f2ccSBin Mengconfig FSP_USE_UPD 3863340f2ccSBin Meng bool 3873340f2ccSBin Meng depends on HAVE_FSP 3883340f2ccSBin Meng default y 3893340f2ccSBin Meng help 3903340f2ccSBin Meng Most FSPs use UPD data region for some FSP customization. But there 3913340f2ccSBin Meng are still some FSPs that might not even have UPD. For such FSPs, 3923340f2ccSBin Meng override this to n in their platform Kconfig files. 3933340f2ccSBin Meng 394dc5be508SBin Mengconfig FSP_BROKEN_HOB 395dc5be508SBin Meng bool 396dc5be508SBin Meng depends on HAVE_FSP 397dc5be508SBin Meng help 398dc5be508SBin Meng Indicate some buggy FSPs that does not report memory used by FSP 399dc5be508SBin Meng itself as reserved in the resource descriptor HOB. Select this to 400dc5be508SBin Meng tell U-Boot to do some additional work to ensure U-Boot relocation 401dc5be508SBin Meng do not overwrite the important boot service data which is used by 402dc5be508SBin Meng FSP, otherwise the subsequent call to fsp_notify() will fail. 403dc5be508SBin Meng 404e2d76e95SBin Mengconfig ENABLE_MRC_CACHE 405e2d76e95SBin Meng bool "Enable MRC cache" 406e2d76e95SBin Meng depends on !EFI && !SYS_COREBOOT 407e2d76e95SBin Meng help 408e2d76e95SBin Meng Enable this feature to cause MRC data to be cached in NV storage 409e2d76e95SBin Meng to be used for speeding up boot time on future reboots and/or 410e2d76e95SBin Meng power cycles. 411e2d76e95SBin Meng 4125c60a3abSBin Meng For platforms that use Intel FSP for the memory initialization, 4135c60a3abSBin Meng please check FSP output HOB via U-Boot command 'fsp hob' to see 4145c60a3abSBin Meng if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h). 4155c60a3abSBin Meng If such GUID does not exist, MRC cache is not avaiable on such 4165c60a3abSBin Meng platform (eg: Intel Queensbay), which means selecting this option 4175c60a3abSBin Meng here does not make any difference. 4185c60a3abSBin Meng 419f7d35bc1SSimon Glassconfig HAVE_MRC 420f7d35bc1SSimon Glass bool "Add a System Agent binary" 421f7d35bc1SSimon Glass depends on !HAVE_FSP 422f7d35bc1SSimon Glass help 423f7d35bc1SSimon Glass Select this option to add a System Agent binary to 424f7d35bc1SSimon Glass the resulting U-Boot image. MRC stands for Memory Reference Code. 425f7d35bc1SSimon Glass It is a binary blob which U-Boot uses to set up SDRAM. 426f7d35bc1SSimon Glass 427f7d35bc1SSimon Glass Note: Without this binary U-Boot will not be able to set up its 428f7d35bc1SSimon Glass SDRAM so will not boot. 429f7d35bc1SSimon Glass 430f7d35bc1SSimon Glassconfig CACHE_MRC_BIN 431f7d35bc1SSimon Glass bool 432f7d35bc1SSimon Glass depends on HAVE_MRC 433f7d35bc1SSimon Glass default n 434f7d35bc1SSimon Glass help 435f7d35bc1SSimon Glass Enable caching for the memory reference code binary. This uses an 436f7d35bc1SSimon Glass MTRR (memory type range register) to turn on caching for the section 437f7d35bc1SSimon Glass of SPI flash that contains the memory reference code. This makes 438f7d35bc1SSimon Glass SDRAM init run faster. 439f7d35bc1SSimon Glass 440f7d35bc1SSimon Glassconfig CACHE_MRC_SIZE_KB 441f7d35bc1SSimon Glass int 442f7d35bc1SSimon Glass depends on HAVE_MRC 443f7d35bc1SSimon Glass default 512 444f7d35bc1SSimon Glass help 445f7d35bc1SSimon Glass Sets the size of the cached area for the memory reference code. 446f7d35bc1SSimon Glass This ends at the end of SPI flash (address 0xffffffff) and is 447f7d35bc1SSimon Glass measured in KB. Typically this is set to 512, providing for 0.5MB 448f7d35bc1SSimon Glass of cached space. 449f7d35bc1SSimon Glass 450f7d35bc1SSimon Glassconfig DCACHE_RAM_BASE 451f7d35bc1SSimon Glass hex 452f7d35bc1SSimon Glass depends on HAVE_MRC 453f7d35bc1SSimon Glass help 454f7d35bc1SSimon Glass Sets the base of the data cache area in memory space. This is the 455f7d35bc1SSimon Glass start address of the cache-as-RAM (CAR) area and the address varies 456f7d35bc1SSimon Glass depending on the CPU. Once CAR is set up, read/write memory becomes 457f7d35bc1SSimon Glass available at this address and can be used temporarily until SDRAM 458f7d35bc1SSimon Glass is working. 459f7d35bc1SSimon Glass 460f7d35bc1SSimon Glassconfig DCACHE_RAM_SIZE 461f7d35bc1SSimon Glass hex 462f7d35bc1SSimon Glass depends on HAVE_MRC 463f7d35bc1SSimon Glass default 0x40000 464f7d35bc1SSimon Glass help 465f7d35bc1SSimon Glass Sets the total size of the data cache area in memory space. This 466f7d35bc1SSimon Glass sets the size of the cache-as-RAM (CAR) area. Note that much of the 467f7d35bc1SSimon Glass CAR space is required by the MRC. The CAR space available to U-Boot 468f7d35bc1SSimon Glass is normally at the start and typically extends to 1/4 or 1/2 of the 469f7d35bc1SSimon Glass available size. 470f7d35bc1SSimon Glass 471f7d35bc1SSimon Glassconfig DCACHE_RAM_MRC_VAR_SIZE 472f7d35bc1SSimon Glass hex 473f7d35bc1SSimon Glass depends on HAVE_MRC 474f7d35bc1SSimon Glass help 475f7d35bc1SSimon Glass This is the amount of CAR (Cache as RAM) reserved for use by the 476f7d35bc1SSimon Glass memory reference code. This depends on the implementation of the 477f7d35bc1SSimon Glass memory reference code and must be set correctly or the board will 478f7d35bc1SSimon Glass not boot. 479f7d35bc1SSimon Glass 4800adf8d35SSimon Glassconfig HAVE_REFCODE 4810adf8d35SSimon Glass bool "Add a Reference Code binary" 4820adf8d35SSimon Glass help 4830adf8d35SSimon Glass Select this option to add a Reference Code binary to the resulting 4840adf8d35SSimon Glass U-Boot image. This is an Intel binary blob that handles system 4850adf8d35SSimon Glass initialisation, in this case the PCH and System Agent. 4860adf8d35SSimon Glass 4870adf8d35SSimon Glass Note: Without this binary (on platforms that need it such as 4880adf8d35SSimon Glass broadwell) U-Boot will be missing some critical setup steps. 4890adf8d35SSimon Glass Various peripherals may fail to work. 4900adf8d35SSimon Glass 4914c71322bSBin Mengconfig SMP 4924c71322bSBin Meng bool "Enable Symmetric Multiprocessing" 4934c71322bSBin Meng default n 4944c71322bSBin Meng help 4954c71322bSBin Meng Enable use of more than one CPU in U-Boot and the Operating System 4964c71322bSBin Meng when loaded. Each CPU will be started up and information can be 4974c71322bSBin Meng obtained using the 'cpu' command. If this option is disabled, then 4984c71322bSBin Meng only one CPU will be enabled regardless of the number of CPUs 4994c71322bSBin Meng available. 5004c71322bSBin Meng 50145b5a378SSimon Glassconfig MAX_CPUS 50245b5a378SSimon Glass int "Maximum number of CPUs permitted" 503063374d2SBin Meng depends on SMP 50445b5a378SSimon Glass default 4 50545b5a378SSimon Glass help 50645b5a378SSimon Glass When using multi-CPU chips it is possible for U-Boot to start up 50745b5a378SSimon Glass more than one CPU. The stack memory used by all of these CPUs is 50845b5a378SSimon Glass pre-allocated so at present U-Boot wants to know the maximum 50945b5a378SSimon Glass number of CPUs that may be present. Set this to at least as high 51045b5a378SSimon Glass as the number of CPUs in your system (it uses about 4KB of RAM for 51145b5a378SSimon Glass each CPU). 51245b5a378SSimon Glass 51345b5a378SSimon Glassconfig AP_STACK_SIZE 51445b5a378SSimon Glass hex 515063374d2SBin Meng depends on SMP 51645b5a378SSimon Glass default 0x1000 51745b5a378SSimon Glass help 51845b5a378SSimon Glass Each additional CPU started by U-Boot requires its own stack. This 51945b5a378SSimon Glass option sets the stack size used by each CPU and directly affects 52045b5a378SSimon Glass the memory used by this initialisation process. Typically 4KB is 52145b5a378SSimon Glass enough space. 52245b5a378SSimon Glass 523786a08e0SBin Mengconfig HAVE_VGA_BIOS 524786a08e0SBin Meng bool "Add a VGA BIOS image" 525786a08e0SBin Meng help 526786a08e0SBin Meng Select this option if you have a VGA BIOS image that you would 527786a08e0SBin Meng like to add to your ROM. 528786a08e0SBin Meng 529786a08e0SBin Mengconfig VGA_BIOS_FILE 530786a08e0SBin Meng string "VGA BIOS image filename" 531786a08e0SBin Meng depends on HAVE_VGA_BIOS 532786a08e0SBin Meng default "vga.bin" 533786a08e0SBin Meng help 534786a08e0SBin Meng The filename of the VGA BIOS image in the board directory. 535786a08e0SBin Meng 536786a08e0SBin Mengconfig VGA_BIOS_ADDR 537786a08e0SBin Meng hex "VGA BIOS image location" 538786a08e0SBin Meng depends on HAVE_VGA_BIOS 539786a08e0SBin Meng default 0xfff90000 540786a08e0SBin Meng help 541786a08e0SBin Meng The location of VGA BIOS image in the SPI flash. For example, base 542786a08e0SBin Meng address of 0xfff90000 indicates that the image will be put at offset 543786a08e0SBin Meng 0x90000 from the beginning of a 1MB flash device. 544786a08e0SBin Meng 545b5b6b019SBin Mengmenu "System tables" 5468744bef5SBin Meng depends on !EFI && !SYS_COREBOOT 547b5b6b019SBin Meng 548b5b6b019SBin Mengconfig GENERATE_PIRQ_TABLE 549b5b6b019SBin Meng bool "Generate a PIRQ table" 550b5b6b019SBin Meng default n 551b5b6b019SBin Meng help 552b5b6b019SBin Meng Generate a PIRQ routing table for this board. The PIRQ routing table 553b5b6b019SBin Meng is generated by U-Boot in the system memory from 0xf0000 to 0xfffff 554b5b6b019SBin Meng at every 16-byte boundary with a PCI IRQ routing signature ("$PIR"). 555b5b6b019SBin Meng It specifies the interrupt router information as well how all the PCI 556b5b6b019SBin Meng devices' interrupt pins are wired to PIRQs. 557b5b6b019SBin Meng 5586388e357SSimon Glassconfig GENERATE_SFI_TABLE 5596388e357SSimon Glass bool "Generate a SFI (Simple Firmware Interface) table" 5606388e357SSimon Glass help 5616388e357SSimon Glass The Simple Firmware Interface (SFI) provides a lightweight method 5626388e357SSimon Glass for platform firmware to pass information to the operating system 5636388e357SSimon Glass via static tables in memory. Kernel SFI support is required to 5646388e357SSimon Glass boot on SFI-only platforms. If you have ACPI tables then these are 5656388e357SSimon Glass used instead. 5666388e357SSimon Glass 5676388e357SSimon Glass U-Boot writes this table in write_sfi_table() just before booting 5686388e357SSimon Glass the OS. 5696388e357SSimon Glass 5706388e357SSimon Glass For more information, see http://simplefirmware.org 5716388e357SSimon Glass 57207545d86SBin Mengconfig GENERATE_MP_TABLE 57307545d86SBin Meng bool "Generate an MP (Multi-Processor) table" 57407545d86SBin Meng default n 57507545d86SBin Meng help 57607545d86SBin Meng Generate an MP (Multi-Processor) table for this board. The MP table 57707545d86SBin Meng provides a way for the operating system to support for symmetric 57807545d86SBin Meng multiprocessing as well as symmetric I/O interrupt handling with 57907545d86SBin Meng the local APIC and I/O APIC. 58007545d86SBin Meng 581867bcb63SSaket Sinhaconfig GENERATE_ACPI_TABLE 582867bcb63SSaket Sinha bool "Generate an ACPI (Advanced Configuration and Power Interface) table" 583867bcb63SSaket Sinha default n 584fcf5c041SMiao Yan select QFW if QEMU 585867bcb63SSaket Sinha help 586867bcb63SSaket Sinha The Advanced Configuration and Power Interface (ACPI) specification 587867bcb63SSaket Sinha provides an open standard for device configuration and management 588867bcb63SSaket Sinha by the operating system. It defines platform-independent interfaces 589867bcb63SSaket Sinha for configuration and power management monitoring. 590867bcb63SSaket Sinha 591b5b6b019SBin Mengendmenu 592b5b6b019SBin Meng 5934372c111SBin Mengconfig HAVE_ACPI_RESUME 5944372c111SBin Meng bool "Enable ACPI S3 resume" 5954372c111SBin Meng help 5964372c111SBin Meng Select this to enable ACPI S3 resume. S3 is an ACPI-defined sleeping 5974372c111SBin Meng state where all system context is lost except system memory. U-Boot 5984372c111SBin Meng is responsible for restoring the machine state as it was before sleep. 5994372c111SBin Meng It needs restore the memory controller, without overwriting memory 6004372c111SBin Meng which is not marked as reserved. For the peripherals which lose their 6014372c111SBin Meng registers, U-Boot needs to write the original value. When everything 6024372c111SBin Meng is done, U-Boot needs to find out the wakeup vector provided by OSes 6034372c111SBin Meng and jump there. 6044372c111SBin Meng 60568769ebcSBin Mengconfig S3_VGA_ROM_RUN 60668769ebcSBin Meng bool "Re-run VGA option ROMs on S3 resume" 60768769ebcSBin Meng depends on HAVE_ACPI_RESUME 60868769ebcSBin Meng default y if HAVE_ACPI_RESUME 60968769ebcSBin Meng help 61068769ebcSBin Meng Execute VGA option ROMs in U-Boot when resuming from S3. Normally 61168769ebcSBin Meng this is needed when graphics console is being used in the kernel. 61268769ebcSBin Meng 61368769ebcSBin Meng Turning it off can reduce some resume time, but be aware that your 61468769ebcSBin Meng graphics console won't work without VGA options ROMs. Set it to N 61568769ebcSBin Meng if your kernel is only on a serial console. 61668769ebcSBin Meng 6177d0d2efeSBin Mengconfig STACK_SIZE 6187d0d2efeSBin Meng hex 6197d0d2efeSBin Meng depends on HAVE_ACPI_RESUME 6207d0d2efeSBin Meng default 0x1000 6217d0d2efeSBin Meng help 6227d0d2efeSBin Meng Estimated U-Boot's runtime stack size that needs to be reserved 6237d0d2efeSBin Meng during an ACPI S3 resume. 6247d0d2efeSBin Meng 625b5b6b019SBin Mengconfig MAX_PIRQ_LINKS 626b5b6b019SBin Meng int 627b5b6b019SBin Meng default 8 628b5b6b019SBin Meng help 629b5b6b019SBin Meng This variable specifies the number of PIRQ interrupt links which are 630b5b6b019SBin Meng routable. On most older chipsets, this is 4, PIRQA through PIRQD. 631b5b6b019SBin Meng Some newer chipsets offer more than four links, commonly up to PIRQH. 632b5b6b019SBin Meng 633b5b6b019SBin Mengconfig IRQ_SLOT_COUNT 634b5b6b019SBin Meng int 635b5b6b019SBin Meng default 128 636b5b6b019SBin Meng help 637b5b6b019SBin Meng U-Boot can support up to 254 IRQ slot info in the PIRQ routing table 638b5b6b019SBin Meng which in turns forms a table of exact 4KiB. The default value 128 639b5b6b019SBin Meng should be enough for most boards. If this does not fit your board, 640b5b6b019SBin Meng change it according to your needs. 641b5b6b019SBin Meng 6422d934e57SSimon Glassconfig PCIE_ECAM_BASE 6432d934e57SSimon Glass hex 6442d934e57SSimon Glass default 0xe0000000 6452d934e57SSimon Glass help 6462d934e57SSimon Glass This is the memory-mapped address of PCI configuration space, which 6472d934e57SSimon Glass is only available through the Enhanced Configuration Access 6482d934e57SSimon Glass Mechanism (ECAM) with PCI Express. It can be set up almost 6492d934e57SSimon Glass anywhere. Before it is set up, it is possible to access PCI 6502d934e57SSimon Glass configuration space through I/O access, but memory access is more 6512d934e57SSimon Glass convenient. Using this, PCI can be scanned and configured. This 6522d934e57SSimon Glass should be set to a region that does not conflict with memory 6532d934e57SSimon Glass assigned to PCI devices - i.e. the memory and prefetch regions, as 6542d934e57SSimon Glass passed to pci_set_region(). 6552d934e57SSimon Glass 6561ed6648bSBin Mengconfig PCIE_ECAM_SIZE 6571ed6648bSBin Meng hex 6581ed6648bSBin Meng default 0x10000000 6591ed6648bSBin Meng help 6601ed6648bSBin Meng This is the size of memory-mapped address of PCI configuration space, 6611ed6648bSBin Meng which is only available through the Enhanced Configuration Access 6621ed6648bSBin Meng Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory, 6631ed6648bSBin Meng so a default 0x10000000 size covers all of the 256 buses which is the 6641ed6648bSBin Meng maximum number of PCI buses as defined by the PCI specification. 6651ed6648bSBin Meng 6661eb39a50SBin Mengconfig I8259_PIC 6671eb39a50SBin Meng bool 6681eb39a50SBin Meng default y 6691eb39a50SBin Meng help 6701eb39a50SBin Meng Intel 8259 ISA compatible chipset incorporates two 8259 (master and 6711eb39a50SBin Meng slave) interrupt controllers. Include this to have U-Boot set up 6721eb39a50SBin Meng the interrupt correctly. 6731eb39a50SBin Meng 6741eb39a50SBin Mengconfig I8254_TIMER 6751eb39a50SBin Meng bool 6761eb39a50SBin Meng default y 6771eb39a50SBin Meng help 6781eb39a50SBin Meng Intel 8254 timer contains three counters which have fixed uses. 6791eb39a50SBin Meng Include this to have U-Boot set up the timer correctly. 6801eb39a50SBin Meng 6813cf23719SBin Mengconfig SEABIOS 6823cf23719SBin Meng bool "Support booting SeaBIOS" 6833cf23719SBin Meng help 6843cf23719SBin Meng SeaBIOS is an open source implementation of a 16-bit X86 BIOS. 6853cf23719SBin Meng It can run in an emulator or natively on X86 hardware with the use 6863cf23719SBin Meng of coreboot/U-Boot. By turning on this option, U-Boot prepares 6873cf23719SBin Meng all the configuration tables that are necessary to boot SeaBIOS. 6883cf23719SBin Meng 6893cf23719SBin Meng Check http://www.seabios.org/SeaBIOS for details. 6903cf23719SBin Meng 691789b6dceSBin Mengconfig HIGH_TABLE_SIZE 692789b6dceSBin Meng hex "Size of configuration tables which reside in high memory" 693789b6dceSBin Meng default 0x10000 694789b6dceSBin Meng depends on SEABIOS 695789b6dceSBin Meng help 696789b6dceSBin Meng SeaBIOS itself resides in E seg and F seg, where U-Boot puts all 697789b6dceSBin Meng configuration tables like PIRQ/MP/ACPI. To avoid conflicts, U-Boot 698789b6dceSBin Meng puts a copy of configuration tables in high memory region which 699789b6dceSBin Meng is reserved on the stack before relocation. The region size is 700789b6dceSBin Meng determined by this option. 701789b6dceSBin Meng 702789b6dceSBin Meng Increse it if the default size does not fit the board's needs. 703789b6dceSBin Meng This is most likely due to a large ACPI DSDT table is used. 704789b6dceSBin Meng 705e49cceacSSimon Glasssource "arch/x86/lib/efi/Kconfig" 706e49cceacSSimon Glass 707dd84058dSMasahiro Yamadaendmenu 708