1dd84058dSMasahiro Yamadamenu "x86 architecture" 2dd84058dSMasahiro Yamada depends on X86 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "x86" 6dd84058dSMasahiro Yamada 745ccec8fSMasahiro Yamadaconfig USE_PRIVATE_LIBGCC 845ccec8fSMasahiro Yamada default y 945ccec8fSMasahiro Yamada 108156345dSSimon Glassconfig SYS_VSNPRINTF 118156345dSSimon Glass default y 128156345dSSimon Glass 13dd84058dSMasahiro Yamadachoice 1465c4ac0aSBin Meng prompt "Mainboard vendor" 1599a309f3SBin Meng default VENDOR_EMULATION 16dd84058dSMasahiro Yamada 1765c4ac0aSBin Mengconfig VENDOR_COREBOOT 1865c4ac0aSBin Meng bool "coreboot" 198ef07571SSimon Glass 20a65b25d1SBin Mengconfig VENDOR_EMULATION 21a65b25d1SBin Meng bool "emulation" 22a65b25d1SBin Meng 2365c4ac0aSBin Mengconfig VENDOR_GOOGLE 2465c4ac0aSBin Meng bool "Google" 25dd84058dSMasahiro Yamada 2665c4ac0aSBin Mengconfig VENDOR_INTEL 2765c4ac0aSBin Meng bool "Intel" 28ef46bea0SBin Meng 29dd84058dSMasahiro Yamadaendchoice 30dd84058dSMasahiro Yamada 3165c4ac0aSBin Meng# board-specific options below 3265c4ac0aSBin Mengsource "board/coreboot/Kconfig" 33a65b25d1SBin Mengsource "board/emulation/Kconfig" 3465c4ac0aSBin Mengsource "board/google/Kconfig" 3565c4ac0aSBin Mengsource "board/intel/Kconfig" 3665c4ac0aSBin Meng 37029194a3SBin Meng# platform-specific options below 38029194a3SBin Mengsource "arch/x86/cpu/baytrail/Kconfig" 39029194a3SBin Mengsource "arch/x86/cpu/coreboot/Kconfig" 40029194a3SBin Mengsource "arch/x86/cpu/ivybridge/Kconfig" 41a65b25d1SBin Mengsource "arch/x86/cpu/qemu/Kconfig" 42029194a3SBin Mengsource "arch/x86/cpu/quark/Kconfig" 43029194a3SBin Mengsource "arch/x86/cpu/queensbay/Kconfig" 44029194a3SBin Meng 45029194a3SBin Meng# architecture-specific options below 46029194a3SBin Meng 47b724bd7dSSimon Glassconfig SYS_MALLOC_F_LEN 48b724bd7dSSimon Glass default 0x800 49b724bd7dSSimon Glass 5070a09c6cSSimon Glassconfig RAMBASE 5170a09c6cSSimon Glass hex 5270a09c6cSSimon Glass default 0x100000 5370a09c6cSSimon Glass 5470a09c6cSSimon Glassconfig XIP_ROM_SIZE 5570a09c6cSSimon Glass hex 567698d36aSBin Meng depends on X86_RESET_VECTOR 57bbd43d65SSimon Glass default ROM_SIZE 5870a09c6cSSimon Glass 5970a09c6cSSimon Glassconfig CPU_ADDR_BITS 6070a09c6cSSimon Glass int 6170a09c6cSSimon Glass default 36 6270a09c6cSSimon Glass 6365dd74a6SSimon Glassconfig HPET_ADDRESS 6465dd74a6SSimon Glass hex 6565dd74a6SSimon Glass default 0xfed00000 if !HPET_ADDRESS_OVERRIDE 6665dd74a6SSimon Glass 6765dd74a6SSimon Glassconfig SMM_TSEG 6865dd74a6SSimon Glass bool 6965dd74a6SSimon Glass default n 7065dd74a6SSimon Glass 7165dd74a6SSimon Glassconfig SMM_TSEG_SIZE 7265dd74a6SSimon Glass hex 7365dd74a6SSimon Glass 748cb20cccSBin Mengconfig X86_RESET_VECTOR 758cb20cccSBin Meng bool 768cb20cccSBin Meng default n 778cb20cccSBin Meng 788cb20cccSBin Mengconfig SYS_X86_START16 798cb20cccSBin Meng hex 808cb20cccSBin Meng depends on X86_RESET_VECTOR 818cb20cccSBin Meng default 0xfffff800 828cb20cccSBin Meng 8364542f46SBin Mengconfig BOARD_ROMSIZE_KB_512 8464542f46SBin Meng bool 8564542f46SBin Mengconfig BOARD_ROMSIZE_KB_1024 8664542f46SBin Meng bool 8764542f46SBin Mengconfig BOARD_ROMSIZE_KB_2048 8864542f46SBin Meng bool 8964542f46SBin Mengconfig BOARD_ROMSIZE_KB_4096 9064542f46SBin Meng bool 9164542f46SBin Mengconfig BOARD_ROMSIZE_KB_8192 9264542f46SBin Meng bool 9364542f46SBin Mengconfig BOARD_ROMSIZE_KB_16384 9464542f46SBin Meng bool 9564542f46SBin Meng 9664542f46SBin Mengchoice 9764542f46SBin Meng prompt "ROM chip size" 987698d36aSBin Meng depends on X86_RESET_VECTOR 9964542f46SBin Meng default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512 10064542f46SBin Meng default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024 10164542f46SBin Meng default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048 10264542f46SBin Meng default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096 10364542f46SBin Meng default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192 10464542f46SBin Meng default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384 10564542f46SBin Meng help 10664542f46SBin Meng Select the size of the ROM chip you intend to flash U-Boot on. 10764542f46SBin Meng 10864542f46SBin Meng The build system will take care of creating a u-boot.rom file 10964542f46SBin Meng of the matching size. 11064542f46SBin Meng 11164542f46SBin Mengconfig UBOOT_ROMSIZE_KB_512 11264542f46SBin Meng bool "512 KB" 11364542f46SBin Meng help 11464542f46SBin Meng Choose this option if you have a 512 KB ROM chip. 11564542f46SBin Meng 11664542f46SBin Mengconfig UBOOT_ROMSIZE_KB_1024 11764542f46SBin Meng bool "1024 KB (1 MB)" 11864542f46SBin Meng help 11964542f46SBin Meng Choose this option if you have a 1024 KB (1 MB) ROM chip. 12064542f46SBin Meng 12164542f46SBin Mengconfig UBOOT_ROMSIZE_KB_2048 12264542f46SBin Meng bool "2048 KB (2 MB)" 12364542f46SBin Meng help 12464542f46SBin Meng Choose this option if you have a 2048 KB (2 MB) ROM chip. 12564542f46SBin Meng 12664542f46SBin Mengconfig UBOOT_ROMSIZE_KB_4096 12764542f46SBin Meng bool "4096 KB (4 MB)" 12864542f46SBin Meng help 12964542f46SBin Meng Choose this option if you have a 4096 KB (4 MB) ROM chip. 13064542f46SBin Meng 13164542f46SBin Mengconfig UBOOT_ROMSIZE_KB_8192 13264542f46SBin Meng bool "8192 KB (8 MB)" 13364542f46SBin Meng help 13464542f46SBin Meng Choose this option if you have a 8192 KB (8 MB) ROM chip. 13564542f46SBin Meng 13664542f46SBin Mengconfig UBOOT_ROMSIZE_KB_16384 13764542f46SBin Meng bool "16384 KB (16 MB)" 13864542f46SBin Meng help 13964542f46SBin Meng Choose this option if you have a 16384 KB (16 MB) ROM chip. 14064542f46SBin Meng 14164542f46SBin Mengendchoice 14264542f46SBin Meng 14364542f46SBin Meng# Map the config names to an integer (KB). 14464542f46SBin Mengconfig UBOOT_ROMSIZE_KB 14564542f46SBin Meng int 14664542f46SBin Meng default 512 if UBOOT_ROMSIZE_KB_512 14764542f46SBin Meng default 1024 if UBOOT_ROMSIZE_KB_1024 14864542f46SBin Meng default 2048 if UBOOT_ROMSIZE_KB_2048 14964542f46SBin Meng default 4096 if UBOOT_ROMSIZE_KB_4096 15064542f46SBin Meng default 8192 if UBOOT_ROMSIZE_KB_8192 15164542f46SBin Meng default 16384 if UBOOT_ROMSIZE_KB_16384 15264542f46SBin Meng 15364542f46SBin Meng# Map the config names to a hex value (bytes). 154fce7b276SSimon Glassconfig ROM_SIZE 155fce7b276SSimon Glass hex 15664542f46SBin Meng default 0x80000 if UBOOT_ROMSIZE_KB_512 15764542f46SBin Meng default 0x100000 if UBOOT_ROMSIZE_KB_1024 15864542f46SBin Meng default 0x200000 if UBOOT_ROMSIZE_KB_2048 15964542f46SBin Meng default 0x400000 if UBOOT_ROMSIZE_KB_4096 16064542f46SBin Meng default 0x800000 if UBOOT_ROMSIZE_KB_8192 16164542f46SBin Meng default 0xc00000 if UBOOT_ROMSIZE_KB_12288 16264542f46SBin Meng default 0x1000000 if UBOOT_ROMSIZE_KB_16384 163fce7b276SSimon Glass 164fce7b276SSimon Glassconfig HAVE_INTEL_ME 165fce7b276SSimon Glass bool "Platform requires Intel Management Engine" 166fce7b276SSimon Glass help 167fce7b276SSimon Glass Newer higher-end devices have an Intel Management Engine (ME) 168fce7b276SSimon Glass which is a very large binary blob (typically 1.5MB) which is 169fce7b276SSimon Glass required for the platform to work. This enforces a particular 170fce7b276SSimon Glass SPI flash format. You will need to supply the me.bin file in 171fce7b276SSimon Glass your board directory. 172fce7b276SSimon Glass 17365dd74a6SSimon Glassconfig X86_RAMTEST 17465dd74a6SSimon Glass bool "Perform a simple RAM test after SDRAM initialisation" 17565dd74a6SSimon Glass help 17665dd74a6SSimon Glass If there is something wrong with SDRAM then the platform will 17765dd74a6SSimon Glass often crash within U-Boot or the kernel. This option enables a 17865dd74a6SSimon Glass very simple RAM test that quickly checks whether the SDRAM seems 17965dd74a6SSimon Glass to work correctly. It is not exhaustive but can save time by 18065dd74a6SSimon Glass detecting obvious failures. 18165dd74a6SSimon Glass 18222465fc4SSimon Glassconfig MARK_GRAPHICS_MEM_WRCOMB 183d99b901eSBin Meng bool "Mark graphics memory as write-combining" 18422465fc4SSimon Glass default n 18522465fc4SSimon Glass help 18622465fc4SSimon Glass The graphics performance may increase if the graphics 18722465fc4SSimon Glass memory is set as write-combining cache type. This option 18822465fc4SSimon Glass enables marking the graphics memory as write-combining. 18922465fc4SSimon Glass 1908ce24cd9SSimon Glassconfig HAVE_FSP 1918ce24cd9SSimon Glass bool "Add an Firmware Support Package binary" 1928ce24cd9SSimon Glass help 1938ce24cd9SSimon Glass Select this option to add an Firmware Support Package binary to 1948ce24cd9SSimon Glass the resulting U-Boot image. It is a binary blob which U-Boot uses 1958ce24cd9SSimon Glass to set up SDRAM and other chipset specific initialization. 1968ce24cd9SSimon Glass 1978ce24cd9SSimon Glass Note: Without this binary U-Boot will not be able to set up its 1988ce24cd9SSimon Glass SDRAM so will not boot. 1998ce24cd9SSimon Glass 2008ce24cd9SSimon Glassconfig FSP_FILE 2018ce24cd9SSimon Glass string "Firmware Support Package binary filename" 2028ce24cd9SSimon Glass depends on HAVE_FSP 2038ce24cd9SSimon Glass default "fsp.bin" 2048ce24cd9SSimon Glass help 2058ce24cd9SSimon Glass The filename of the file to use as Firmware Support Package binary 2068ce24cd9SSimon Glass in the board directory. 2078ce24cd9SSimon Glass 2088ce24cd9SSimon Glassconfig FSP_ADDR 2098ce24cd9SSimon Glass hex "Firmware Support Package binary location" 2108ce24cd9SSimon Glass depends on HAVE_FSP 2118ce24cd9SSimon Glass default 0xfffc0000 2128ce24cd9SSimon Glass help 2138ce24cd9SSimon Glass FSP is not Position Independent Code (PIC) and the whole FSP has to 2148ce24cd9SSimon Glass be rebased if it is placed at a location which is different from the 2158ce24cd9SSimon Glass perferred base address specified during the FSP build. Use Intel's 2168ce24cd9SSimon Glass Binary Configuration Tool (BCT) to do the rebase. 2178ce24cd9SSimon Glass 2188ce24cd9SSimon Glass The default base address of 0xfffc0000 indicates that the binary must 2198ce24cd9SSimon Glass be located at offset 0xc0000 from the beginning of a 1MB flash device. 2208ce24cd9SSimon Glass 2218ce24cd9SSimon Glassconfig FSP_TEMP_RAM_ADDR 2228ce24cd9SSimon Glass hex 223*d04e30b8SBin Meng depends on HAVE_FSP 2248ce24cd9SSimon Glass default 0x2000000 2258ce24cd9SSimon Glass help 2268ce24cd9SSimon Glass Stack top address which is used in FspInit after DRAM is ready and 2278ce24cd9SSimon Glass CAR is disabled. 2288ce24cd9SSimon Glass 22945b5a378SSimon Glassconfig MAX_CPUS 23045b5a378SSimon Glass int "Maximum number of CPUs permitted" 23145b5a378SSimon Glass default 4 23245b5a378SSimon Glass help 23345b5a378SSimon Glass When using multi-CPU chips it is possible for U-Boot to start up 23445b5a378SSimon Glass more than one CPU. The stack memory used by all of these CPUs is 23545b5a378SSimon Glass pre-allocated so at present U-Boot wants to know the maximum 23645b5a378SSimon Glass number of CPUs that may be present. Set this to at least as high 23745b5a378SSimon Glass as the number of CPUs in your system (it uses about 4KB of RAM for 23845b5a378SSimon Glass each CPU). 23945b5a378SSimon Glass 24045b5a378SSimon Glassconfig SMP 24145b5a378SSimon Glass bool "Enable Symmetric Multiprocessing" 24245b5a378SSimon Glass default n 24345b5a378SSimon Glass help 24445b5a378SSimon Glass Enable use of more than one CPU in U-Boot and the Operating System 24545b5a378SSimon Glass when loaded. Each CPU will be started up and information can be 24645b5a378SSimon Glass obtained using the 'cpu' command. If this option is disabled, then 24745b5a378SSimon Glass only one CPU will be enabled regardless of the number of CPUs 24845b5a378SSimon Glass available. 24945b5a378SSimon Glass 25045b5a378SSimon Glassconfig AP_STACK_SIZE 25145b5a378SSimon Glass hex 25245b5a378SSimon Glass default 0x1000 25345b5a378SSimon Glass help 25445b5a378SSimon Glass Each additional CPU started by U-Boot requires its own stack. This 25545b5a378SSimon Glass option sets the stack size used by each CPU and directly affects 25645b5a378SSimon Glass the memory used by this initialisation process. Typically 4KB is 25745b5a378SSimon Glass enough space. 25845b5a378SSimon Glass 259f56aeaa4SBin Mengconfig TSC_CALIBRATION_BYPASS 260f56aeaa4SBin Meng bool "Bypass Time-Stamp Counter (TSC) calibration" 261f56aeaa4SBin Meng default n 262f56aeaa4SBin Meng help 263f56aeaa4SBin Meng By default U-Boot automatically calibrates Time-Stamp Counter (TSC) 264f56aeaa4SBin Meng running frequency via Model-Specific Register (MSR) and Programmable 265f56aeaa4SBin Meng Interval Timer (PIT). If the calibration does not work on your board, 266f56aeaa4SBin Meng select this option and provide a hardcoded TSC running frequency with 267f56aeaa4SBin Meng CONFIG_TSC_FREQ_IN_MHZ below. 268f56aeaa4SBin Meng 269f56aeaa4SBin Meng Normally this option should be turned on in a simulation environment 270f56aeaa4SBin Meng like qemu. 271f56aeaa4SBin Meng 272f56aeaa4SBin Mengconfig TSC_FREQ_IN_MHZ 273f56aeaa4SBin Meng int "Time-Stamp Counter (TSC) running frequency in MHz" 274f56aeaa4SBin Meng depends on TSC_CALIBRATION_BYPASS 275f56aeaa4SBin Meng default 1000 276f56aeaa4SBin Meng help 277f56aeaa4SBin Meng The running frequency in MHz of Time-Stamp Counter (TSC). 278f56aeaa4SBin Meng 279b5b6b019SBin Mengmenu "System tables" 280b5b6b019SBin Meng 281b5b6b019SBin Mengconfig GENERATE_PIRQ_TABLE 282b5b6b019SBin Meng bool "Generate a PIRQ table" 283b5b6b019SBin Meng default n 284b5b6b019SBin Meng help 285b5b6b019SBin Meng Generate a PIRQ routing table for this board. The PIRQ routing table 286b5b6b019SBin Meng is generated by U-Boot in the system memory from 0xf0000 to 0xfffff 287b5b6b019SBin Meng at every 16-byte boundary with a PCI IRQ routing signature ("$PIR"). 288b5b6b019SBin Meng It specifies the interrupt router information as well how all the PCI 289b5b6b019SBin Meng devices' interrupt pins are wired to PIRQs. 290b5b6b019SBin Meng 2916388e357SSimon Glassconfig GENERATE_SFI_TABLE 2926388e357SSimon Glass bool "Generate a SFI (Simple Firmware Interface) table" 2936388e357SSimon Glass help 2946388e357SSimon Glass The Simple Firmware Interface (SFI) provides a lightweight method 2956388e357SSimon Glass for platform firmware to pass information to the operating system 2966388e357SSimon Glass via static tables in memory. Kernel SFI support is required to 2976388e357SSimon Glass boot on SFI-only platforms. If you have ACPI tables then these are 2986388e357SSimon Glass used instead. 2996388e357SSimon Glass 3006388e357SSimon Glass U-Boot writes this table in write_sfi_table() just before booting 3016388e357SSimon Glass the OS. 3026388e357SSimon Glass 3036388e357SSimon Glass For more information, see http://simplefirmware.org 3046388e357SSimon Glass 305b5b6b019SBin Mengendmenu 306b5b6b019SBin Meng 307b5b6b019SBin Mengconfig MAX_PIRQ_LINKS 308b5b6b019SBin Meng int 309b5b6b019SBin Meng default 8 310b5b6b019SBin Meng help 311b5b6b019SBin Meng This variable specifies the number of PIRQ interrupt links which are 312b5b6b019SBin Meng routable. On most older chipsets, this is 4, PIRQA through PIRQD. 313b5b6b019SBin Meng Some newer chipsets offer more than four links, commonly up to PIRQH. 314b5b6b019SBin Meng 315b5b6b019SBin Mengconfig IRQ_SLOT_COUNT 316b5b6b019SBin Meng int 317b5b6b019SBin Meng default 128 318b5b6b019SBin Meng help 319b5b6b019SBin Meng U-Boot can support up to 254 IRQ slot info in the PIRQ routing table 320b5b6b019SBin Meng which in turns forms a table of exact 4KiB. The default value 128 321b5b6b019SBin Meng should be enough for most boards. If this does not fit your board, 322b5b6b019SBin Meng change it according to your needs. 323b5b6b019SBin Meng 3242d934e57SSimon Glassconfig PCIE_ECAM_BASE 3252d934e57SSimon Glass hex 3262d934e57SSimon Glass default 0xe0000000 3272d934e57SSimon Glass help 3282d934e57SSimon Glass This is the memory-mapped address of PCI configuration space, which 3292d934e57SSimon Glass is only available through the Enhanced Configuration Access 3302d934e57SSimon Glass Mechanism (ECAM) with PCI Express. It can be set up almost 3312d934e57SSimon Glass anywhere. Before it is set up, it is possible to access PCI 3322d934e57SSimon Glass configuration space through I/O access, but memory access is more 3332d934e57SSimon Glass convenient. Using this, PCI can be scanned and configured. This 3342d934e57SSimon Glass should be set to a region that does not conflict with memory 3352d934e57SSimon Glass assigned to PCI devices - i.e. the memory and prefetch regions, as 3362d934e57SSimon Glass passed to pci_set_region(). 3372d934e57SSimon Glass 338ee2b2434SSimon Glassconfig BOOTSTAGE 339ee2b2434SSimon Glass default y 340ee2b2434SSimon Glass 341ee2b2434SSimon Glassconfig BOOTSTAGE_REPORT 342ee2b2434SSimon Glass default y 343ee2b2434SSimon Glass 344ee2b2434SSimon Glassconfig CMD_BOOTSTAGE 345ee2b2434SSimon Glass default y 346ee2b2434SSimon Glass 347dd84058dSMasahiro Yamadaendmenu 348