1dd84058dSMasahiro Yamadamenu "x86 architecture" 2dd84058dSMasahiro Yamada depends on X86 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "x86" 6dd84058dSMasahiro Yamada 7dd84058dSMasahiro Yamadachoice 865c4ac0aSBin Meng prompt "Mainboard vendor" 999a309f3SBin Meng default VENDOR_EMULATION 10dd84058dSMasahiro Yamada 1165c4ac0aSBin Mengconfig VENDOR_COREBOOT 1265c4ac0aSBin Meng bool "coreboot" 138ef07571SSimon Glass 14a65b25d1SBin Mengconfig VENDOR_EMULATION 15a65b25d1SBin Meng bool "emulation" 16a65b25d1SBin Meng 1765c4ac0aSBin Mengconfig VENDOR_GOOGLE 1865c4ac0aSBin Meng bool "Google" 19dd84058dSMasahiro Yamada 2065c4ac0aSBin Mengconfig VENDOR_INTEL 2165c4ac0aSBin Meng bool "Intel" 22ef46bea0SBin Meng 23dd84058dSMasahiro Yamadaendchoice 24dd84058dSMasahiro Yamada 2565c4ac0aSBin Meng# board-specific options below 2665c4ac0aSBin Mengsource "board/coreboot/Kconfig" 27a65b25d1SBin Mengsource "board/emulation/Kconfig" 2865c4ac0aSBin Mengsource "board/google/Kconfig" 2965c4ac0aSBin Mengsource "board/intel/Kconfig" 3065c4ac0aSBin Meng 31029194a3SBin Meng# platform-specific options below 32029194a3SBin Mengsource "arch/x86/cpu/baytrail/Kconfig" 33029194a3SBin Mengsource "arch/x86/cpu/coreboot/Kconfig" 34029194a3SBin Mengsource "arch/x86/cpu/ivybridge/Kconfig" 35a65b25d1SBin Mengsource "arch/x86/cpu/qemu/Kconfig" 36029194a3SBin Mengsource "arch/x86/cpu/quark/Kconfig" 37029194a3SBin Mengsource "arch/x86/cpu/queensbay/Kconfig" 38029194a3SBin Meng 39029194a3SBin Meng# architecture-specific options below 40029194a3SBin Meng 41b724bd7dSSimon Glassconfig SYS_MALLOC_F_LEN 42b724bd7dSSimon Glass default 0x800 43b724bd7dSSimon Glass 4470a09c6cSSimon Glassconfig RAMBASE 4570a09c6cSSimon Glass hex 4670a09c6cSSimon Glass default 0x100000 4770a09c6cSSimon Glass 4870a09c6cSSimon Glassconfig XIP_ROM_SIZE 4970a09c6cSSimon Glass hex 507698d36aSBin Meng depends on X86_RESET_VECTOR 51bbd43d65SSimon Glass default ROM_SIZE 5270a09c6cSSimon Glass 5370a09c6cSSimon Glassconfig CPU_ADDR_BITS 5470a09c6cSSimon Glass int 5570a09c6cSSimon Glass default 36 5670a09c6cSSimon Glass 5765dd74a6SSimon Glassconfig HPET_ADDRESS 5865dd74a6SSimon Glass hex 5965dd74a6SSimon Glass default 0xfed00000 if !HPET_ADDRESS_OVERRIDE 6065dd74a6SSimon Glass 6165dd74a6SSimon Glassconfig SMM_TSEG 6265dd74a6SSimon Glass bool 6365dd74a6SSimon Glass default n 6465dd74a6SSimon Glass 6565dd74a6SSimon Glassconfig SMM_TSEG_SIZE 6665dd74a6SSimon Glass hex 6765dd74a6SSimon Glass 688cb20cccSBin Mengconfig X86_RESET_VECTOR 698cb20cccSBin Meng bool 708cb20cccSBin Meng default n 718cb20cccSBin Meng 72343fb990SBin Mengconfig RESET_SEG_START 73343fb990SBin Meng hex 74343fb990SBin Meng depends on X86_RESET_VECTOR 75343fb990SBin Meng default 0xffff0000 76343fb990SBin Meng 77343fb990SBin Mengconfig RESET_SEG_SIZE 78343fb990SBin Meng hex 79343fb990SBin Meng depends on X86_RESET_VECTOR 80343fb990SBin Meng default 0x10000 81343fb990SBin Meng 82343fb990SBin Mengconfig RESET_VEC_LOC 83343fb990SBin Meng hex 84343fb990SBin Meng depends on X86_RESET_VECTOR 85343fb990SBin Meng default 0xfffffff0 86343fb990SBin Meng 878cb20cccSBin Mengconfig SYS_X86_START16 888cb20cccSBin Meng hex 898cb20cccSBin Meng depends on X86_RESET_VECTOR 908cb20cccSBin Meng default 0xfffff800 918cb20cccSBin Meng 9264542f46SBin Mengconfig BOARD_ROMSIZE_KB_512 9364542f46SBin Meng bool 9464542f46SBin Mengconfig BOARD_ROMSIZE_KB_1024 9564542f46SBin Meng bool 9664542f46SBin Mengconfig BOARD_ROMSIZE_KB_2048 9764542f46SBin Meng bool 9864542f46SBin Mengconfig BOARD_ROMSIZE_KB_4096 9964542f46SBin Meng bool 10064542f46SBin Mengconfig BOARD_ROMSIZE_KB_8192 10164542f46SBin Meng bool 10264542f46SBin Mengconfig BOARD_ROMSIZE_KB_16384 10364542f46SBin Meng bool 10464542f46SBin Meng 10564542f46SBin Mengchoice 10664542f46SBin Meng prompt "ROM chip size" 1077698d36aSBin Meng depends on X86_RESET_VECTOR 10864542f46SBin Meng default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512 10964542f46SBin Meng default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024 11064542f46SBin Meng default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048 11164542f46SBin Meng default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096 11264542f46SBin Meng default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192 11364542f46SBin Meng default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384 11464542f46SBin Meng help 11564542f46SBin Meng Select the size of the ROM chip you intend to flash U-Boot on. 11664542f46SBin Meng 11764542f46SBin Meng The build system will take care of creating a u-boot.rom file 11864542f46SBin Meng of the matching size. 11964542f46SBin Meng 12064542f46SBin Mengconfig UBOOT_ROMSIZE_KB_512 12164542f46SBin Meng bool "512 KB" 12264542f46SBin Meng help 12364542f46SBin Meng Choose this option if you have a 512 KB ROM chip. 12464542f46SBin Meng 12564542f46SBin Mengconfig UBOOT_ROMSIZE_KB_1024 12664542f46SBin Meng bool "1024 KB (1 MB)" 12764542f46SBin Meng help 12864542f46SBin Meng Choose this option if you have a 1024 KB (1 MB) ROM chip. 12964542f46SBin Meng 13064542f46SBin Mengconfig UBOOT_ROMSIZE_KB_2048 13164542f46SBin Meng bool "2048 KB (2 MB)" 13264542f46SBin Meng help 13364542f46SBin Meng Choose this option if you have a 2048 KB (2 MB) ROM chip. 13464542f46SBin Meng 13564542f46SBin Mengconfig UBOOT_ROMSIZE_KB_4096 13664542f46SBin Meng bool "4096 KB (4 MB)" 13764542f46SBin Meng help 13864542f46SBin Meng Choose this option if you have a 4096 KB (4 MB) ROM chip. 13964542f46SBin Meng 14064542f46SBin Mengconfig UBOOT_ROMSIZE_KB_8192 14164542f46SBin Meng bool "8192 KB (8 MB)" 14264542f46SBin Meng help 14364542f46SBin Meng Choose this option if you have a 8192 KB (8 MB) ROM chip. 14464542f46SBin Meng 14564542f46SBin Mengconfig UBOOT_ROMSIZE_KB_16384 14664542f46SBin Meng bool "16384 KB (16 MB)" 14764542f46SBin Meng help 14864542f46SBin Meng Choose this option if you have a 16384 KB (16 MB) ROM chip. 14964542f46SBin Meng 15064542f46SBin Mengendchoice 15164542f46SBin Meng 15264542f46SBin Meng# Map the config names to an integer (KB). 15364542f46SBin Mengconfig UBOOT_ROMSIZE_KB 15464542f46SBin Meng int 15564542f46SBin Meng default 512 if UBOOT_ROMSIZE_KB_512 15664542f46SBin Meng default 1024 if UBOOT_ROMSIZE_KB_1024 15764542f46SBin Meng default 2048 if UBOOT_ROMSIZE_KB_2048 15864542f46SBin Meng default 4096 if UBOOT_ROMSIZE_KB_4096 15964542f46SBin Meng default 8192 if UBOOT_ROMSIZE_KB_8192 16064542f46SBin Meng default 16384 if UBOOT_ROMSIZE_KB_16384 16164542f46SBin Meng 16264542f46SBin Meng# Map the config names to a hex value (bytes). 163fce7b276SSimon Glassconfig ROM_SIZE 164fce7b276SSimon Glass hex 16564542f46SBin Meng default 0x80000 if UBOOT_ROMSIZE_KB_512 16664542f46SBin Meng default 0x100000 if UBOOT_ROMSIZE_KB_1024 16764542f46SBin Meng default 0x200000 if UBOOT_ROMSIZE_KB_2048 16864542f46SBin Meng default 0x400000 if UBOOT_ROMSIZE_KB_4096 16964542f46SBin Meng default 0x800000 if UBOOT_ROMSIZE_KB_8192 17064542f46SBin Meng default 0xc00000 if UBOOT_ROMSIZE_KB_12288 17164542f46SBin Meng default 0x1000000 if UBOOT_ROMSIZE_KB_16384 172fce7b276SSimon Glass 173fce7b276SSimon Glassconfig HAVE_INTEL_ME 174fce7b276SSimon Glass bool "Platform requires Intel Management Engine" 175fce7b276SSimon Glass help 176fce7b276SSimon Glass Newer higher-end devices have an Intel Management Engine (ME) 177fce7b276SSimon Glass which is a very large binary blob (typically 1.5MB) which is 178fce7b276SSimon Glass required for the platform to work. This enforces a particular 179fce7b276SSimon Glass SPI flash format. You will need to supply the me.bin file in 180fce7b276SSimon Glass your board directory. 181fce7b276SSimon Glass 18265dd74a6SSimon Glassconfig X86_RAMTEST 18365dd74a6SSimon Glass bool "Perform a simple RAM test after SDRAM initialisation" 18465dd74a6SSimon Glass help 18565dd74a6SSimon Glass If there is something wrong with SDRAM then the platform will 18665dd74a6SSimon Glass often crash within U-Boot or the kernel. This option enables a 18765dd74a6SSimon Glass very simple RAM test that quickly checks whether the SDRAM seems 18865dd74a6SSimon Glass to work correctly. It is not exhaustive but can save time by 18965dd74a6SSimon Glass detecting obvious failures. 19065dd74a6SSimon Glass 19122465fc4SSimon Glassconfig MARK_GRAPHICS_MEM_WRCOMB 192d99b901eSBin Meng bool "Mark graphics memory as write-combining" 19322465fc4SSimon Glass default n 19422465fc4SSimon Glass help 19522465fc4SSimon Glass The graphics performance may increase if the graphics 19622465fc4SSimon Glass memory is set as write-combining cache type. This option 19722465fc4SSimon Glass enables marking the graphics memory as write-combining. 19822465fc4SSimon Glass 1998ce24cd9SSimon Glassconfig HAVE_FSP 2008ce24cd9SSimon Glass bool "Add an Firmware Support Package binary" 2018ce24cd9SSimon Glass help 2028ce24cd9SSimon Glass Select this option to add an Firmware Support Package binary to 2038ce24cd9SSimon Glass the resulting U-Boot image. It is a binary blob which U-Boot uses 2048ce24cd9SSimon Glass to set up SDRAM and other chipset specific initialization. 2058ce24cd9SSimon Glass 2068ce24cd9SSimon Glass Note: Without this binary U-Boot will not be able to set up its 2078ce24cd9SSimon Glass SDRAM so will not boot. 2088ce24cd9SSimon Glass 2098ce24cd9SSimon Glassconfig FSP_FILE 2108ce24cd9SSimon Glass string "Firmware Support Package binary filename" 2118ce24cd9SSimon Glass depends on HAVE_FSP 2128ce24cd9SSimon Glass default "fsp.bin" 2138ce24cd9SSimon Glass help 2148ce24cd9SSimon Glass The filename of the file to use as Firmware Support Package binary 2158ce24cd9SSimon Glass in the board directory. 2168ce24cd9SSimon Glass 2178ce24cd9SSimon Glassconfig FSP_ADDR 2188ce24cd9SSimon Glass hex "Firmware Support Package binary location" 2198ce24cd9SSimon Glass depends on HAVE_FSP 2208ce24cd9SSimon Glass default 0xfffc0000 2218ce24cd9SSimon Glass help 2228ce24cd9SSimon Glass FSP is not Position Independent Code (PIC) and the whole FSP has to 2238ce24cd9SSimon Glass be rebased if it is placed at a location which is different from the 2248ce24cd9SSimon Glass perferred base address specified during the FSP build. Use Intel's 2258ce24cd9SSimon Glass Binary Configuration Tool (BCT) to do the rebase. 2268ce24cd9SSimon Glass 2278ce24cd9SSimon Glass The default base address of 0xfffc0000 indicates that the binary must 2288ce24cd9SSimon Glass be located at offset 0xc0000 from the beginning of a 1MB flash device. 2298ce24cd9SSimon Glass 2308ce24cd9SSimon Glassconfig FSP_TEMP_RAM_ADDR 2318ce24cd9SSimon Glass hex 232d04e30b8SBin Meng depends on HAVE_FSP 2338ce24cd9SSimon Glass default 0x2000000 2348ce24cd9SSimon Glass help 2358ce24cd9SSimon Glass Stack top address which is used in FspInit after DRAM is ready and 2368ce24cd9SSimon Glass CAR is disabled. 2378ce24cd9SSimon Glass 238*4c71322bSBin Mengconfig SMP 239*4c71322bSBin Meng bool "Enable Symmetric Multiprocessing" 240*4c71322bSBin Meng default n 241*4c71322bSBin Meng help 242*4c71322bSBin Meng Enable use of more than one CPU in U-Boot and the Operating System 243*4c71322bSBin Meng when loaded. Each CPU will be started up and information can be 244*4c71322bSBin Meng obtained using the 'cpu' command. If this option is disabled, then 245*4c71322bSBin Meng only one CPU will be enabled regardless of the number of CPUs 246*4c71322bSBin Meng available. 247*4c71322bSBin Meng 24845b5a378SSimon Glassconfig MAX_CPUS 24945b5a378SSimon Glass int "Maximum number of CPUs permitted" 250063374d2SBin Meng depends on SMP 25145b5a378SSimon Glass default 4 25245b5a378SSimon Glass help 25345b5a378SSimon Glass When using multi-CPU chips it is possible for U-Boot to start up 25445b5a378SSimon Glass more than one CPU. The stack memory used by all of these CPUs is 25545b5a378SSimon Glass pre-allocated so at present U-Boot wants to know the maximum 25645b5a378SSimon Glass number of CPUs that may be present. Set this to at least as high 25745b5a378SSimon Glass as the number of CPUs in your system (it uses about 4KB of RAM for 25845b5a378SSimon Glass each CPU). 25945b5a378SSimon Glass 26045b5a378SSimon Glassconfig AP_STACK_SIZE 26145b5a378SSimon Glass hex 262063374d2SBin Meng depends on SMP 26345b5a378SSimon Glass default 0x1000 26445b5a378SSimon Glass help 26545b5a378SSimon Glass Each additional CPU started by U-Boot requires its own stack. This 26645b5a378SSimon Glass option sets the stack size used by each CPU and directly affects 26745b5a378SSimon Glass the memory used by this initialisation process. Typically 4KB is 26845b5a378SSimon Glass enough space. 26945b5a378SSimon Glass 270f56aeaa4SBin Mengconfig TSC_CALIBRATION_BYPASS 271f56aeaa4SBin Meng bool "Bypass Time-Stamp Counter (TSC) calibration" 272f56aeaa4SBin Meng default n 273f56aeaa4SBin Meng help 274f56aeaa4SBin Meng By default U-Boot automatically calibrates Time-Stamp Counter (TSC) 275f56aeaa4SBin Meng running frequency via Model-Specific Register (MSR) and Programmable 276f56aeaa4SBin Meng Interval Timer (PIT). If the calibration does not work on your board, 277f56aeaa4SBin Meng select this option and provide a hardcoded TSC running frequency with 278f56aeaa4SBin Meng CONFIG_TSC_FREQ_IN_MHZ below. 279f56aeaa4SBin Meng 280f56aeaa4SBin Meng Normally this option should be turned on in a simulation environment 281f56aeaa4SBin Meng like qemu. 282f56aeaa4SBin Meng 283f56aeaa4SBin Mengconfig TSC_FREQ_IN_MHZ 284f56aeaa4SBin Meng int "Time-Stamp Counter (TSC) running frequency in MHz" 285f56aeaa4SBin Meng depends on TSC_CALIBRATION_BYPASS 286f56aeaa4SBin Meng default 1000 287f56aeaa4SBin Meng help 288f56aeaa4SBin Meng The running frequency in MHz of Time-Stamp Counter (TSC). 289f56aeaa4SBin Meng 290b5b6b019SBin Mengmenu "System tables" 291b5b6b019SBin Meng 292b5b6b019SBin Mengconfig GENERATE_PIRQ_TABLE 293b5b6b019SBin Meng bool "Generate a PIRQ table" 294b5b6b019SBin Meng default n 295b5b6b019SBin Meng help 296b5b6b019SBin Meng Generate a PIRQ routing table for this board. The PIRQ routing table 297b5b6b019SBin Meng is generated by U-Boot in the system memory from 0xf0000 to 0xfffff 298b5b6b019SBin Meng at every 16-byte boundary with a PCI IRQ routing signature ("$PIR"). 299b5b6b019SBin Meng It specifies the interrupt router information as well how all the PCI 300b5b6b019SBin Meng devices' interrupt pins are wired to PIRQs. 301b5b6b019SBin Meng 3026388e357SSimon Glassconfig GENERATE_SFI_TABLE 3036388e357SSimon Glass bool "Generate a SFI (Simple Firmware Interface) table" 3046388e357SSimon Glass help 3056388e357SSimon Glass The Simple Firmware Interface (SFI) provides a lightweight method 3066388e357SSimon Glass for platform firmware to pass information to the operating system 3076388e357SSimon Glass via static tables in memory. Kernel SFI support is required to 3086388e357SSimon Glass boot on SFI-only platforms. If you have ACPI tables then these are 3096388e357SSimon Glass used instead. 3106388e357SSimon Glass 3116388e357SSimon Glass U-Boot writes this table in write_sfi_table() just before booting 3126388e357SSimon Glass the OS. 3136388e357SSimon Glass 3146388e357SSimon Glass For more information, see http://simplefirmware.org 3156388e357SSimon Glass 316b5b6b019SBin Mengendmenu 317b5b6b019SBin Meng 318b5b6b019SBin Mengconfig MAX_PIRQ_LINKS 319b5b6b019SBin Meng int 320b5b6b019SBin Meng default 8 321b5b6b019SBin Meng help 322b5b6b019SBin Meng This variable specifies the number of PIRQ interrupt links which are 323b5b6b019SBin Meng routable. On most older chipsets, this is 4, PIRQA through PIRQD. 324b5b6b019SBin Meng Some newer chipsets offer more than four links, commonly up to PIRQH. 325b5b6b019SBin Meng 326b5b6b019SBin Mengconfig IRQ_SLOT_COUNT 327b5b6b019SBin Meng int 328b5b6b019SBin Meng default 128 329b5b6b019SBin Meng help 330b5b6b019SBin Meng U-Boot can support up to 254 IRQ slot info in the PIRQ routing table 331b5b6b019SBin Meng which in turns forms a table of exact 4KiB. The default value 128 332b5b6b019SBin Meng should be enough for most boards. If this does not fit your board, 333b5b6b019SBin Meng change it according to your needs. 334b5b6b019SBin Meng 3352d934e57SSimon Glassconfig PCIE_ECAM_BASE 3362d934e57SSimon Glass hex 3372d934e57SSimon Glass default 0xe0000000 3382d934e57SSimon Glass help 3392d934e57SSimon Glass This is the memory-mapped address of PCI configuration space, which 3402d934e57SSimon Glass is only available through the Enhanced Configuration Access 3412d934e57SSimon Glass Mechanism (ECAM) with PCI Express. It can be set up almost 3422d934e57SSimon Glass anywhere. Before it is set up, it is possible to access PCI 3432d934e57SSimon Glass configuration space through I/O access, but memory access is more 3442d934e57SSimon Glass convenient. Using this, PCI can be scanned and configured. This 3452d934e57SSimon Glass should be set to a region that does not conflict with memory 3462d934e57SSimon Glass assigned to PCI devices - i.e. the memory and prefetch regions, as 3472d934e57SSimon Glass passed to pci_set_region(). 3482d934e57SSimon Glass 349dd84058dSMasahiro Yamadaendmenu 350