1dd84058dSMasahiro Yamadamenu "x86 architecture" 2dd84058dSMasahiro Yamada depends on X86 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "x86" 6dd84058dSMasahiro Yamada 7dd84058dSMasahiro Yamadachoice 865c4ac0aSBin Meng prompt "Mainboard vendor" 999a309f3SBin Meng default VENDOR_EMULATION 10dd84058dSMasahiro Yamada 1165c4ac0aSBin Mengconfig VENDOR_COREBOOT 1265c4ac0aSBin Meng bool "coreboot" 138ef07571SSimon Glass 143dcdd17bSBen Stoltzconfig VENDOR_EFI 153dcdd17bSBen Stoltz bool "efi" 163dcdd17bSBen Stoltz 17a65b25d1SBin Mengconfig VENDOR_EMULATION 18a65b25d1SBin Meng bool "emulation" 19a65b25d1SBin Meng 2065c4ac0aSBin Mengconfig VENDOR_GOOGLE 2165c4ac0aSBin Meng bool "Google" 22dd84058dSMasahiro Yamada 2365c4ac0aSBin Mengconfig VENDOR_INTEL 2465c4ac0aSBin Meng bool "Intel" 25ef46bea0SBin Meng 26dd84058dSMasahiro Yamadaendchoice 27dd84058dSMasahiro Yamada 2865c4ac0aSBin Meng# board-specific options below 2965c4ac0aSBin Mengsource "board/coreboot/Kconfig" 30*3e9aa320SBen Stoltzsource "board/efi/Kconfig" 31a65b25d1SBin Mengsource "board/emulation/Kconfig" 3265c4ac0aSBin Mengsource "board/google/Kconfig" 3365c4ac0aSBin Mengsource "board/intel/Kconfig" 3465c4ac0aSBin Meng 35029194a3SBin Meng# platform-specific options below 36029194a3SBin Mengsource "arch/x86/cpu/baytrail/Kconfig" 37029194a3SBin Mengsource "arch/x86/cpu/coreboot/Kconfig" 38029194a3SBin Mengsource "arch/x86/cpu/ivybridge/Kconfig" 39a65b25d1SBin Mengsource "arch/x86/cpu/qemu/Kconfig" 40029194a3SBin Mengsource "arch/x86/cpu/quark/Kconfig" 41029194a3SBin Mengsource "arch/x86/cpu/queensbay/Kconfig" 42029194a3SBin Meng 43029194a3SBin Meng# architecture-specific options below 44029194a3SBin Meng 45b724bd7dSSimon Glassconfig SYS_MALLOC_F_LEN 46b724bd7dSSimon Glass default 0x800 47b724bd7dSSimon Glass 4870a09c6cSSimon Glassconfig RAMBASE 4970a09c6cSSimon Glass hex 5070a09c6cSSimon Glass default 0x100000 5170a09c6cSSimon Glass 5270a09c6cSSimon Glassconfig XIP_ROM_SIZE 5370a09c6cSSimon Glass hex 547698d36aSBin Meng depends on X86_RESET_VECTOR 55bbd43d65SSimon Glass default ROM_SIZE 5670a09c6cSSimon Glass 5770a09c6cSSimon Glassconfig CPU_ADDR_BITS 5870a09c6cSSimon Glass int 5970a09c6cSSimon Glass default 36 6070a09c6cSSimon Glass 6165dd74a6SSimon Glassconfig HPET_ADDRESS 6265dd74a6SSimon Glass hex 6365dd74a6SSimon Glass default 0xfed00000 if !HPET_ADDRESS_OVERRIDE 6465dd74a6SSimon Glass 6565dd74a6SSimon Glassconfig SMM_TSEG 6665dd74a6SSimon Glass bool 6765dd74a6SSimon Glass default n 6865dd74a6SSimon Glass 6965dd74a6SSimon Glassconfig SMM_TSEG_SIZE 7065dd74a6SSimon Glass hex 7165dd74a6SSimon Glass 728cb20cccSBin Mengconfig X86_RESET_VECTOR 738cb20cccSBin Meng bool 748cb20cccSBin Meng default n 758cb20cccSBin Meng 76343fb990SBin Mengconfig RESET_SEG_START 77343fb990SBin Meng hex 78343fb990SBin Meng depends on X86_RESET_VECTOR 79343fb990SBin Meng default 0xffff0000 80343fb990SBin Meng 81343fb990SBin Mengconfig RESET_SEG_SIZE 82343fb990SBin Meng hex 83343fb990SBin Meng depends on X86_RESET_VECTOR 84343fb990SBin Meng default 0x10000 85343fb990SBin Meng 86343fb990SBin Mengconfig RESET_VEC_LOC 87343fb990SBin Meng hex 88343fb990SBin Meng depends on X86_RESET_VECTOR 89343fb990SBin Meng default 0xfffffff0 90343fb990SBin Meng 918cb20cccSBin Mengconfig SYS_X86_START16 928cb20cccSBin Meng hex 938cb20cccSBin Meng depends on X86_RESET_VECTOR 948cb20cccSBin Meng default 0xfffff800 958cb20cccSBin Meng 9664542f46SBin Mengconfig BOARD_ROMSIZE_KB_512 9764542f46SBin Meng bool 9864542f46SBin Mengconfig BOARD_ROMSIZE_KB_1024 9964542f46SBin Meng bool 10064542f46SBin Mengconfig BOARD_ROMSIZE_KB_2048 10164542f46SBin Meng bool 10264542f46SBin Mengconfig BOARD_ROMSIZE_KB_4096 10364542f46SBin Meng bool 10464542f46SBin Mengconfig BOARD_ROMSIZE_KB_8192 10564542f46SBin Meng bool 10664542f46SBin Mengconfig BOARD_ROMSIZE_KB_16384 10764542f46SBin Meng bool 10864542f46SBin Meng 10964542f46SBin Mengchoice 11064542f46SBin Meng prompt "ROM chip size" 1117698d36aSBin Meng depends on X86_RESET_VECTOR 11264542f46SBin Meng default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512 11364542f46SBin Meng default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024 11464542f46SBin Meng default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048 11564542f46SBin Meng default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096 11664542f46SBin Meng default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192 11764542f46SBin Meng default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384 11864542f46SBin Meng help 11964542f46SBin Meng Select the size of the ROM chip you intend to flash U-Boot on. 12064542f46SBin Meng 12164542f46SBin Meng The build system will take care of creating a u-boot.rom file 12264542f46SBin Meng of the matching size. 12364542f46SBin Meng 12464542f46SBin Mengconfig UBOOT_ROMSIZE_KB_512 12564542f46SBin Meng bool "512 KB" 12664542f46SBin Meng help 12764542f46SBin Meng Choose this option if you have a 512 KB ROM chip. 12864542f46SBin Meng 12964542f46SBin Mengconfig UBOOT_ROMSIZE_KB_1024 13064542f46SBin Meng bool "1024 KB (1 MB)" 13164542f46SBin Meng help 13264542f46SBin Meng Choose this option if you have a 1024 KB (1 MB) ROM chip. 13364542f46SBin Meng 13464542f46SBin Mengconfig UBOOT_ROMSIZE_KB_2048 13564542f46SBin Meng bool "2048 KB (2 MB)" 13664542f46SBin Meng help 13764542f46SBin Meng Choose this option if you have a 2048 KB (2 MB) ROM chip. 13864542f46SBin Meng 13964542f46SBin Mengconfig UBOOT_ROMSIZE_KB_4096 14064542f46SBin Meng bool "4096 KB (4 MB)" 14164542f46SBin Meng help 14264542f46SBin Meng Choose this option if you have a 4096 KB (4 MB) ROM chip. 14364542f46SBin Meng 14464542f46SBin Mengconfig UBOOT_ROMSIZE_KB_8192 14564542f46SBin Meng bool "8192 KB (8 MB)" 14664542f46SBin Meng help 14764542f46SBin Meng Choose this option if you have a 8192 KB (8 MB) ROM chip. 14864542f46SBin Meng 14964542f46SBin Mengconfig UBOOT_ROMSIZE_KB_16384 15064542f46SBin Meng bool "16384 KB (16 MB)" 15164542f46SBin Meng help 15264542f46SBin Meng Choose this option if you have a 16384 KB (16 MB) ROM chip. 15364542f46SBin Meng 15464542f46SBin Mengendchoice 15564542f46SBin Meng 15664542f46SBin Meng# Map the config names to an integer (KB). 15764542f46SBin Mengconfig UBOOT_ROMSIZE_KB 15864542f46SBin Meng int 15964542f46SBin Meng default 512 if UBOOT_ROMSIZE_KB_512 16064542f46SBin Meng default 1024 if UBOOT_ROMSIZE_KB_1024 16164542f46SBin Meng default 2048 if UBOOT_ROMSIZE_KB_2048 16264542f46SBin Meng default 4096 if UBOOT_ROMSIZE_KB_4096 16364542f46SBin Meng default 8192 if UBOOT_ROMSIZE_KB_8192 16464542f46SBin Meng default 16384 if UBOOT_ROMSIZE_KB_16384 16564542f46SBin Meng 16664542f46SBin Meng# Map the config names to a hex value (bytes). 167fce7b276SSimon Glassconfig ROM_SIZE 168fce7b276SSimon Glass hex 16964542f46SBin Meng default 0x80000 if UBOOT_ROMSIZE_KB_512 17064542f46SBin Meng default 0x100000 if UBOOT_ROMSIZE_KB_1024 17164542f46SBin Meng default 0x200000 if UBOOT_ROMSIZE_KB_2048 17264542f46SBin Meng default 0x400000 if UBOOT_ROMSIZE_KB_4096 17364542f46SBin Meng default 0x800000 if UBOOT_ROMSIZE_KB_8192 17464542f46SBin Meng default 0xc00000 if UBOOT_ROMSIZE_KB_12288 17564542f46SBin Meng default 0x1000000 if UBOOT_ROMSIZE_KB_16384 176fce7b276SSimon Glass 177fce7b276SSimon Glassconfig HAVE_INTEL_ME 178fce7b276SSimon Glass bool "Platform requires Intel Management Engine" 179fce7b276SSimon Glass help 180fce7b276SSimon Glass Newer higher-end devices have an Intel Management Engine (ME) 181fce7b276SSimon Glass which is a very large binary blob (typically 1.5MB) which is 182fce7b276SSimon Glass required for the platform to work. This enforces a particular 183fce7b276SSimon Glass SPI flash format. You will need to supply the me.bin file in 184fce7b276SSimon Glass your board directory. 185fce7b276SSimon Glass 18665dd74a6SSimon Glassconfig X86_RAMTEST 18765dd74a6SSimon Glass bool "Perform a simple RAM test after SDRAM initialisation" 18865dd74a6SSimon Glass help 18965dd74a6SSimon Glass If there is something wrong with SDRAM then the platform will 19065dd74a6SSimon Glass often crash within U-Boot or the kernel. This option enables a 19165dd74a6SSimon Glass very simple RAM test that quickly checks whether the SDRAM seems 19265dd74a6SSimon Glass to work correctly. It is not exhaustive but can save time by 19365dd74a6SSimon Glass detecting obvious failures. 19465dd74a6SSimon Glass 1958ce24cd9SSimon Glassconfig HAVE_FSP 1968ce24cd9SSimon Glass bool "Add an Firmware Support Package binary" 1978ce24cd9SSimon Glass help 1988ce24cd9SSimon Glass Select this option to add an Firmware Support Package binary to 1998ce24cd9SSimon Glass the resulting U-Boot image. It is a binary blob which U-Boot uses 2008ce24cd9SSimon Glass to set up SDRAM and other chipset specific initialization. 2018ce24cd9SSimon Glass 2028ce24cd9SSimon Glass Note: Without this binary U-Boot will not be able to set up its 2038ce24cd9SSimon Glass SDRAM so will not boot. 2048ce24cd9SSimon Glass 2058ce24cd9SSimon Glassconfig FSP_FILE 2068ce24cd9SSimon Glass string "Firmware Support Package binary filename" 2078ce24cd9SSimon Glass depends on HAVE_FSP 2088ce24cd9SSimon Glass default "fsp.bin" 2098ce24cd9SSimon Glass help 2108ce24cd9SSimon Glass The filename of the file to use as Firmware Support Package binary 2118ce24cd9SSimon Glass in the board directory. 2128ce24cd9SSimon Glass 2138ce24cd9SSimon Glassconfig FSP_ADDR 2148ce24cd9SSimon Glass hex "Firmware Support Package binary location" 2158ce24cd9SSimon Glass depends on HAVE_FSP 2168ce24cd9SSimon Glass default 0xfffc0000 2178ce24cd9SSimon Glass help 2188ce24cd9SSimon Glass FSP is not Position Independent Code (PIC) and the whole FSP has to 2198ce24cd9SSimon Glass be rebased if it is placed at a location which is different from the 2208ce24cd9SSimon Glass perferred base address specified during the FSP build. Use Intel's 2218ce24cd9SSimon Glass Binary Configuration Tool (BCT) to do the rebase. 2228ce24cd9SSimon Glass 2238ce24cd9SSimon Glass The default base address of 0xfffc0000 indicates that the binary must 2248ce24cd9SSimon Glass be located at offset 0xc0000 from the beginning of a 1MB flash device. 2258ce24cd9SSimon Glass 2268ce24cd9SSimon Glassconfig FSP_TEMP_RAM_ADDR 2278ce24cd9SSimon Glass hex 228d04e30b8SBin Meng depends on HAVE_FSP 2298ce24cd9SSimon Glass default 0x2000000 2308ce24cd9SSimon Glass help 2318ce24cd9SSimon Glass Stack top address which is used in FspInit after DRAM is ready and 2328ce24cd9SSimon Glass CAR is disabled. 2338ce24cd9SSimon Glass 2344c71322bSBin Mengconfig SMP 2354c71322bSBin Meng bool "Enable Symmetric Multiprocessing" 2364c71322bSBin Meng default n 2374c71322bSBin Meng help 2384c71322bSBin Meng Enable use of more than one CPU in U-Boot and the Operating System 2394c71322bSBin Meng when loaded. Each CPU will be started up and information can be 2404c71322bSBin Meng obtained using the 'cpu' command. If this option is disabled, then 2414c71322bSBin Meng only one CPU will be enabled regardless of the number of CPUs 2424c71322bSBin Meng available. 2434c71322bSBin Meng 24445b5a378SSimon Glassconfig MAX_CPUS 24545b5a378SSimon Glass int "Maximum number of CPUs permitted" 246063374d2SBin Meng depends on SMP 24745b5a378SSimon Glass default 4 24845b5a378SSimon Glass help 24945b5a378SSimon Glass When using multi-CPU chips it is possible for U-Boot to start up 25045b5a378SSimon Glass more than one CPU. The stack memory used by all of these CPUs is 25145b5a378SSimon Glass pre-allocated so at present U-Boot wants to know the maximum 25245b5a378SSimon Glass number of CPUs that may be present. Set this to at least as high 25345b5a378SSimon Glass as the number of CPUs in your system (it uses about 4KB of RAM for 25445b5a378SSimon Glass each CPU). 25545b5a378SSimon Glass 25645b5a378SSimon Glassconfig AP_STACK_SIZE 25745b5a378SSimon Glass hex 258063374d2SBin Meng depends on SMP 25945b5a378SSimon Glass default 0x1000 26045b5a378SSimon Glass help 26145b5a378SSimon Glass Each additional CPU started by U-Boot requires its own stack. This 26245b5a378SSimon Glass option sets the stack size used by each CPU and directly affects 26345b5a378SSimon Glass the memory used by this initialisation process. Typically 4KB is 26445b5a378SSimon Glass enough space. 26545b5a378SSimon Glass 266f56aeaa4SBin Mengconfig TSC_CALIBRATION_BYPASS 267f56aeaa4SBin Meng bool "Bypass Time-Stamp Counter (TSC) calibration" 268f56aeaa4SBin Meng default n 269f56aeaa4SBin Meng help 270f56aeaa4SBin Meng By default U-Boot automatically calibrates Time-Stamp Counter (TSC) 271f56aeaa4SBin Meng running frequency via Model-Specific Register (MSR) and Programmable 272f56aeaa4SBin Meng Interval Timer (PIT). If the calibration does not work on your board, 273f56aeaa4SBin Meng select this option and provide a hardcoded TSC running frequency with 274f56aeaa4SBin Meng CONFIG_TSC_FREQ_IN_MHZ below. 275f56aeaa4SBin Meng 276f56aeaa4SBin Meng Normally this option should be turned on in a simulation environment 277f56aeaa4SBin Meng like qemu. 278f56aeaa4SBin Meng 279f56aeaa4SBin Mengconfig TSC_FREQ_IN_MHZ 280f56aeaa4SBin Meng int "Time-Stamp Counter (TSC) running frequency in MHz" 281f56aeaa4SBin Meng depends on TSC_CALIBRATION_BYPASS 282f56aeaa4SBin Meng default 1000 283f56aeaa4SBin Meng help 284f56aeaa4SBin Meng The running frequency in MHz of Time-Stamp Counter (TSC). 285f56aeaa4SBin Meng 286786a08e0SBin Mengconfig HAVE_VGA_BIOS 287786a08e0SBin Meng bool "Add a VGA BIOS image" 288786a08e0SBin Meng help 289786a08e0SBin Meng Select this option if you have a VGA BIOS image that you would 290786a08e0SBin Meng like to add to your ROM. 291786a08e0SBin Meng 292786a08e0SBin Mengconfig VGA_BIOS_FILE 293786a08e0SBin Meng string "VGA BIOS image filename" 294786a08e0SBin Meng depends on HAVE_VGA_BIOS 295786a08e0SBin Meng default "vga.bin" 296786a08e0SBin Meng help 297786a08e0SBin Meng The filename of the VGA BIOS image in the board directory. 298786a08e0SBin Meng 299786a08e0SBin Mengconfig VGA_BIOS_ADDR 300786a08e0SBin Meng hex "VGA BIOS image location" 301786a08e0SBin Meng depends on HAVE_VGA_BIOS 302786a08e0SBin Meng default 0xfff90000 303786a08e0SBin Meng help 304786a08e0SBin Meng The location of VGA BIOS image in the SPI flash. For example, base 305786a08e0SBin Meng address of 0xfff90000 indicates that the image will be put at offset 306786a08e0SBin Meng 0x90000 from the beginning of a 1MB flash device. 307786a08e0SBin Meng 308b5b6b019SBin Mengmenu "System tables" 309b5b6b019SBin Meng 310b5b6b019SBin Mengconfig GENERATE_PIRQ_TABLE 311b5b6b019SBin Meng bool "Generate a PIRQ table" 312b5b6b019SBin Meng default n 313b5b6b019SBin Meng help 314b5b6b019SBin Meng Generate a PIRQ routing table for this board. The PIRQ routing table 315b5b6b019SBin Meng is generated by U-Boot in the system memory from 0xf0000 to 0xfffff 316b5b6b019SBin Meng at every 16-byte boundary with a PCI IRQ routing signature ("$PIR"). 317b5b6b019SBin Meng It specifies the interrupt router information as well how all the PCI 318b5b6b019SBin Meng devices' interrupt pins are wired to PIRQs. 319b5b6b019SBin Meng 3206388e357SSimon Glassconfig GENERATE_SFI_TABLE 3216388e357SSimon Glass bool "Generate a SFI (Simple Firmware Interface) table" 3226388e357SSimon Glass help 3236388e357SSimon Glass The Simple Firmware Interface (SFI) provides a lightweight method 3246388e357SSimon Glass for platform firmware to pass information to the operating system 3256388e357SSimon Glass via static tables in memory. Kernel SFI support is required to 3266388e357SSimon Glass boot on SFI-only platforms. If you have ACPI tables then these are 3276388e357SSimon Glass used instead. 3286388e357SSimon Glass 3296388e357SSimon Glass U-Boot writes this table in write_sfi_table() just before booting 3306388e357SSimon Glass the OS. 3316388e357SSimon Glass 3326388e357SSimon Glass For more information, see http://simplefirmware.org 3336388e357SSimon Glass 33407545d86SBin Mengconfig GENERATE_MP_TABLE 33507545d86SBin Meng bool "Generate an MP (Multi-Processor) table" 33607545d86SBin Meng default n 33707545d86SBin Meng help 33807545d86SBin Meng Generate an MP (Multi-Processor) table for this board. The MP table 33907545d86SBin Meng provides a way for the operating system to support for symmetric 34007545d86SBin Meng multiprocessing as well as symmetric I/O interrupt handling with 34107545d86SBin Meng the local APIC and I/O APIC. 34207545d86SBin Meng 343b5b6b019SBin Mengendmenu 344b5b6b019SBin Meng 345b5b6b019SBin Mengconfig MAX_PIRQ_LINKS 346b5b6b019SBin Meng int 347b5b6b019SBin Meng default 8 348b5b6b019SBin Meng help 349b5b6b019SBin Meng This variable specifies the number of PIRQ interrupt links which are 350b5b6b019SBin Meng routable. On most older chipsets, this is 4, PIRQA through PIRQD. 351b5b6b019SBin Meng Some newer chipsets offer more than four links, commonly up to PIRQH. 352b5b6b019SBin Meng 353b5b6b019SBin Mengconfig IRQ_SLOT_COUNT 354b5b6b019SBin Meng int 355b5b6b019SBin Meng default 128 356b5b6b019SBin Meng help 357b5b6b019SBin Meng U-Boot can support up to 254 IRQ slot info in the PIRQ routing table 358b5b6b019SBin Meng which in turns forms a table of exact 4KiB. The default value 128 359b5b6b019SBin Meng should be enough for most boards. If this does not fit your board, 360b5b6b019SBin Meng change it according to your needs. 361b5b6b019SBin Meng 3622d934e57SSimon Glassconfig PCIE_ECAM_BASE 3632d934e57SSimon Glass hex 3642d934e57SSimon Glass default 0xe0000000 3652d934e57SSimon Glass help 3662d934e57SSimon Glass This is the memory-mapped address of PCI configuration space, which 3672d934e57SSimon Glass is only available through the Enhanced Configuration Access 3682d934e57SSimon Glass Mechanism (ECAM) with PCI Express. It can be set up almost 3692d934e57SSimon Glass anywhere. Before it is set up, it is possible to access PCI 3702d934e57SSimon Glass configuration space through I/O access, but memory access is more 3712d934e57SSimon Glass convenient. Using this, PCI can be scanned and configured. This 3722d934e57SSimon Glass should be set to a region that does not conflict with memory 3732d934e57SSimon Glass assigned to PCI devices - i.e. the memory and prefetch regions, as 3742d934e57SSimon Glass passed to pci_set_region(). 3752d934e57SSimon Glass 3761ed6648bSBin Mengconfig PCIE_ECAM_SIZE 3771ed6648bSBin Meng hex 3781ed6648bSBin Meng default 0x10000000 3791ed6648bSBin Meng help 3801ed6648bSBin Meng This is the size of memory-mapped address of PCI configuration space, 3811ed6648bSBin Meng which is only available through the Enhanced Configuration Access 3821ed6648bSBin Meng Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory, 3831ed6648bSBin Meng so a default 0x10000000 size covers all of the 256 buses which is the 3841ed6648bSBin Meng maximum number of PCI buses as defined by the PCI specification. 3851ed6648bSBin Meng 386dd84058dSMasahiro Yamadaendmenu 387