1dd84058dSMasahiro Yamadamenu "x86 architecture" 2dd84058dSMasahiro Yamada depends on X86 3dd84058dSMasahiro Yamada 4dd84058dSMasahiro Yamadaconfig SYS_ARCH 5dd84058dSMasahiro Yamada default "x86" 6dd84058dSMasahiro Yamada 7dd84058dSMasahiro Yamadachoice 8a66ad67fSSimon Glass prompt "Run U-Boot in 32/64-bit mode" 9a66ad67fSSimon Glass default X86_RUN_32BIT 10a66ad67fSSimon Glass help 11a66ad67fSSimon Glass U-Boot can be built as a 32-bit binary which runs in 32-bit mode 12a66ad67fSSimon Glass even on 64-bit machines. In this case SPL is not used, and U-Boot 13a66ad67fSSimon Glass runs directly from the reset vector (via 16-bit start-up). 14a66ad67fSSimon Glass 15a66ad67fSSimon Glass Alternatively it can be run as a 64-bit binary, thus requiring a 16a66ad67fSSimon Glass 64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit 17a66ad67fSSimon Glass start-up) then jumps to U-Boot in 64-bit mode. 18a66ad67fSSimon Glass 19a66ad67fSSimon Glass For now, 32-bit mode is recommended, as 64-bit is still 20a66ad67fSSimon Glass experimental and is missing a lot of features. 21a66ad67fSSimon Glass 22a66ad67fSSimon Glassconfig X86_RUN_32BIT 23a66ad67fSSimon Glass bool "32-bit" 24a66ad67fSSimon Glass help 25a66ad67fSSimon Glass Build U-Boot as a 32-bit binary with no SPL. This is the currently 26a66ad67fSSimon Glass supported normal setup. U-Boot will stay in 32-bit mode even on 27a66ad67fSSimon Glass 64-bit machines. When booting a 64-bit kernel, U-Boot will switch 28a66ad67fSSimon Glass to 64-bit just before starting the kernel. Only the bottom 4GB of 29a66ad67fSSimon Glass memory can be accessed through normal means, although 30a66ad67fSSimon Glass arch_phys_memset() can be used for basic access to other memory. 31a66ad67fSSimon Glass 32a66ad67fSSimon Glassconfig X86_RUN_64BIT 33a66ad67fSSimon Glass bool "64-bit" 34a66ad67fSSimon Glass select X86_64 35a66ad67fSSimon Glass select SUPPORT_SPL 36a66ad67fSSimon Glass select SPL 37a66ad67fSSimon Glass select SPL_SEPARATE_BSS 38a66ad67fSSimon Glass help 39a66ad67fSSimon Glass Build U-Boot as a 64-bit binary with a 32-bit SPL. This is 40a66ad67fSSimon Glass experimental and many features are missing. U-Boot SPL starts up, 41a66ad67fSSimon Glass runs through the 16-bit and 32-bit init, then switches to 64-bit 42a66ad67fSSimon Glass mode and jumps to U-Boot proper. 43a66ad67fSSimon Glass 44a66ad67fSSimon Glassendchoice 45a66ad67fSSimon Glass 46a66ad67fSSimon Glassconfig X86_64 47a66ad67fSSimon Glass bool 48a66ad67fSSimon Glass 49a66ad67fSSimon Glassconfig SPL_X86_64 50a66ad67fSSimon Glass bool 51a66ad67fSSimon Glass depends on SPL 52a66ad67fSSimon Glass 53a66ad67fSSimon Glasschoice 5465c4ac0aSBin Meng prompt "Mainboard vendor" 5599a309f3SBin Meng default VENDOR_EMULATION 56dd84058dSMasahiro Yamada 57215099a5SGeorge McCollisterconfig VENDOR_ADVANTECH 58215099a5SGeorge McCollister bool "advantech" 59215099a5SGeorge McCollister 6082ceba2cSStefan Roeseconfig VENDOR_CONGATEC 6182ceba2cSStefan Roese bool "congatec" 6282ceba2cSStefan Roese 6365c4ac0aSBin Mengconfig VENDOR_COREBOOT 6465c4ac0aSBin Meng bool "coreboot" 658ef07571SSimon Glass 66b1ad6c69SStefan Roeseconfig VENDOR_DFI 67b1ad6c69SStefan Roese bool "dfi" 68b1ad6c69SStefan Roese 693dcdd17bSBen Stoltzconfig VENDOR_EFI 703dcdd17bSBen Stoltz bool "efi" 713dcdd17bSBen Stoltz 72a65b25d1SBin Mengconfig VENDOR_EMULATION 73a65b25d1SBin Meng bool "emulation" 74a65b25d1SBin Meng 7565c4ac0aSBin Mengconfig VENDOR_GOOGLE 7665c4ac0aSBin Meng bool "Google" 77dd84058dSMasahiro Yamada 7865c4ac0aSBin Mengconfig VENDOR_INTEL 7965c4ac0aSBin Meng bool "Intel" 80ef46bea0SBin Meng 81dd84058dSMasahiro Yamadaendchoice 82dd84058dSMasahiro Yamada 837a96fd8eSAndy Shevchenko# subarchitectures-specific options below 847a96fd8eSAndy Shevchenkoconfig INTEL_MID 857a96fd8eSAndy Shevchenko bool "Intel MID platform support" 867a96fd8eSAndy Shevchenko help 877a96fd8eSAndy Shevchenko Select to build a U-Boot capable of supporting Intel MID 887a96fd8eSAndy Shevchenko (Mobile Internet Device) platform systems which do not have 897a96fd8eSAndy Shevchenko the PCI legacy interfaces. 907a96fd8eSAndy Shevchenko 917a96fd8eSAndy Shevchenko If you are building for a PC class system say N here. 927a96fd8eSAndy Shevchenko 937a96fd8eSAndy Shevchenko Intel MID platforms are based on an Intel processor and 947a96fd8eSAndy Shevchenko chipset which consume less power than most of the x86 957a96fd8eSAndy Shevchenko derivatives. 967a96fd8eSAndy Shevchenko 9765c4ac0aSBin Meng# board-specific options below 98215099a5SGeorge McCollistersource "board/advantech/Kconfig" 9982ceba2cSStefan Roesesource "board/congatec/Kconfig" 10065c4ac0aSBin Mengsource "board/coreboot/Kconfig" 101b1ad6c69SStefan Roesesource "board/dfi/Kconfig" 1023e9aa320SBen Stoltzsource "board/efi/Kconfig" 103a65b25d1SBin Mengsource "board/emulation/Kconfig" 10465c4ac0aSBin Mengsource "board/google/Kconfig" 10565c4ac0aSBin Mengsource "board/intel/Kconfig" 10665c4ac0aSBin Meng 107029194a3SBin Meng# platform-specific options below 108029194a3SBin Mengsource "arch/x86/cpu/baytrail/Kconfig" 1092f3f477bSSimon Glasssource "arch/x86/cpu/broadwell/Kconfig" 110029194a3SBin Mengsource "arch/x86/cpu/coreboot/Kconfig" 111029194a3SBin Mengsource "arch/x86/cpu/ivybridge/Kconfig" 112a65b25d1SBin Mengsource "arch/x86/cpu/qemu/Kconfig" 113029194a3SBin Mengsource "arch/x86/cpu/quark/Kconfig" 114029194a3SBin Mengsource "arch/x86/cpu/queensbay/Kconfig" 115029194a3SBin Meng 116029194a3SBin Meng# architecture-specific options below 117029194a3SBin Meng 118a219639dSSimon Glassconfig AHCI 119a219639dSSimon Glass default y 120a219639dSSimon Glass 121b724bd7dSSimon Glassconfig SYS_MALLOC_F_LEN 122b724bd7dSSimon Glass default 0x800 123b724bd7dSSimon Glass 12470a09c6cSSimon Glassconfig RAMBASE 12570a09c6cSSimon Glass hex 12670a09c6cSSimon Glass default 0x100000 12770a09c6cSSimon Glass 12870a09c6cSSimon Glassconfig XIP_ROM_SIZE 12970a09c6cSSimon Glass hex 1307698d36aSBin Meng depends on X86_RESET_VECTOR 131bbd43d65SSimon Glass default ROM_SIZE 13270a09c6cSSimon Glass 13370a09c6cSSimon Glassconfig CPU_ADDR_BITS 13470a09c6cSSimon Glass int 13570a09c6cSSimon Glass default 36 13670a09c6cSSimon Glass 13765dd74a6SSimon Glassconfig HPET_ADDRESS 13865dd74a6SSimon Glass hex 13965dd74a6SSimon Glass default 0xfed00000 if !HPET_ADDRESS_OVERRIDE 14065dd74a6SSimon Glass 14165dd74a6SSimon Glassconfig SMM_TSEG 14265dd74a6SSimon Glass bool 14365dd74a6SSimon Glass default n 14465dd74a6SSimon Glass 14565dd74a6SSimon Glassconfig SMM_TSEG_SIZE 14665dd74a6SSimon Glass hex 14765dd74a6SSimon Glass 1488cb20cccSBin Mengconfig X86_RESET_VECTOR 1498cb20cccSBin Meng bool 1508cb20cccSBin Meng default n 1518cb20cccSBin Meng 15213f1dc64SSimon Glass# The following options control where the 16-bit and 32-bit init lies 15313f1dc64SSimon Glass# If SPL is enabled then it normally holds this init code, and U-Boot proper 15413f1dc64SSimon Glass# is normally a 64-bit build. 15513f1dc64SSimon Glass# 15613f1dc64SSimon Glass# The 16-bit init refers to the reset vector and the small amount of code to 15713f1dc64SSimon Glass# get the processor into 32-bit mode. It may be in SPL or in U-Boot proper, 15813f1dc64SSimon Glass# or missing altogether if U-Boot is started from EFI or coreboot. 15913f1dc64SSimon Glass# 16013f1dc64SSimon Glass# The 32-bit init refers to processor init, running binary blobs including 16113f1dc64SSimon Glass# FSP, setting up interrupts and anything else that needs to be done in 16213f1dc64SSimon Glass# 32-bit code. It is normally in the same place as 16-bit init if that is 16313f1dc64SSimon Glass# enabled (i.e. they are both in SPL, or both in U-Boot proper). 16413f1dc64SSimon Glassconfig X86_16BIT_INIT 16513f1dc64SSimon Glass bool 16613f1dc64SSimon Glass depends on X86_RESET_VECTOR 16713f1dc64SSimon Glass default y if X86_RESET_VECTOR && !SPL 16813f1dc64SSimon Glass help 16913f1dc64SSimon Glass This is enabled when 16-bit init is in U-Boot proper 17013f1dc64SSimon Glass 17113f1dc64SSimon Glassconfig SPL_X86_16BIT_INIT 17213f1dc64SSimon Glass bool 17313f1dc64SSimon Glass depends on X86_RESET_VECTOR 17413f1dc64SSimon Glass default y if X86_RESET_VECTOR && SPL 17513f1dc64SSimon Glass help 17613f1dc64SSimon Glass This is enabled when 16-bit init is in SPL 17713f1dc64SSimon Glass 17813f1dc64SSimon Glassconfig X86_32BIT_INIT 17913f1dc64SSimon Glass bool 18013f1dc64SSimon Glass depends on X86_RESET_VECTOR 18113f1dc64SSimon Glass default y if X86_RESET_VECTOR && !SPL 18213f1dc64SSimon Glass help 18313f1dc64SSimon Glass This is enabled when 32-bit init is in U-Boot proper 18413f1dc64SSimon Glass 18513f1dc64SSimon Glassconfig SPL_X86_32BIT_INIT 18613f1dc64SSimon Glass bool 18713f1dc64SSimon Glass depends on X86_RESET_VECTOR 18813f1dc64SSimon Glass default y if X86_RESET_VECTOR && SPL 18913f1dc64SSimon Glass help 19013f1dc64SSimon Glass This is enabled when 32-bit init is in SPL 19113f1dc64SSimon Glass 192343fb990SBin Mengconfig RESET_SEG_START 193343fb990SBin Meng hex 194343fb990SBin Meng depends on X86_RESET_VECTOR 195343fb990SBin Meng default 0xffff0000 196343fb990SBin Meng 197343fb990SBin Mengconfig RESET_SEG_SIZE 198343fb990SBin Meng hex 199343fb990SBin Meng depends on X86_RESET_VECTOR 200343fb990SBin Meng default 0x10000 201343fb990SBin Meng 202343fb990SBin Mengconfig RESET_VEC_LOC 203343fb990SBin Meng hex 204343fb990SBin Meng depends on X86_RESET_VECTOR 205343fb990SBin Meng default 0xfffffff0 206343fb990SBin Meng 2078cb20cccSBin Mengconfig SYS_X86_START16 2088cb20cccSBin Meng hex 2098cb20cccSBin Meng depends on X86_RESET_VECTOR 2108cb20cccSBin Meng default 0xfffff800 2118cb20cccSBin Meng 212446d4e04SAndy Shevchenkoconfig X86_LOAD_FROM_32_BIT 213446d4e04SAndy Shevchenko bool "Boot from a 32-bit program" 214446d4e04SAndy Shevchenko help 215446d4e04SAndy Shevchenko Define this to boot U-Boot from a 32-bit program which sets 216446d4e04SAndy Shevchenko the GDT differently. This can be used to boot directly from 217446d4e04SAndy Shevchenko any stage of coreboot, for example, bypassing the normal 218446d4e04SAndy Shevchenko payload-loading feature. 219446d4e04SAndy Shevchenko 22064542f46SBin Mengconfig BOARD_ROMSIZE_KB_512 22164542f46SBin Meng bool 22264542f46SBin Mengconfig BOARD_ROMSIZE_KB_1024 22364542f46SBin Meng bool 22464542f46SBin Mengconfig BOARD_ROMSIZE_KB_2048 22564542f46SBin Meng bool 22664542f46SBin Mengconfig BOARD_ROMSIZE_KB_4096 22764542f46SBin Meng bool 22864542f46SBin Mengconfig BOARD_ROMSIZE_KB_8192 22964542f46SBin Meng bool 23064542f46SBin Mengconfig BOARD_ROMSIZE_KB_16384 23164542f46SBin Meng bool 23264542f46SBin Meng 23364542f46SBin Mengchoice 23464542f46SBin Meng prompt "ROM chip size" 2357698d36aSBin Meng depends on X86_RESET_VECTOR 23664542f46SBin Meng default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512 23764542f46SBin Meng default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024 23864542f46SBin Meng default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048 23964542f46SBin Meng default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096 24064542f46SBin Meng default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192 24164542f46SBin Meng default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384 24264542f46SBin Meng help 24364542f46SBin Meng Select the size of the ROM chip you intend to flash U-Boot on. 24464542f46SBin Meng 24564542f46SBin Meng The build system will take care of creating a u-boot.rom file 24664542f46SBin Meng of the matching size. 24764542f46SBin Meng 24864542f46SBin Mengconfig UBOOT_ROMSIZE_KB_512 24964542f46SBin Meng bool "512 KB" 25064542f46SBin Meng help 25164542f46SBin Meng Choose this option if you have a 512 KB ROM chip. 25264542f46SBin Meng 25364542f46SBin Mengconfig UBOOT_ROMSIZE_KB_1024 25464542f46SBin Meng bool "1024 KB (1 MB)" 25564542f46SBin Meng help 25664542f46SBin Meng Choose this option if you have a 1024 KB (1 MB) ROM chip. 25764542f46SBin Meng 25864542f46SBin Mengconfig UBOOT_ROMSIZE_KB_2048 25964542f46SBin Meng bool "2048 KB (2 MB)" 26064542f46SBin Meng help 26164542f46SBin Meng Choose this option if you have a 2048 KB (2 MB) ROM chip. 26264542f46SBin Meng 26364542f46SBin Mengconfig UBOOT_ROMSIZE_KB_4096 26464542f46SBin Meng bool "4096 KB (4 MB)" 26564542f46SBin Meng help 26664542f46SBin Meng Choose this option if you have a 4096 KB (4 MB) ROM chip. 26764542f46SBin Meng 26864542f46SBin Mengconfig UBOOT_ROMSIZE_KB_8192 26964542f46SBin Meng bool "8192 KB (8 MB)" 27064542f46SBin Meng help 27164542f46SBin Meng Choose this option if you have a 8192 KB (8 MB) ROM chip. 27264542f46SBin Meng 27364542f46SBin Mengconfig UBOOT_ROMSIZE_KB_16384 27464542f46SBin Meng bool "16384 KB (16 MB)" 27564542f46SBin Meng help 27664542f46SBin Meng Choose this option if you have a 16384 KB (16 MB) ROM chip. 27764542f46SBin Meng 27864542f46SBin Mengendchoice 27964542f46SBin Meng 28064542f46SBin Meng# Map the config names to an integer (KB). 28164542f46SBin Mengconfig UBOOT_ROMSIZE_KB 28264542f46SBin Meng int 28364542f46SBin Meng default 512 if UBOOT_ROMSIZE_KB_512 28464542f46SBin Meng default 1024 if UBOOT_ROMSIZE_KB_1024 28564542f46SBin Meng default 2048 if UBOOT_ROMSIZE_KB_2048 28664542f46SBin Meng default 4096 if UBOOT_ROMSIZE_KB_4096 28764542f46SBin Meng default 8192 if UBOOT_ROMSIZE_KB_8192 28864542f46SBin Meng default 16384 if UBOOT_ROMSIZE_KB_16384 28964542f46SBin Meng 29064542f46SBin Meng# Map the config names to a hex value (bytes). 291fce7b276SSimon Glassconfig ROM_SIZE 292fce7b276SSimon Glass hex 29364542f46SBin Meng default 0x80000 if UBOOT_ROMSIZE_KB_512 29464542f46SBin Meng default 0x100000 if UBOOT_ROMSIZE_KB_1024 29564542f46SBin Meng default 0x200000 if UBOOT_ROMSIZE_KB_2048 29664542f46SBin Meng default 0x400000 if UBOOT_ROMSIZE_KB_4096 29764542f46SBin Meng default 0x800000 if UBOOT_ROMSIZE_KB_8192 29864542f46SBin Meng default 0xc00000 if UBOOT_ROMSIZE_KB_12288 29964542f46SBin Meng default 0x1000000 if UBOOT_ROMSIZE_KB_16384 300fce7b276SSimon Glass 301fce7b276SSimon Glassconfig HAVE_INTEL_ME 302fce7b276SSimon Glass bool "Platform requires Intel Management Engine" 303fce7b276SSimon Glass help 304fce7b276SSimon Glass Newer higher-end devices have an Intel Management Engine (ME) 305fce7b276SSimon Glass which is a very large binary blob (typically 1.5MB) which is 306fce7b276SSimon Glass required for the platform to work. This enforces a particular 307fce7b276SSimon Glass SPI flash format. You will need to supply the me.bin file in 308fce7b276SSimon Glass your board directory. 309fce7b276SSimon Glass 31065dd74a6SSimon Glassconfig X86_RAMTEST 31165dd74a6SSimon Glass bool "Perform a simple RAM test after SDRAM initialisation" 31265dd74a6SSimon Glass help 31365dd74a6SSimon Glass If there is something wrong with SDRAM then the platform will 31465dd74a6SSimon Glass often crash within U-Boot or the kernel. This option enables a 31565dd74a6SSimon Glass very simple RAM test that quickly checks whether the SDRAM seems 31665dd74a6SSimon Glass to work correctly. It is not exhaustive but can save time by 31765dd74a6SSimon Glass detecting obvious failures. 31865dd74a6SSimon Glass 319*3dc0f844SStefan Roeseconfig FLASH_DESCRIPTOR_FILE 320*3dc0f844SStefan Roese string "Flash descriptor binary filename" 321*3dc0f844SStefan Roese depends on HAVE_INTEL_ME 322*3dc0f844SStefan Roese default "descriptor.bin" 323*3dc0f844SStefan Roese help 324*3dc0f844SStefan Roese The filename of the file to use as flash descriptor in the 325*3dc0f844SStefan Roese board directory. 326*3dc0f844SStefan Roese 327*3dc0f844SStefan Roeseconfig INTEL_ME_FILE 328*3dc0f844SStefan Roese string "Intel Management Engine binary filename" 329*3dc0f844SStefan Roese depends on HAVE_INTEL_ME 330*3dc0f844SStefan Roese default "me.bin" 331*3dc0f844SStefan Roese help 332*3dc0f844SStefan Roese The filename of the file to use as Intel Management Engine in the 333*3dc0f844SStefan Roese board directory. 334*3dc0f844SStefan Roese 3358ce24cd9SSimon Glassconfig HAVE_FSP 3368ce24cd9SSimon Glass bool "Add an Firmware Support Package binary" 337e49cceacSSimon Glass depends on !EFI 3388ce24cd9SSimon Glass help 3398ce24cd9SSimon Glass Select this option to add an Firmware Support Package binary to 3408ce24cd9SSimon Glass the resulting U-Boot image. It is a binary blob which U-Boot uses 3418ce24cd9SSimon Glass to set up SDRAM and other chipset specific initialization. 3428ce24cd9SSimon Glass 3438ce24cd9SSimon Glass Note: Without this binary U-Boot will not be able to set up its 3448ce24cd9SSimon Glass SDRAM so will not boot. 3458ce24cd9SSimon Glass 3468ce24cd9SSimon Glassconfig FSP_FILE 3478ce24cd9SSimon Glass string "Firmware Support Package binary filename" 3488ce24cd9SSimon Glass depends on HAVE_FSP 3498ce24cd9SSimon Glass default "fsp.bin" 3508ce24cd9SSimon Glass help 3518ce24cd9SSimon Glass The filename of the file to use as Firmware Support Package binary 3528ce24cd9SSimon Glass in the board directory. 3538ce24cd9SSimon Glass 3548ce24cd9SSimon Glassconfig FSP_ADDR 3558ce24cd9SSimon Glass hex "Firmware Support Package binary location" 3568ce24cd9SSimon Glass depends on HAVE_FSP 3578ce24cd9SSimon Glass default 0xfffc0000 3588ce24cd9SSimon Glass help 3598ce24cd9SSimon Glass FSP is not Position Independent Code (PIC) and the whole FSP has to 3608ce24cd9SSimon Glass be rebased if it is placed at a location which is different from the 3618ce24cd9SSimon Glass perferred base address specified during the FSP build. Use Intel's 3628ce24cd9SSimon Glass Binary Configuration Tool (BCT) to do the rebase. 3638ce24cd9SSimon Glass 3648ce24cd9SSimon Glass The default base address of 0xfffc0000 indicates that the binary must 3658ce24cd9SSimon Glass be located at offset 0xc0000 from the beginning of a 1MB flash device. 3668ce24cd9SSimon Glass 3678ce24cd9SSimon Glassconfig FSP_TEMP_RAM_ADDR 3688ce24cd9SSimon Glass hex 369d04e30b8SBin Meng depends on HAVE_FSP 3708ce24cd9SSimon Glass default 0x2000000 3718ce24cd9SSimon Glass help 37248aa6c26SBin Meng Stack top address which is used in fsp_init() after DRAM is ready and 3738ce24cd9SSimon Glass CAR is disabled. 3748ce24cd9SSimon Glass 37557b10f59SBin Mengconfig FSP_SYS_MALLOC_F_LEN 37657b10f59SBin Meng hex 37757b10f59SBin Meng depends on HAVE_FSP 37857b10f59SBin Meng default 0x100000 37957b10f59SBin Meng help 38057b10f59SBin Meng Additional size of malloc() pool before relocation. 38157b10f59SBin Meng 3823340f2ccSBin Mengconfig FSP_USE_UPD 3833340f2ccSBin Meng bool 3843340f2ccSBin Meng depends on HAVE_FSP 3853340f2ccSBin Meng default y 3863340f2ccSBin Meng help 3873340f2ccSBin Meng Most FSPs use UPD data region for some FSP customization. But there 3883340f2ccSBin Meng are still some FSPs that might not even have UPD. For such FSPs, 3893340f2ccSBin Meng override this to n in their platform Kconfig files. 3903340f2ccSBin Meng 391dc5be508SBin Mengconfig FSP_BROKEN_HOB 392dc5be508SBin Meng bool 393dc5be508SBin Meng depends on HAVE_FSP 394dc5be508SBin Meng help 395dc5be508SBin Meng Indicate some buggy FSPs that does not report memory used by FSP 396dc5be508SBin Meng itself as reserved in the resource descriptor HOB. Select this to 397dc5be508SBin Meng tell U-Boot to do some additional work to ensure U-Boot relocation 398dc5be508SBin Meng do not overwrite the important boot service data which is used by 399dc5be508SBin Meng FSP, otherwise the subsequent call to fsp_notify() will fail. 400dc5be508SBin Meng 401e2d76e95SBin Mengconfig ENABLE_MRC_CACHE 402e2d76e95SBin Meng bool "Enable MRC cache" 403e2d76e95SBin Meng depends on !EFI && !SYS_COREBOOT 404e2d76e95SBin Meng help 405e2d76e95SBin Meng Enable this feature to cause MRC data to be cached in NV storage 406e2d76e95SBin Meng to be used for speeding up boot time on future reboots and/or 407e2d76e95SBin Meng power cycles. 408e2d76e95SBin Meng 4095c60a3abSBin Meng For platforms that use Intel FSP for the memory initialization, 4105c60a3abSBin Meng please check FSP output HOB via U-Boot command 'fsp hob' to see 4115c60a3abSBin Meng if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h). 4125c60a3abSBin Meng If such GUID does not exist, MRC cache is not avaiable on such 4135c60a3abSBin Meng platform (eg: Intel Queensbay), which means selecting this option 4145c60a3abSBin Meng here does not make any difference. 4155c60a3abSBin Meng 416f7d35bc1SSimon Glassconfig HAVE_MRC 417f7d35bc1SSimon Glass bool "Add a System Agent binary" 418f7d35bc1SSimon Glass depends on !HAVE_FSP 419f7d35bc1SSimon Glass help 420f7d35bc1SSimon Glass Select this option to add a System Agent binary to 421f7d35bc1SSimon Glass the resulting U-Boot image. MRC stands for Memory Reference Code. 422f7d35bc1SSimon Glass It is a binary blob which U-Boot uses to set up SDRAM. 423f7d35bc1SSimon Glass 424f7d35bc1SSimon Glass Note: Without this binary U-Boot will not be able to set up its 425f7d35bc1SSimon Glass SDRAM so will not boot. 426f7d35bc1SSimon Glass 427f7d35bc1SSimon Glassconfig CACHE_MRC_BIN 428f7d35bc1SSimon Glass bool 429f7d35bc1SSimon Glass depends on HAVE_MRC 430f7d35bc1SSimon Glass default n 431f7d35bc1SSimon Glass help 432f7d35bc1SSimon Glass Enable caching for the memory reference code binary. This uses an 433f7d35bc1SSimon Glass MTRR (memory type range register) to turn on caching for the section 434f7d35bc1SSimon Glass of SPI flash that contains the memory reference code. This makes 435f7d35bc1SSimon Glass SDRAM init run faster. 436f7d35bc1SSimon Glass 437f7d35bc1SSimon Glassconfig CACHE_MRC_SIZE_KB 438f7d35bc1SSimon Glass int 439f7d35bc1SSimon Glass depends on HAVE_MRC 440f7d35bc1SSimon Glass default 512 441f7d35bc1SSimon Glass help 442f7d35bc1SSimon Glass Sets the size of the cached area for the memory reference code. 443f7d35bc1SSimon Glass This ends at the end of SPI flash (address 0xffffffff) and is 444f7d35bc1SSimon Glass measured in KB. Typically this is set to 512, providing for 0.5MB 445f7d35bc1SSimon Glass of cached space. 446f7d35bc1SSimon Glass 447f7d35bc1SSimon Glassconfig DCACHE_RAM_BASE 448f7d35bc1SSimon Glass hex 449f7d35bc1SSimon Glass depends on HAVE_MRC 450f7d35bc1SSimon Glass help 451f7d35bc1SSimon Glass Sets the base of the data cache area in memory space. This is the 452f7d35bc1SSimon Glass start address of the cache-as-RAM (CAR) area and the address varies 453f7d35bc1SSimon Glass depending on the CPU. Once CAR is set up, read/write memory becomes 454f7d35bc1SSimon Glass available at this address and can be used temporarily until SDRAM 455f7d35bc1SSimon Glass is working. 456f7d35bc1SSimon Glass 457f7d35bc1SSimon Glassconfig DCACHE_RAM_SIZE 458f7d35bc1SSimon Glass hex 459f7d35bc1SSimon Glass depends on HAVE_MRC 460f7d35bc1SSimon Glass default 0x40000 461f7d35bc1SSimon Glass help 462f7d35bc1SSimon Glass Sets the total size of the data cache area in memory space. This 463f7d35bc1SSimon Glass sets the size of the cache-as-RAM (CAR) area. Note that much of the 464f7d35bc1SSimon Glass CAR space is required by the MRC. The CAR space available to U-Boot 465f7d35bc1SSimon Glass is normally at the start and typically extends to 1/4 or 1/2 of the 466f7d35bc1SSimon Glass available size. 467f7d35bc1SSimon Glass 468f7d35bc1SSimon Glassconfig DCACHE_RAM_MRC_VAR_SIZE 469f7d35bc1SSimon Glass hex 470f7d35bc1SSimon Glass depends on HAVE_MRC 471f7d35bc1SSimon Glass help 472f7d35bc1SSimon Glass This is the amount of CAR (Cache as RAM) reserved for use by the 473f7d35bc1SSimon Glass memory reference code. This depends on the implementation of the 474f7d35bc1SSimon Glass memory reference code and must be set correctly or the board will 475f7d35bc1SSimon Glass not boot. 476f7d35bc1SSimon Glass 4770adf8d35SSimon Glassconfig HAVE_REFCODE 4780adf8d35SSimon Glass bool "Add a Reference Code binary" 4790adf8d35SSimon Glass help 4800adf8d35SSimon Glass Select this option to add a Reference Code binary to the resulting 4810adf8d35SSimon Glass U-Boot image. This is an Intel binary blob that handles system 4820adf8d35SSimon Glass initialisation, in this case the PCH and System Agent. 4830adf8d35SSimon Glass 4840adf8d35SSimon Glass Note: Without this binary (on platforms that need it such as 4850adf8d35SSimon Glass broadwell) U-Boot will be missing some critical setup steps. 4860adf8d35SSimon Glass Various peripherals may fail to work. 4870adf8d35SSimon Glass 4884c71322bSBin Mengconfig SMP 4894c71322bSBin Meng bool "Enable Symmetric Multiprocessing" 4904c71322bSBin Meng default n 4914c71322bSBin Meng help 4924c71322bSBin Meng Enable use of more than one CPU in U-Boot and the Operating System 4934c71322bSBin Meng when loaded. Each CPU will be started up and information can be 4944c71322bSBin Meng obtained using the 'cpu' command. If this option is disabled, then 4954c71322bSBin Meng only one CPU will be enabled regardless of the number of CPUs 4964c71322bSBin Meng available. 4974c71322bSBin Meng 49845b5a378SSimon Glassconfig MAX_CPUS 49945b5a378SSimon Glass int "Maximum number of CPUs permitted" 500063374d2SBin Meng depends on SMP 50145b5a378SSimon Glass default 4 50245b5a378SSimon Glass help 50345b5a378SSimon Glass When using multi-CPU chips it is possible for U-Boot to start up 50445b5a378SSimon Glass more than one CPU. The stack memory used by all of these CPUs is 50545b5a378SSimon Glass pre-allocated so at present U-Boot wants to know the maximum 50645b5a378SSimon Glass number of CPUs that may be present. Set this to at least as high 50745b5a378SSimon Glass as the number of CPUs in your system (it uses about 4KB of RAM for 50845b5a378SSimon Glass each CPU). 50945b5a378SSimon Glass 51045b5a378SSimon Glassconfig AP_STACK_SIZE 51145b5a378SSimon Glass hex 512063374d2SBin Meng depends on SMP 51345b5a378SSimon Glass default 0x1000 51445b5a378SSimon Glass help 51545b5a378SSimon Glass Each additional CPU started by U-Boot requires its own stack. This 51645b5a378SSimon Glass option sets the stack size used by each CPU and directly affects 51745b5a378SSimon Glass the memory used by this initialisation process. Typically 4KB is 51845b5a378SSimon Glass enough space. 51945b5a378SSimon Glass 520786a08e0SBin Mengconfig HAVE_VGA_BIOS 521786a08e0SBin Meng bool "Add a VGA BIOS image" 522786a08e0SBin Meng help 523786a08e0SBin Meng Select this option if you have a VGA BIOS image that you would 524786a08e0SBin Meng like to add to your ROM. 525786a08e0SBin Meng 526786a08e0SBin Mengconfig VGA_BIOS_FILE 527786a08e0SBin Meng string "VGA BIOS image filename" 528786a08e0SBin Meng depends on HAVE_VGA_BIOS 529786a08e0SBin Meng default "vga.bin" 530786a08e0SBin Meng help 531786a08e0SBin Meng The filename of the VGA BIOS image in the board directory. 532786a08e0SBin Meng 533786a08e0SBin Mengconfig VGA_BIOS_ADDR 534786a08e0SBin Meng hex "VGA BIOS image location" 535786a08e0SBin Meng depends on HAVE_VGA_BIOS 536786a08e0SBin Meng default 0xfff90000 537786a08e0SBin Meng help 538786a08e0SBin Meng The location of VGA BIOS image in the SPI flash. For example, base 539786a08e0SBin Meng address of 0xfff90000 indicates that the image will be put at offset 540786a08e0SBin Meng 0x90000 from the beginning of a 1MB flash device. 541786a08e0SBin Meng 542b5b6b019SBin Mengmenu "System tables" 5438744bef5SBin Meng depends on !EFI && !SYS_COREBOOT 544b5b6b019SBin Meng 545b5b6b019SBin Mengconfig GENERATE_PIRQ_TABLE 546b5b6b019SBin Meng bool "Generate a PIRQ table" 547b5b6b019SBin Meng default n 548b5b6b019SBin Meng help 549b5b6b019SBin Meng Generate a PIRQ routing table for this board. The PIRQ routing table 550b5b6b019SBin Meng is generated by U-Boot in the system memory from 0xf0000 to 0xfffff 551b5b6b019SBin Meng at every 16-byte boundary with a PCI IRQ routing signature ("$PIR"). 552b5b6b019SBin Meng It specifies the interrupt router information as well how all the PCI 553b5b6b019SBin Meng devices' interrupt pins are wired to PIRQs. 554b5b6b019SBin Meng 5556388e357SSimon Glassconfig GENERATE_SFI_TABLE 5566388e357SSimon Glass bool "Generate a SFI (Simple Firmware Interface) table" 5576388e357SSimon Glass help 5586388e357SSimon Glass The Simple Firmware Interface (SFI) provides a lightweight method 5596388e357SSimon Glass for platform firmware to pass information to the operating system 5606388e357SSimon Glass via static tables in memory. Kernel SFI support is required to 5616388e357SSimon Glass boot on SFI-only platforms. If you have ACPI tables then these are 5626388e357SSimon Glass used instead. 5636388e357SSimon Glass 5646388e357SSimon Glass U-Boot writes this table in write_sfi_table() just before booting 5656388e357SSimon Glass the OS. 5666388e357SSimon Glass 5676388e357SSimon Glass For more information, see http://simplefirmware.org 5686388e357SSimon Glass 56907545d86SBin Mengconfig GENERATE_MP_TABLE 57007545d86SBin Meng bool "Generate an MP (Multi-Processor) table" 57107545d86SBin Meng default n 57207545d86SBin Meng help 57307545d86SBin Meng Generate an MP (Multi-Processor) table for this board. The MP table 57407545d86SBin Meng provides a way for the operating system to support for symmetric 57507545d86SBin Meng multiprocessing as well as symmetric I/O interrupt handling with 57607545d86SBin Meng the local APIC and I/O APIC. 57707545d86SBin Meng 578867bcb63SSaket Sinhaconfig GENERATE_ACPI_TABLE 579867bcb63SSaket Sinha bool "Generate an ACPI (Advanced Configuration and Power Interface) table" 580867bcb63SSaket Sinha default n 581fcf5c041SMiao Yan select QFW if QEMU 582867bcb63SSaket Sinha help 583867bcb63SSaket Sinha The Advanced Configuration and Power Interface (ACPI) specification 584867bcb63SSaket Sinha provides an open standard for device configuration and management 585867bcb63SSaket Sinha by the operating system. It defines platform-independent interfaces 586867bcb63SSaket Sinha for configuration and power management monitoring. 587867bcb63SSaket Sinha 588b5b6b019SBin Mengendmenu 589b5b6b019SBin Meng 590b5b6b019SBin Mengconfig MAX_PIRQ_LINKS 591b5b6b019SBin Meng int 592b5b6b019SBin Meng default 8 593b5b6b019SBin Meng help 594b5b6b019SBin Meng This variable specifies the number of PIRQ interrupt links which are 595b5b6b019SBin Meng routable. On most older chipsets, this is 4, PIRQA through PIRQD. 596b5b6b019SBin Meng Some newer chipsets offer more than four links, commonly up to PIRQH. 597b5b6b019SBin Meng 598b5b6b019SBin Mengconfig IRQ_SLOT_COUNT 599b5b6b019SBin Meng int 600b5b6b019SBin Meng default 128 601b5b6b019SBin Meng help 602b5b6b019SBin Meng U-Boot can support up to 254 IRQ slot info in the PIRQ routing table 603b5b6b019SBin Meng which in turns forms a table of exact 4KiB. The default value 128 604b5b6b019SBin Meng should be enough for most boards. If this does not fit your board, 605b5b6b019SBin Meng change it according to your needs. 606b5b6b019SBin Meng 6072d934e57SSimon Glassconfig PCIE_ECAM_BASE 6082d934e57SSimon Glass hex 6092d934e57SSimon Glass default 0xe0000000 6102d934e57SSimon Glass help 6112d934e57SSimon Glass This is the memory-mapped address of PCI configuration space, which 6122d934e57SSimon Glass is only available through the Enhanced Configuration Access 6132d934e57SSimon Glass Mechanism (ECAM) with PCI Express. It can be set up almost 6142d934e57SSimon Glass anywhere. Before it is set up, it is possible to access PCI 6152d934e57SSimon Glass configuration space through I/O access, but memory access is more 6162d934e57SSimon Glass convenient. Using this, PCI can be scanned and configured. This 6172d934e57SSimon Glass should be set to a region that does not conflict with memory 6182d934e57SSimon Glass assigned to PCI devices - i.e. the memory and prefetch regions, as 6192d934e57SSimon Glass passed to pci_set_region(). 6202d934e57SSimon Glass 6211ed6648bSBin Mengconfig PCIE_ECAM_SIZE 6221ed6648bSBin Meng hex 6231ed6648bSBin Meng default 0x10000000 6241ed6648bSBin Meng help 6251ed6648bSBin Meng This is the size of memory-mapped address of PCI configuration space, 6261ed6648bSBin Meng which is only available through the Enhanced Configuration Access 6271ed6648bSBin Meng Mechanism (ECAM) with PCI Express. Each bus consumes 1 MiB memory, 6281ed6648bSBin Meng so a default 0x10000000 size covers all of the 256 buses which is the 6291ed6648bSBin Meng maximum number of PCI buses as defined by the PCI specification. 6301ed6648bSBin Meng 6311eb39a50SBin Mengconfig I8259_PIC 6321eb39a50SBin Meng bool 6331eb39a50SBin Meng default y 6341eb39a50SBin Meng help 6351eb39a50SBin Meng Intel 8259 ISA compatible chipset incorporates two 8259 (master and 6361eb39a50SBin Meng slave) interrupt controllers. Include this to have U-Boot set up 6371eb39a50SBin Meng the interrupt correctly. 6381eb39a50SBin Meng 6391eb39a50SBin Mengconfig I8254_TIMER 6401eb39a50SBin Meng bool 6411eb39a50SBin Meng default y 6421eb39a50SBin Meng help 6431eb39a50SBin Meng Intel 8254 timer contains three counters which have fixed uses. 6441eb39a50SBin Meng Include this to have U-Boot set up the timer correctly. 6451eb39a50SBin Meng 6463cf23719SBin Mengconfig SEABIOS 6473cf23719SBin Meng bool "Support booting SeaBIOS" 6483cf23719SBin Meng help 6493cf23719SBin Meng SeaBIOS is an open source implementation of a 16-bit X86 BIOS. 6503cf23719SBin Meng It can run in an emulator or natively on X86 hardware with the use 6513cf23719SBin Meng of coreboot/U-Boot. By turning on this option, U-Boot prepares 6523cf23719SBin Meng all the configuration tables that are necessary to boot SeaBIOS. 6533cf23719SBin Meng 6543cf23719SBin Meng Check http://www.seabios.org/SeaBIOS for details. 6553cf23719SBin Meng 656789b6dceSBin Mengconfig HIGH_TABLE_SIZE 657789b6dceSBin Meng hex "Size of configuration tables which reside in high memory" 658789b6dceSBin Meng default 0x10000 659789b6dceSBin Meng depends on SEABIOS 660789b6dceSBin Meng help 661789b6dceSBin Meng SeaBIOS itself resides in E seg and F seg, where U-Boot puts all 662789b6dceSBin Meng configuration tables like PIRQ/MP/ACPI. To avoid conflicts, U-Boot 663789b6dceSBin Meng puts a copy of configuration tables in high memory region which 664789b6dceSBin Meng is reserved on the stack before relocation. The region size is 665789b6dceSBin Meng determined by this option. 666789b6dceSBin Meng 667789b6dceSBin Meng Increse it if the default size does not fit the board's needs. 668789b6dceSBin Meng This is most likely due to a large ACPI DSDT table is used. 669789b6dceSBin Meng 670e49cceacSSimon Glasssource "arch/x86/lib/efi/Kconfig" 671e49cceacSSimon Glass 672dd84058dSMasahiro Yamadaendmenu 673